1c444d06c1
2009-01-29 Mark Mitchell <mark@codesourcery.com> * config/tc-arm.c (do_t_orn): New function. (do_t_rrx): Likewise. (insns): Add orn and rrx. gas/testsuite: 2009-01-29 Mark Mitchell <mark@codesourcery.com> * gas/arm/thumb32.s: Add tests for orn and rrx. * gas/arm/thumb32.d: Adjust accordingly. * gas/arm/thumb32.l: Likewise. * gas/arm/thumb2_invert.s: Add tests for orn and orr. * gas/arm/thumb2_invert.d: Adjust accordingly. * gas/arm/tcompat.s: Add tests for rrx. * gas/arm/tcompat.d: Adjust accordingly.
841 lines
13 KiB
ArmAsm
841 lines
13 KiB
ArmAsm
.text
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.thumb
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.syntax unified
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encode_thumb32_immediate:
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orr r0, r1, #0x00000000
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orr r0, r1, #0x000000a5
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orr r0, r1, #0x00a500a5
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orr r0, r1, #0xa500a500
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orr r0, r1, #0xa5a5a5a5
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orr r0, r1, #0xa5 << 31
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orr r0, r1, #0xa5 << 30
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orr r0, r1, #0xa5 << 29
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orr r0, r1, #0xa5 << 28
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orr r0, r1, #0xa5 << 27
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orr r0, r1, #0xa5 << 26
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orr r0, r1, #0xa5 << 25
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orr r0, r1, #0xa5 << 24
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orr r0, r1, #0xa5 << 23
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orr r0, r1, #0xa5 << 22
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orr r0, r1, #0xa5 << 21
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orr r0, r1, #0xa5 << 20
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orr r0, r1, #0xa5 << 19
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orr r0, r1, #0xa5 << 18
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orr r0, r1, #0xa5 << 17
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orr r0, r1, #0xa5 << 16
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orr r0, r1, #0xa5 << 15
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orr r0, r1, #0xa5 << 14
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orr r0, r1, #0xa5 << 13
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orr r0, r1, #0xa5 << 12
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orr r0, r1, #0xa5 << 11
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orr r0, r1, #0xa5 << 10
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orr r0, r1, #0xa5 << 9
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orr r0, r1, #0xa5 << 8
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orr r0, r1, #0xa5 << 7
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orr r0, r1, #0xa5 << 6
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orr r0, r1, #0xa5 << 5
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orr r0, r1, #0xa5 << 4
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orr r0, r1, #0xa5 << 3
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orr r0, r1, #0xa5 << 2
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orr r0, r1, #0xa5 << 1
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add_sub:
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@ Should be format 1, Some have equivalent format 2 encodings
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adds r0, r0, #0
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adds r5, r0, #0
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adds r0, r5, #0
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adds r0, r2, #5
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adds r0, #129 @ format 2
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adds r0, r0, #129
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adds r5, #126
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adds r0, r0, r0 @ format 3
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adds r5, r0, r0
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adds r0, r5, r0
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adds r0, r0, r5
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adds r1, r2, r3
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add r8, r0 @ format 4
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add r0, r8
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add r0, r8, r0
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add r0, r0, r8
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add r8, r0, r0 @ ... not this one
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add r1, r0
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add r0, r1
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add r0, pc, #0 @ format 5
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add r5, pc, #0
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add r0, pc, #516
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add r0, sp, #0 @ format 6
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add r5, sp, #0
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add r0, sp, #516
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add sp, #0 @ format 7
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add sp, sp, #0
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add sp, #260
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add.w r0, r0, #0 @ T32 format 1
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adds.w r0, r0, #0
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add.w r9, r0, #0
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add.w r0, r9, #0
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add.w r0, r0, #129
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adds r5, r3, #0x10000
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add r0, sp, #1
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add r9, sp, #0
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add.w sp, sp, #4
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add.w r0, r0, r0 @ T32 format 2
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adds.w r0, r0, r0
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add.w r9, r0, r0
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add.w r0, r9, r0
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add.w r0, r0, r9
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add.w r8, r9, r10
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add.w r8, r9, r10, lsl #17
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add.w r8, r8, r10, lsr #32
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add.w r8, r8, r10, lsr #17
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add.w r8, r9, r10, asr #32
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add.w r8, r9, r10, asr #17
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add.w r8, r9, r10, rrx
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add.w r8, r9, r10, ror #17
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subs r0, r0, #0 @ format 1
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subs r5, r0, #0
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subs r0, r5, #0
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subs r0, r2, #5
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subs r0, r0, #129
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subs r5, #8
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subs r0, r0, r0 @ format 3
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subs r5, r0, r0
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subs r0, r5, r0
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subs r0, r0, r5
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sub sp, #260 @ format 4
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sub sp, sp, #260
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subs r8, r0 @ T32 format 2
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subs r0, r8
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subs r0, #260 @ T32 format 1
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subs.w r1, r2, #4
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subs r5, r3, #0x10000
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sub r1, sp, #4
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sub r9, sp, #0
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sub.w sp, sp, #4
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arit3:
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.macro arit3 op ops opw opsw
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\ops r0, r0
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\ops r5, r0
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\ops r0, r5
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\ops r0, r0, r5
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\ops r0, r5, r0
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\op r0, r5, r0
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\op r0, r1, r2
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\op r9, r0, r0
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\op r0, r9, r0
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\op r0, r0, r9
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\opsw r0, r0, r0
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\opw r0, r1, r2, asr #17
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\opw r0, r1, #129
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.endm
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arit3 adc adcs adc.w adcs.w
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arit3 and ands and.w ands.w
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arit3 bic bics bic.w bics.w
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arit3 eor eors eor.w eors.w
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arit3 orr orrs orr.w orrs.w
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arit3 rsb rsbs rsb.w rsbs.w
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arit3 sbc sbcs sbc.w sbcs.w
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arit3 orn orns orn orns
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.purgem arit3
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bfc_bfi_bfx:
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bfc r0, #0, #1
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bfc r9, #0, #1
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bfi r9, #0, #0, #1
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bfc r0, #21, #1
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bfc r0, #0, #18
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bfi r0, r0, #0, #1
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bfi r9, r0, #0, #1
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bfi r0, r9, #0, #1
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bfi r0, r0, #21, #1
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bfi r0, r0, #0, #18
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sbfx r0, r0, #0, #1
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ubfx r9, r0, #0, #1
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sbfx r0, r9, #0, #1
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ubfx r0, r0, #21, #1
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sbfx r0, r0, #0, #18
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.globl branches
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branches:
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.macro bra op
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\op 1b
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\op 1f
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.endm
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1:
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bra beq.n
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bra bne.n
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bra bcs.n
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bra bhs.n
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bra bcc.n
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bra bul.n
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bra blo.n
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bra bmi.n
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bra bpl.n
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bra bvs.n
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bra bvc.n
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bra bhi.n
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bra bls.n
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bra bvc.n
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bra bhi.n
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bra bls.n
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bra bge.n
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bra blt.n
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bra bgt.n
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bra ble.n
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bra bal.n
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bra b.n
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@ bl, blx have no short form.
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.balign 4
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1:
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bra beq.w
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bra bne.w
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bra bcs.w
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bra bhs.w
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bra bcc.w
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bra bul.w
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bra blo.w
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bra bmi.w
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bra bpl.w
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bra bvs.w
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bra bvc.w
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bra bhi.w
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bra bls.w
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bra bvc.w
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bra bhi.w
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bra bls.w
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bra bge.w
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bra blt.w
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bra bgt.w
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bra ble.w
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bra b.w
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bra bl
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bra blx
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.balign 4
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1:
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bx r9
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blx r0
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blx r9
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bxj r0
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bxj r9
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.purgem bra
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clz:
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clz r0, r0
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clz r9, r0
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clz r0, r9
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cps:
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cpsie f
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cpsid i
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cpsie a
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cpsid.w f
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cpsie.w i
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cpsid.w a
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cpsie i, #0
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cpsid i, #17
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cps #0
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cps #17
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cpy:
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cpy r0, r0
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cpy r9, r0
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cpy r0, r9
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cpy.w r0, r0
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cpy.w r9, r0
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cpy.w r0, r9
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czb:
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cbnz r0, 2f
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cbz r5, 1f
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nop_hint:
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nop
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1: yield
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2: wfe
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wfi
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sev
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nop.w
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yield.w
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wfe.w
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wfi.w
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sev.w
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nop {9}
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nop {129}
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it:
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.macro nop1 cond ncond a
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.ifc \a,t
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nop\cond
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.else
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nop\ncond
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.endif
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.endm
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.macro it0 cond m=
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it\m \cond
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nop\cond
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.endm
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.macro it1 cond ncond a m=
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it0 \cond \a\m
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nop1 \cond \ncond \a
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.endm
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.macro it2 cond ncond a b m=
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it1 \cond \ncond \a \b\m
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nop1 \cond \ncond \b
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.endm
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.macro it3 cond ncond a b c
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it2 \cond \ncond \a \b \c
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nop1 \cond \ncond \c
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.endm
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it0 eq
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it0 ne
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it0 cs
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it0 hs
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it0 cc
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it0 ul
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it0 lo
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it0 mi
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it0 pl
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it0 vs
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it0 vc
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it0 hi
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it0 ge
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it0 lt
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it0 gt
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it0 le
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it0 al
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it1 eq ne t
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it1 eq ne e
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it2 eq ne t t
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it2 eq ne e t
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it2 eq ne t e
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it2 eq ne e e
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it3 eq ne t t t
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it3 eq ne e t t
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it3 eq ne t e t
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it3 eq ne t t e
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it3 eq ne t e e
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it3 eq ne e t e
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it3 eq ne e e t
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it3 eq ne e e e
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it1 ne eq t
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it1 ne eq e
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it2 ne eq t t
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it2 ne eq e t
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it2 ne eq t e
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it2 ne eq e e
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it3 ne eq t t t
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it3 ne eq e t t
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it3 ne eq t e t
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it3 ne eq t t e
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it3 ne eq t e e
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it3 ne eq e t e
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it3 ne eq e e t
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it3 ne eq e e e
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ldst:
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1:
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pld [r5]
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pld [r5, #0x330]
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pld [r5, #-0x30]
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pld [r5], #0x30
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pld [r5], #-0x30
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pld [r5, #0x30]!
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pld [r5, #-0x30]!
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pld [r5, r4]
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pld [r9, ip]
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pld 1f
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pld 1b
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1:
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ldrd r2, r3, [r5]
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ldrd r2, [r5, #0x30]
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ldrd r2, [r5, #-0x30]
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strd r2, r3, [r5]
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strd r2, [r5, #0x30]
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strd r2, [r5, #-0x30]
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ldrbt r1, [r5]
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ldrbt r1, [r5, #0x30]
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ldrsbt r1, [r5]
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ldrsbt r1, [r5, #0x30]
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ldrht r1, [r5]
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ldrht r1, [r5, #0x30]
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ldrsht r1, [r5]
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ldrsht r1, [r5, #0x30]
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ldrt r1, [r5]
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ldrt r1, [r5, #0x30]
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ldxstx:
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ldrexb r1, [r4]
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ldrexh r1, [r4]
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ldrex r1, [r4]
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ldrexd r1, r2, [r4]
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strexb r1, r2, [r4]
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strexh r1, r2, [r4]
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strex r1, r2, [r4]
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strexd r1, r2, r3, [r4]
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ldrex r1, [r4,#516]
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strex r1, r2, [r4,#516]
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ldmstm:
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ldmia r0!, {r1,r2,r3}
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ldmia r2, {r0,r1,r2}
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ldmia.w r2, {r0,r1,r2}
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ldmia r9, {r0,r1,r2}
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ldmia r0, {r7,r8,r10}
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ldmia r0!, {r7,r8,r10}
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stmia r0!, {r1,r2,r3}
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stmia r2!, {r0,r1,r3}
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stmia.w r2!, {r0,r1,r3}
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stmia r9, {r0,r1,r2}
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stmia r0, {r7,r8,r10}
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stmia r0!, {r7,r8,r10}
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ldmdb r0, {r7,r8,r10}
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stmdb r0, {r7,r8,r10}
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mlas:
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mla r0, r0, r0, r0
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mls r0, r0, r0, r0
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mla r9, r0, r0, r0
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mla r0, r9, r0, r0
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mla r0, r0, r9, r0
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mla r0, r0, r0, r9
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tst_teq_cmp_cmn_mov_mvn:
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.macro mt op ops opw opsw
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\ops r0, r0
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\op r0, r0
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\ops r5, r0
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\op r0, r5
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\op r0, r5, asr #17
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\opw r0, r0
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\ops r9, r0
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\opsw r0, r9
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\opw r0, #129
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\opw r5, #129
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.endm
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mt tst tsts tst.w tsts.w
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mt teq teqs teq.w teqs.w
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mt cmp cmps cmp.w cmps.w
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mt cmn cmns cmn.w cmns.w
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mt mov movs mov.w movs.w
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mt mvn mvns mvn.w mvns.w
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.purgem mt
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mov16:
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movw r0, #0
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movt r0, #0
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movw r9, #0
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movw r0, #0x9000
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movw r0, #0x0800
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movw r0, #0x0500
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movw r0, #0x0081
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movw r0, #0xffff
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mrs_msr:
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mrs r0, CPSR
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mrs r0, SPSR
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mrs r9, CPSR_all
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mrs r9, SPSR_all
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msr CPSR_c, r0
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msr SPSR_c, r0
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msr CPSR_c, r9
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msr CPSR_x, r0
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msr CPSR_s, r0
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msr CPSR_f, r0
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mul:
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mul r0, r0, r0
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mul r0, r9, r0
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mul r0, r0, r9
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mul r0, r0
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mul r9, r0
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muls r5, r0
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muls r5, r0, r5
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muls r0, r5
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mull:
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smull r0, r1, r0, r0
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umull r0, r1, r0, r0
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smlal r0, r1, r0, r0
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umlal r0, r1, r0, r0
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smull r9, r0, r0, r0
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smull r0, r9, r0, r0
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smull r0, r1, r9, r0
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smull r0, r1, r0, r9
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neg:
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negs r0, r0
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negs r0, r5
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negs r5, r0
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negs.w r0, r0
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negs.w r5, r0
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negs.w r0, r5
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neg r0, r9
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neg r9, r0
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negs r0, r9
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negs r9, r0
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pkh:
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pkhbt r0, r0, r0
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pkhbt r9, r0, r0
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pkhbt r0, r9, r0
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pkhbt r0, r0, r9
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pkhbt r0, r0, r0, lsl #0x14
|
|
pkhbt r0, r0, r0, lsl #3
|
|
pkhtb r1, r2, r3
|
|
pkhtb r1, r2, r3, asr #0x11
|
|
|
|
push_pop:
|
|
push {r0}
|
|
pop {r0}
|
|
push {r1,lr}
|
|
pop {r1,pc}
|
|
push {r8,r9,r10,r11,r12}
|
|
pop {r8,r9,r10,r11,r12}
|
|
|
|
qadd:
|
|
qadd r1, r2, r3
|
|
qadd16 r1, r2, r3
|
|
qadd8 r1, r2, r3
|
|
qasx r1, r2, r3
|
|
qaddsubx r1, r2, r3
|
|
qdadd r1, r2, r3
|
|
qdsub r1, r2, r3
|
|
qsub r1, r2, r3
|
|
qsub16 r1, r2, r3
|
|
qsub8 r1, r2, r3
|
|
qsax r1, r2, r3
|
|
qsubaddx r1, r2, r3
|
|
sadd16 r1, r2, r3
|
|
sadd8 r1, r2, r3
|
|
sasx r1, r2, r3
|
|
saddsubx r1, r2, r3
|
|
ssub16 r1, r2, r3
|
|
ssub8 r1, r2, r3
|
|
ssax r1, r2, r3
|
|
ssubaddx r1, r2, r3
|
|
shadd16 r1, r2, r3
|
|
shadd8 r1, r2, r3
|
|
shasx r1, r2, r3
|
|
shaddsubx r1, r2, r3
|
|
shsub16 r1, r2, r3
|
|
shsub8 r1, r2, r3
|
|
shsax r1, r2, r3
|
|
shsubaddx r1, r2, r3
|
|
uadd16 r1, r2, r3
|
|
uadd8 r1, r2, r3
|
|
uasx r1, r2, r3
|
|
uaddsubx r1, r2, r3
|
|
usub16 r1, r2, r3
|
|
usub8 r1, r2, r3
|
|
usax r1, r2, r3
|
|
usubaddx r1, r2, r3
|
|
uhadd16 r1, r2, r3
|
|
uhadd8 r1, r2, r3
|
|
uhasx r1, r2, r3
|
|
uhaddsubx r1, r2, r3
|
|
uhsub16 r1, r2, r3
|
|
uhsub8 r1, r2, r3
|
|
uhsax r1, r2, r3
|
|
uhsubaddx r1, r2, r3
|
|
uqadd16 r1, r2, r3
|
|
uqadd8 r1, r2, r3
|
|
uqasx r1, r2, r3
|
|
uqaddsubx r1, r2, r3
|
|
uqsub16 r1, r2, r3
|
|
uqsub8 r1, r2, r3
|
|
uqsax r1, r2, r3
|
|
uqsubaddx r1, r2, r3
|
|
sel r1, r2, r3
|
|
|
|
rbit_rev:
|
|
.macro rx op opw
|
|
\op r0, r0
|
|
\opw r0, r0
|
|
\op r0, r5
|
|
\op r5, r0
|
|
\op r0, r9
|
|
\op r9, r0
|
|
.endm
|
|
|
|
rx rev rev.w
|
|
rx rev16 rev16.w
|
|
rx revsh revsh.w
|
|
rx rbit rbit.w
|
|
|
|
.purgem rx
|
|
|
|
shift:
|
|
.macro sh op ops opw opsw
|
|
\ops r0, #17 @ 16-bit format 1
|
|
\ops r0, r0, #14
|
|
\ops r5, r0, #17
|
|
\ops r0, r5, #14
|
|
\ops r0, r0 @ 16-bit format 2
|
|
\ops r0, r5
|
|
\ops r0, r0, r5
|
|
\op r9, #17 @ 32-bit format 1
|
|
\op r9, r9, #14
|
|
\ops r0, r9, #17
|
|
\op r9, r0, #14
|
|
\opw r0, r0, r0 @ 32-bit format 2
|
|
\op r9, r9
|
|
\ops r9, r0
|
|
\op r0, r9
|
|
\op r0, r5
|
|
\ops r0, r1, r2
|
|
.endm
|
|
|
|
sh lsl lsls lsl.w lsls.w
|
|
sh lsr lsrs lsr.w lsrs.w
|
|
sh asr asrs asr.w asrs.w
|
|
sh ror rors ror.w rors.w
|
|
|
|
.purgem sh
|
|
|
|
rrx:
|
|
rrx r1, r2
|
|
rrxs r3, r4
|
|
|
|
smc:
|
|
smc #0
|
|
smc #0xabcd
|
|
|
|
smla:
|
|
smlabb r0, r0, r0, r0
|
|
smlabb r9, r0, r0, r0
|
|
smlabb r0, r9, r0, r0
|
|
smlabb r0, r0, r9, r0
|
|
smlabb r0, r0, r0, r9
|
|
|
|
smlatb r0, r0, r0, r0
|
|
smlabt r0, r0, r0, r0
|
|
smlatt r0, r0, r0, r0
|
|
smlawb r0, r0, r0, r0
|
|
smlawt r0, r0, r0, r0
|
|
smlad r0, r0, r0, r0
|
|
smladx r0, r0, r0, r0
|
|
smlsd r0, r0, r0, r0
|
|
smlsdx r0, r0, r0, r0
|
|
smmla r0, r0, r0, r0
|
|
smmlar r0, r0, r0, r0
|
|
smmls r0, r0, r0, r0
|
|
smmlsr r0, r0, r0, r0
|
|
usada8 r0, r0, r0, r0
|
|
|
|
smlal:
|
|
smlalbb r0, r0, r0, r0
|
|
smlalbb r9, r0, r0, r0
|
|
smlalbb r0, r9, r0, r0
|
|
smlalbb r0, r0, r9, r0
|
|
smlalbb r0, r0, r0, r9
|
|
|
|
smlaltb r0, r0, r0, r0
|
|
smlalbt r0, r0, r0, r0
|
|
smlaltt r0, r0, r0, r0
|
|
smlald r0, r0, r0, r0
|
|
smlaldx r0, r0, r0, r0
|
|
smlsld r0, r0, r0, r0
|
|
smlsldx r0, r0, r0, r0
|
|
umaal r0, r0, r0, r0
|
|
|
|
smul:
|
|
smulbb r0, r0, r0
|
|
smulbb r9, r0, r0
|
|
smulbb r0, r9, r0
|
|
smulbb r0, r0, r9
|
|
|
|
smultb r0, r0, r0
|
|
smulbt r0, r0, r0
|
|
smultt r0, r0, r0
|
|
smulwb r0, r0, r0
|
|
smulwt r0, r0, r0
|
|
smmul r0, r0, r0
|
|
smmulr r0, r0, r0
|
|
smuad r0, r0, r0
|
|
smuadx r0, r0, r0
|
|
smusd r0, r0, r0
|
|
smusdx r0, r0, r0
|
|
usad8 r0, r0, r0
|
|
|
|
sat:
|
|
ssat r0, #1, r0
|
|
ssat r0, #1, r0, lsl #0
|
|
ssat r0, #1, r0, asr #0
|
|
ssat r9, #1, r0
|
|
ssat r0, #18, r0
|
|
ssat r0, #1, r9
|
|
ssat r0, #1, r0, lsl #0x1c
|
|
ssat r0, #1, r0, asr #0x03
|
|
|
|
ssat16 r0, #1, r0
|
|
ssat16 r9, #1, r0
|
|
ssat16 r0, #10, r0
|
|
ssat16 r0, #1, r9
|
|
|
|
usat r0, #0, r0
|
|
usat r0, #0, r0, lsl #0
|
|
usat r0, #0, r0, asr #0
|
|
usat r9, #0, r0
|
|
usat r0, #17, r0
|
|
usat r0, #0, r9
|
|
usat r0, #0, r0, lsl #0x1c
|
|
usat r0, #0, r0, asr #0x03
|
|
|
|
usat16 r0, #0, r0
|
|
usat16 r9, #0, r0
|
|
usat16 r0, #9, r0
|
|
usat16 r0, #0, r9
|
|
|
|
xt:
|
|
sxtb r0, r0
|
|
sxtb r0, r0, ror #0
|
|
sxtb r5, r0
|
|
sxtb r0, r5
|
|
sxtb.w r1, r2
|
|
sxtb r1, r2, ror #8
|
|
sxtb r1, r2, ror #16
|
|
sxtb r1, r2, ror #24
|
|
|
|
sxtb16 r1, r2
|
|
sxtb16 r8, r9
|
|
sxth r1, r2
|
|
sxth r8, r9
|
|
uxtb r1, r2
|
|
uxtb r8, r9
|
|
uxtb16 r1, r2
|
|
uxtb16 r8, r9
|
|
uxth r1, r2
|
|
uxth r8, r9
|
|
|
|
xta:
|
|
sxtab r0, r0, r0
|
|
sxtab r0, r0, r0, ror #0
|
|
sxtab r9, r0, r0, ror #8
|
|
sxtab r0, r9, r0, ror #16
|
|
sxtab r0, r0, r9, ror #24
|
|
|
|
sxtab16 r1, r2, r3
|
|
sxtah r1, r2, r3
|
|
uxtab r1, r2, r3
|
|
uxtab16 r1, r2, r3
|
|
uxtah r1, r2, r3
|
|
|
|
.macro ldpcimm op
|
|
\op r1, [pc, #0x2aa]
|
|
\op r1, [pc, #0x155]
|
|
\op r1, [pc, #-0x2aa]
|
|
\op r1, [pc, #-0x155]
|
|
.endm
|
|
ldpcimm ldrb
|
|
ldpcimm ldrsb
|
|
ldpcimm ldrh
|
|
ldpcimm ldrsh
|
|
ldpcimm ldr
|
|
addw r9, r0, #0
|
|
addw r6, pc, #0xfff
|
|
subw r6, r9, #0xa85
|
|
subw r6, r9, #0x57a
|
|
tbb [pc, r6]
|
|
tbb [r0, r9]
|
|
tbh [pc, r7, lsl #1]
|
|
tbh [r0, r8, lsl #1]
|
|
|
|
push {r8}
|
|
pop {r8}
|
|
|
|
ldmdb r0!, {r7,r8,r10}
|
|
stmdb r0!, {r7,r8,r10}
|
|
|
|
ldm r0!, {r1, r2}
|
|
stm r0!, {r1, r2}
|
|
ldm r0, {r8, r9}
|
|
stm r0, {r8, r9}
|
|
itttt eq
|
|
ldmeq r0!, {r1, r2}
|
|
stmeq r0!, {r1, r2}
|
|
ldmeq r0, {r8, r9}
|
|
stmeq r0, {r8, r9}
|
|
nop
|
|
|
|
srs:
|
|
srsia sp, #16
|
|
srsdb sp, #16
|
|
srsia sp!, #21
|
|
srsia sp!, #10
|
|
|
|
movs pc, lr
|
|
subs pc, lr, #0
|
|
subs pc, lr, #4
|
|
subs pc, lr, #255
|
|
|
|
ldrd r2, r4, [r9, #48]!
|
|
ldrd r2, r4, [r9, #-48]!
|
|
strd r2, r4, [r9, #48]!
|
|
strd r2, r4, [r9, #-48]!
|
|
ldrd r2, r4, [r9], #48
|
|
ldrd r2, r4, [r9], #-48
|
|
strd r2, r4, [r9], #48
|
|
strd r2, r4, [r9], #-48
|
|
|
|
.macro ldaddr op
|
|
ldr\op r1, [r5, #0x301]
|
|
ldr\op r1, [r5, #0x30]!
|
|
ldr\op r1, [r5, #-0x30]!
|
|
ldr\op r1, [r5], #0x30
|
|
ldr\op r1, [r5], #-0x30
|
|
ldr\op r1, [r5, r9]
|
|
.endm
|
|
ldaddr
|
|
ldaddr b
|
|
ldaddr sb
|
|
ldaddr h
|
|
ldaddr sh
|
|
.macro movshift op s="s"
|
|
movs r1, r4, \op #2
|
|
movs r3, r9, \op #2
|
|
movs r1, r2, \op r3
|
|
movs r1, r1, \op r3
|
|
movs r1, r1, \op r9
|
|
mov r1, r2, \op r3
|
|
mov r1, r1, \op r3
|
|
.endm
|
|
movshift lsl
|
|
movshift lsr
|
|
movshift asr
|
|
movshift ror
|
|
nop
|