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202e762b322444344827acbf98162fcb2910e0dd
binutils-gdb/opcodes
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Alan Modra 202e762b32 ubsan: fr30: left shift of negative value 
cpu/
	* fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
	left shift signed values.
opcodes/
	* fr30-ibld.c: Regenerate.
2020-01-13 12:12:05 +10:30
..
po
Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. Add an ELF based target for these as well.
2020-01-02 14:14:59 +00:00
.gitignore
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aarch64-asm-2.c
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aarch64-asm.c
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2020-01-01 18:42:54 +10:30
aarch64-asm.h
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2020-01-01 18:42:54 +10:30
aarch64-dis-2.c
Arm64: correct uzp{1,2} mnemonics
2020-01-03 10:13:31 +01:00
aarch64-dis.c
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2020-01-01 18:42:54 +10:30
aarch64-dis.h
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aarch64-gen.c
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2020-01-01 18:42:54 +10:30
aarch64-opc-2.c
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aarch64-opc.c
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aarch64-opc.h
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2020-01-01 18:42:54 +10:30
aarch64-tbl.h
Arm64: correct address index operands for LD1RO{H,W,D}
2020-01-03 10:16:44 +01:00
aclocal.m4
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alpha-dis.c
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2020-01-01 18:42:54 +10:30
alpha-opc.c
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arc-dis.c
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arc-dis.h
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arc-ext-tbl.h
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arc-ext.c
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arc-ext.h
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arc-fxi.h
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2020-01-01 18:42:54 +10:30
arc-nps400-tbl.h
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arc-opc.c
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arc-regs.h
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2020-01-01 18:42:54 +10:30
arc-tbl.h
[ARC] Add finer details for LLOCK and SCOND
2020-01-07 15:25:34 +02:00
arm-dis.c
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2020-01-01 18:42:54 +10:30
avr-dis.c
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bfin-dis.c
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bpf-asm.c
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bpf-desc.c
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bpf-desc.h
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bpf-dis.c
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bpf-ibld.c
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bpf-opc.c
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bpf-opc.h
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cgen-asm.c
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cgen-asm.in
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cgen-bitset.c
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cgen-dis.c
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cgen-dis.in
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cgen-ibld.in
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cgen-opc.c
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cgen.sh
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2020-01-01 18:42:54 +10:30
ChangeLog
ubsan: fr30: left shift of negative value
2020-01-13 12:12:05 +10:30
ChangeLog-0001
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ChangeLog-0203
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ChangeLog-2004
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ChangeLog-2005
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ChangeLog-2006
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ChangeLog-2007
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ChangeLog-2008
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ChangeLog-2009
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ChangeLog-2010
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ChangeLog-2011
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ChangeLog-2012
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ChangeLog-2013
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ChangeLog-2014
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ChangeLog-2015
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ChangeLog-2016
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ChangeLog-2017
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ChangeLog-2018
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ChangeLog-2019
ChangeLog rotation
2020-01-01 18:12:08 +10:30
ChangeLog-9297
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ChangeLog-9899
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config.in
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configure
Remove tic80 support
2019-12-17 16:36:54 +10:30
configure.ac
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configure.com
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2020-01-01 18:42:54 +10:30
cr16-dis.c
ubsan: cr16: left shift cannot be represented in type 'int'
2020-01-04 19:20:33 +10:30
cr16-opc.c
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2020-01-01 18:42:54 +10:30
cris-dis.c
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cris-opc.c
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2020-01-01 18:42:54 +10:30
crx-dis.c
ubsan: crx: left shift cannot be represented in type 'int'
2020-01-04 19:20:33 +10:30
crx-opc.c
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2020-01-01 18:42:54 +10:30
csky-dis.c
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csky-opc.h
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d10v-dis.c
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d10v-opc.c
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d30v-dis.c
ubsan: d30v: left shift cannot be represented in type 'int'
2020-01-04 19:20:33 +10:30
d30v-opc.c
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dep-in.sed
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dis-buf.c
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dis-init.c
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disassemble.c
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disassemble.h
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dlx-dis.c
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epiphany-asm.c
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epiphany-desc.c
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epiphany-desc.h
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epiphany-dis.c
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epiphany-ibld.c
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epiphany-opc.c
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epiphany-opc.h
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fr30-asm.c
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fr30-desc.c
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fr30-desc.h
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fr30-dis.c
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fr30-ibld.c
ubsan: fr30: left shift of negative value
2020-01-13 12:12:05 +10:30
fr30-opc.c
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fr30-opc.h
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frv-asm.c
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frv-desc.c
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frv-desc.h
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frv-dis.c
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frv-ibld.c
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frv-opc.c
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frv-opc.h
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ft32-dis.c
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ft32-opc.c
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h8300-dis.c
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hppa-dis.c
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2020-01-01 18:42:54 +10:30
i386-dis-evex-len.h
i386: Check vector length for scatter/gather prefetch instructions
2019-06-27 13:39:32 -07:00
i386-dis-evex-mod.h
x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}
2019-07-01 08:23:41 +02:00
i386-dis-evex-prefix.h
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
i386-dis-evex-reg.h
i386: Break i386-dis-evex.h into small files
2019-06-21 13:18:41 -07:00
i386-dis-evex-w.h
x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}
2019-07-01 08:23:41 +02:00
i386-dis-evex.h
i386: Break i386-dis-evex.h into small files
2019-06-21 13:18:41 -07:00
i386-dis.c
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
i386-gen.c
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i386-init.h
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i386-opc.c
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i386-opc.h
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i386-opc.tbl
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
i386-reg.tbl
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2020-01-01 18:42:54 +10:30
i386-tbl.h
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
ia64-asmtab.c
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ia64-asmtab.h
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ia64-dis.c
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ia64-gen.c
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ia64-ic.tbl
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ia64-opc-a.c
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ia64-opc-b.c
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ia64-opc-d.c
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ia64-opc-f.c
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ia64-opc-i.c
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ia64-opc-m.c
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ia64-opc-x.c
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ia64-opc.c
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ia64-opc.h
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ia64-raw.tbl
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ia64-war.tbl
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ia64-waw.tbl
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ip2k-asm.c
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ip2k-desc.c
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ip2k-desc.h
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ip2k-dis.c
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ip2k-ibld.c
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ip2k-opc.c
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ip2k-opc.h
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iq2000-asm.c
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iq2000-desc.c
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iq2000-desc.h
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iq2000-dis.c
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iq2000-ibld.c
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iq2000-opc.c
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iq2000-opc.h
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lm32-asm.c
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lm32-desc.c
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lm32-desc.h
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lm32-dis.c
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lm32-ibld.c
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lm32-opc.c
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lm32-opc.h
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lm32-opinst.c
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m32c-asm.c
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m32c-desc.c
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m32c-desc.h
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m32c-dis.c
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m32c-ibld.c
ubsan: m32c: left shift of negative value
2020-01-06 21:53:51 +10:30
m32c-opc.c
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m32c-opc.h
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m32r-asm.c
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m32r-desc.c
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m32r-desc.h
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m32r-dis.c
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m32r-ibld.c
ubsan: m32r: left shift of negative value
2020-01-04 19:20:33 +10:30
m32r-opc.c
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m32r-opc.h
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m32r-opinst.c
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m68hc11-dis.c
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m68hc11-opc.c
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m68k-dis.c
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m68k-opc.c
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m10200-dis.c
ubsan: m10300: shift exponent -4
2020-01-10 17:32:33 +10:30
m10200-opc.c
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m10300-dis.c
ubsan: m10300: shift exponent -4
2020-01-10 17:32:33 +10:30
m10300-opc.c
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MAINTAINERS
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Makefile.am
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Makefile.in
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makefile.vms
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mcore-dis.c
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mcore-opc.h
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mep-asm.c
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mep-desc.c
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mep-desc.h
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mep-dis.c
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mep-ibld.c
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mep-opc.c
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mep-opc.h
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metag-dis.c
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microblaze-dis.c
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microblaze-dis.h
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microblaze-opc.h
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microblaze-opcm.h
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micromips-opc.c
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mips16-opc.c
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mips-dis.c
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mips-formats.h
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mips-opc.c
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mmix-dis.c
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mmix-opc.c
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moxie-dis.c
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moxie-opc.c
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msp430-decode.c
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msp430-decode.opc
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msp430-dis.c
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mt-asm.c
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mt-desc.c
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mt-desc.h
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mt-dis.c
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mt-ibld.c
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mt-opc.c
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mt-opc.h
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nds32-asm.c
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nds32-asm.h
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nds32-dis.c
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nds32-opc.h
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nfp-dis.c
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nios2-dis.c
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nios2-opc.c
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ns32k-dis.c
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opc2c.c
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2020-01-01 18:42:54 +10:30
opintl.h
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2020-01-01 18:42:54 +10:30
or1k-asm.c
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2020-01-01 18:42:54 +10:30
or1k-desc.c
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2020-01-01 18:42:54 +10:30
or1k-desc.h
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2020-01-01 18:42:54 +10:30
or1k-dis.c
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2020-01-01 18:42:54 +10:30
or1k-ibld.c
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2020-01-01 18:42:54 +10:30
or1k-opc.c
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2020-01-01 18:42:54 +10:30
or1k-opc.h
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2020-01-01 18:42:54 +10:30
or1k-opinst.c
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2020-01-01 18:42:54 +10:30
pdp11-dis.c
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2020-01-01 18:42:54 +10:30
pdp11-opc.c
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2020-01-01 18:42:54 +10:30
pj-dis.c
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2020-01-01 18:42:54 +10:30
pj-opc.c
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2020-01-01 18:42:54 +10:30
ppc-dis.c
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2020-01-01 18:42:54 +10:30
ppc-opc.c
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2020-01-01 18:42:54 +10:30
pru-dis.c
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2020-01-01 18:42:54 +10:30
pru-opc.c
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2020-01-01 18:42:54 +10:30
riscv-dis.c
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2020-01-01 18:42:54 +10:30
riscv-opc.c
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2020-01-01 18:42:54 +10:30
rl78-decode.c
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2020-01-01 18:42:54 +10:30
rl78-decode.opc
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2020-01-01 18:42:54 +10:30
rl78-dis.c
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2020-01-01 18:42:54 +10:30
rx-decode.c
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2020-01-01 18:42:54 +10:30
rx-decode.opc
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2020-01-01 18:42:54 +10:30
rx-dis.c
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2020-01-01 18:42:54 +10:30
s12z-dis.c
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2020-01-01 18:42:54 +10:30
s12z-opc.c
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2020-01-01 18:42:54 +10:30
s12z-opc.h
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2020-01-01 18:42:54 +10:30
s390-dis.c
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2020-01-01 18:42:54 +10:30
s390-mkopc.c
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2020-01-01 18:42:54 +10:30
s390-opc.c
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2020-01-01 18:42:54 +10:30
s390-opc.txt
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2020-01-01 18:42:54 +10:30
score7-dis.c
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2020-01-01 18:42:54 +10:30
score-dis.c
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2020-01-01 18:42:54 +10:30
score-opc.h
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2020-01-01 18:42:54 +10:30
sh-dis.c
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2020-01-01 18:42:54 +10:30
sh-opc.h
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2020-01-01 18:42:54 +10:30
sparc-dis.c
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2020-01-01 18:42:54 +10:30
sparc-opc.c
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2020-01-01 18:42:54 +10:30
spu-dis.c
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2020-01-01 18:42:54 +10:30
spu-opc.c
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2020-01-01 18:42:54 +10:30
stamp-h.in
…
sysdep.h
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2020-01-01 18:42:54 +10:30
tic4x-dis.c
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2020-01-01 18:42:54 +10:30
tic6x-dis.c
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2020-01-01 18:42:54 +10:30
tic30-dis.c
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2020-01-01 18:42:54 +10:30
tic54x-dis.c
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2020-01-01 18:42:54 +10:30
tic54x-opc.c
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2020-01-01 18:42:54 +10:30
tilegx-dis.c
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2020-01-01 18:42:54 +10:30
tilegx-opc.c
ubsan: tilepro: signed integer overflow
2020-01-10 17:32:33 +10:30
tilepro-dis.c
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2020-01-01 18:42:54 +10:30
tilepro-opc.c
ubsan: tilepro: signed integer overflow
2020-01-10 17:32:33 +10:30
v850-dis.c
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2020-01-01 18:42:54 +10:30
v850-opc.c
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2020-01-01 18:42:54 +10:30
vax-dis.c
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2020-01-01 18:42:54 +10:30
visium-dis.c
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2020-01-01 18:42:54 +10:30
visium-opc.c
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2020-01-01 18:42:54 +10:30
wasm32-dis.c
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2020-01-01 18:42:54 +10:30
xc16x-asm.c
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2020-01-01 18:42:54 +10:30
xc16x-desc.c
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2020-01-01 18:42:54 +10:30
xc16x-desc.h
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2020-01-01 18:42:54 +10:30
xc16x-dis.c
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2020-01-01 18:42:54 +10:30
xc16x-ibld.c
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2020-01-01 18:42:54 +10:30
xc16x-opc.c
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2020-01-01 18:42:54 +10:30
xc16x-opc.h
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2020-01-01 18:42:54 +10:30
xgate-dis.c
ubsan: xgate: left shift of negative value
2020-01-13 12:12:05 +10:30
xgate-opc.c
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2020-01-01 18:42:54 +10:30
xstormy16-asm.c
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2020-01-01 18:42:54 +10:30
xstormy16-desc.c
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2020-01-01 18:42:54 +10:30
xstormy16-desc.h
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2020-01-01 18:42:54 +10:30
xstormy16-dis.c
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2020-01-01 18:42:54 +10:30
xstormy16-ibld.c
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2020-01-01 18:42:54 +10:30
xstormy16-opc.c
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2020-01-01 18:42:54 +10:30
xstormy16-opc.h
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2020-01-01 18:42:54 +10:30
xtensa-dis.c
Update year range in copyright notice of binutils files
2020-01-01 18:42:54 +10:30
z8k-dis.c
ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'
2020-01-08 21:51:32 +10:30
z8k-opc.h
ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'
2020-01-08 21:51:32 +10:30
z8kgen.c
ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'
2020-01-08 21:51:32 +10:30
z80-dis.c
Fix the cast used to prevent compile time warning about an always false test.
2020-01-09 14:32:49 +00:00