3d5a60de52
For mov name@GOTPCREL(%rip), %reg test %reg, name@GOTPCREL(%rip) binop name@GOTPCREL(%rip), %reg where binop is one of adc, add, add, cmp, or, sbb, sub, xor instructions, add # define R_X86_64_CODE_4_GOTPCRELX 43 if the instruction starts at 4 bytes before the relocation offset. It similar to R_X86_64_GOTPCRELX. Linker can treat R_X86_64_CODE_4_GOTPCRELX as R_X86_64_GOTPCREL or convert the above instructions to lea name(%rip), %reg mov $name, %reg test $name, %reg binop $name, %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTPCRELX. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_convert_load_reloc): Handle R_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * write.h (fix): Add fx_tcbit3. Change fx_unused to 1 bit. * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (tc_gen_reloc): Likewise. (output_disp): Set fixP->fx_tcbit3 for REX2 prefix. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTPCRELX if fixp->fx_tcbit3 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (TC_FORCE_RELOCATION_ABS): Likewise. * testsuite/gas/i386/x86-64-gotpcrel.s: Add tests for R_X86_64_CODE_4_GOTPCRELX. * testsuite/gas/i386/x86-64-localpic.s: Likewise. * testsuite/gas/i386/x86-64-gotpcrel.d: Updated. * testsuite/gas/i386/x86-64-localpic.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTPCRELX. ld/ * testsuite/ld-x86-64/apx-load1.s: New file. * testsuite/ld-x86-64/apx-load1a.d: Likewise. * testsuite/ld-x86-64/apx-load1b.d: Likewise. * testsuite/ld-x86-64/apx-load1c.d: Likewise. * testsuite/ld-x86-64/apx-load1d.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run apx-load1a, apx-load1b, apx-load1c and apx-load1d.
55 lines
2.5 KiB
Makefile
55 lines
2.5 KiB
Makefile
#source: apx-load1.s
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#as: --64 -mrelax-relocations=yes
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#ld: -melf_x86_64 -z max-page-size=0x200000 -z noseparate-code
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#objdump: -dw --sym
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.*: +file format .*
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SYMBOL TABLE:
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#...
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0+6001d0 l O .data 0+1 bar
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#...
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0+6001d1 g O .data 0+1 foo
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#...
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Disassembly of section .text:
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0+4000b0 <_start>:
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+[a-f0-9]+: d5 10 81 d0 d0 01 60 00 adc \$0x6001d0,%r16d
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+[a-f0-9]+: d5 10 81 c1 d0 01 60 00 add \$0x6001d0,%r17d
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+[a-f0-9]+: d5 10 81 e2 d0 01 60 00 and \$0x6001d0,%r18d
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+[a-f0-9]+: d5 10 81 fb d0 01 60 00 cmp \$0x6001d0,%r19d
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+[a-f0-9]+: d5 10 81 cc d0 01 60 00 or \$0x6001d0,%r20d
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+[a-f0-9]+: d5 10 81 dd d0 01 60 00 sbb \$0x6001d0,%r21d
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+[a-f0-9]+: d5 10 81 ee d0 01 60 00 sub \$0x6001d0,%r22d
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+[a-f0-9]+: d5 10 81 f7 d0 01 60 00 xor \$0x6001d0,%r23d
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+[a-f0-9]+: d5 11 f7 c0 d0 01 60 00 test \$0x6001d0,%r24d
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+[a-f0-9]+: d5 18 81 d0 d0 01 60 00 adc \$0x6001d0,%r16
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+[a-f0-9]+: d5 18 81 c1 d0 01 60 00 add \$0x6001d0,%r17
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+[a-f0-9]+: d5 18 81 e2 d0 01 60 00 and \$0x6001d0,%r18
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+[a-f0-9]+: d5 18 81 fb d0 01 60 00 cmp \$0x6001d0,%r19
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+[a-f0-9]+: d5 18 81 cc d0 01 60 00 or \$0x6001d0,%r20
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+[a-f0-9]+: d5 18 81 dd d0 01 60 00 sbb \$0x6001d0,%r21
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+[a-f0-9]+: d5 18 81 ee d0 01 60 00 sub \$0x6001d0,%r22
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+[a-f0-9]+: d5 18 81 f7 d0 01 60 00 xor \$0x6001d0,%r23
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+[a-f0-9]+: d5 19 f7 c0 d0 01 60 00 test \$0x6001d0,%r24
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+[a-f0-9]+: d5 10 81 d0 d1 01 60 00 adc \$0x6001d1,%r16d
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+[a-f0-9]+: d5 10 81 c1 d1 01 60 00 add \$0x6001d1,%r17d
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+[a-f0-9]+: d5 10 81 e2 d1 01 60 00 and \$0x6001d1,%r18d
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+[a-f0-9]+: d5 10 81 fb d1 01 60 00 cmp \$0x6001d1,%r19d
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+[a-f0-9]+: d5 10 81 cc d1 01 60 00 or \$0x6001d1,%r20d
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+[a-f0-9]+: d5 10 81 dd d1 01 60 00 sbb \$0x6001d1,%r21d
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+[a-f0-9]+: d5 10 81 ee d1 01 60 00 sub \$0x6001d1,%r22d
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+[a-f0-9]+: d5 10 81 f7 d1 01 60 00 xor \$0x6001d1,%r23d
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+[a-f0-9]+: d5 11 f7 c0 d1 01 60 00 test \$0x6001d1,%r24d
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+[a-f0-9]+: d5 18 81 d0 d1 01 60 00 adc \$0x6001d1,%r16
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+[a-f0-9]+: d5 18 81 c1 d1 01 60 00 add \$0x6001d1,%r17
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+[a-f0-9]+: d5 18 81 e2 d1 01 60 00 and \$0x6001d1,%r18
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+[a-f0-9]+: d5 18 81 fb d1 01 60 00 cmp \$0x6001d1,%r19
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+[a-f0-9]+: d5 18 81 cc d1 01 60 00 or \$0x6001d1,%r20
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+[a-f0-9]+: d5 18 81 dd d1 01 60 00 sbb \$0x6001d1,%r21
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+[a-f0-9]+: d5 18 81 ee d1 01 60 00 sub \$0x6001d1,%r22
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+[a-f0-9]+: d5 18 81 f7 d1 01 60 00 xor \$0x6001d1,%r23
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+[a-f0-9]+: d5 19 f7 c0 d1 01 60 00 test \$0x6001d1,%r24
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#pass
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