Mike Frysinger 81a3befa0a sim: mn10300: fix incorrect implementation of a few insns
Fix a few problems caught by compiler warnings:
* Some of the asr & lsr insns were setting up the c state flag,
  but then forgetting to set it in the PSW.  Add it like the other
  asr & lsr variants.
* Some of the dmulh insns were multiplying one of the source regs
  against itself instead of against the other source reg.
* The sat16_cmp parallel insn was using the wrong register in the
  compare -- the reg1 src/dst pair are used in the sat16 op, and
  the reg2 src/dst pair are used in the add op.
2023-12-15 21:14:13 -05:00
..
2022-12-25 02:09:18 -05:00
2022-12-25 02:09:18 -05:00