Print instruction description as comment in disassembly with s390 architecture specific option "insndesc": - For objdump it can be enabled with option "-M insndesc" - In gdb it can be enabled with "set disassembler-options insndesc" Since comments are not column aligned the output can enhanced for readability by postprocessing using a filter such as "expand": ... | expand -t 8,16,24,32,40,80 Or when using in combination with objdump option --visualize-jumps: ... | expand | sed -e 's/ *#/\t#/' | expand -t 1,80 Note that the instruction descriptions add about 128 KB to s390-opc.o: s390-opc.o without instruction descriptions: 216368 bytes s390-opc.o with instruction descriptions : 348432 bytes binutils/ * NEWS: Mention new s390-specific disassembler option "insndesc". include/ * opcode/s390.h (struct s390_opcode): Add field to hold instruction description. opcodes/ * s390-mkopc.c: Copy instruction description from s390-opc.txt into generated operation code table s390-opc.tab. * s390-opc.c (s390_opformats): Provide NULL as description in .insn pseudo-mnemonics opcode table. * s390-dis.c: Add s390-specific disassembler option "insndesc" and optionally print the instruction description as comment in the disassembly when it is specified. gas/ * testsuite/gas/s390/s390.exp: Add new test disassembly test case "zarch-insndesc". * testsuite/gas/s390/zarch-insndesc.s: New test case for s390- specific disassembler option "insndesc". * testsuite/gas/s390/zarch-insndesc.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
198 lines
6.0 KiB
C
198 lines
6.0 KiB
C
/* s390.h -- Header file for S390 opcode table
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Copyright (C) 2000-2023 Free Software Foundation, Inc.
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Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#ifndef S390_H
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#define S390_H
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/* List of instruction sets variations. */
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enum s390_opcode_mode_val
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{
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S390_OPCODE_ESA = 0,
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S390_OPCODE_ZARCH
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};
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enum s390_opcode_cpu_val
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{
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S390_OPCODE_G5 = 0,
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S390_OPCODE_G6,
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S390_OPCODE_Z900,
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S390_OPCODE_Z990,
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S390_OPCODE_Z9_109,
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S390_OPCODE_Z9_EC,
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S390_OPCODE_Z10,
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S390_OPCODE_Z196,
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S390_OPCODE_ZEC12,
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S390_OPCODE_Z13,
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S390_OPCODE_ARCH12,
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S390_OPCODE_ARCH13,
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S390_OPCODE_ARCH14,
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S390_OPCODE_MAXCPU
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};
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/* Values defined for the flags field of a struct s390_opcode. */
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/* Last one or two instruction operands are optional. */
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#define S390_INSTR_FLAG_OPTPARM 0x1
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#define S390_INSTR_FLAG_OPTPARM2 0x2
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/* Instruction requires a specific facility. */
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#define S390_INSTR_FLAG_HTM 0x4
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#define S390_INSTR_FLAG_VX 0x8
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#define S390_INSTR_FLAG_FACILITY_MASK 0xc
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/* Instruction annotations for jump visualization. */
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#define S390_INSTR_FLAG_CLASS_BRANCH 0x10
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#define S390_INSTR_FLAG_CLASS_RELATIVE 0x20
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#define S390_INSTR_FLAG_CLASS_CONDITIONAL 0x40
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#define S390_INSTR_FLAG_CLASS_SUBROUTINE 0x80
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#define S390_INSTR_FLAG_CLASS_MASK 0xf0
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#define S390_INSTR_FLAGS_CLASS_JUMP \
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(S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE)
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#define S390_INSTR_FLAGS_CLASS_CONDJUMP \
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(S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE \
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| S390_INSTR_FLAG_CLASS_CONDITIONAL)
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#define S390_INSTR_FLAGS_CLASS_JUMPSR \
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(S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE \
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| S390_INSTR_FLAG_CLASS_SUBROUTINE)
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/* The opcode table is an array of struct s390_opcode. */
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struct s390_opcode
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{
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/* The opcode name (mnemonic). */
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const char * name;
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/* The opcode itself. Those bits which will be filled in with
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operands are zeroes. */
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unsigned char opcode[6];
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/* The opcode mask. This is used by the disassembler. This is a
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mask containing ones indicating those bits which must match the
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opcode field, and zeroes indicating those bits which need not
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match (and are presumably filled in by operands). */
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unsigned char mask[6];
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/* The opcode length in bytes. */
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int oplen;
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/* An array of operand codes. Each code is an index into the
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operand table. They appear in the order which the operands must
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appear in assembly code, and are terminated by a zero. */
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unsigned char operands[6];
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/* Bitmask of execution modes this opcode is available for. */
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unsigned int modes;
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/* First cpu this opcode is available for. */
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enum s390_opcode_cpu_val min_cpu;
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/* Instruction specific flags. */
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unsigned int flags;
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/* Instruction description. */
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const char * description;
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};
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/* The table itself is sorted by major opcode number, and is otherwise
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in the order in which the disassembler should consider
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instructions. */
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extern const struct s390_opcode s390_opcodes[];
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extern const int s390_num_opcodes;
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/* A opcode format table for the .insn pseudo mnemonic. */
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extern const struct s390_opcode s390_opformats[];
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extern const int s390_num_opformats;
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/* The operands table is an array of struct s390_operand. */
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struct s390_operand
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{
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/* The number of bits in the operand. */
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int bits;
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/* How far the operand is left shifted in the instruction. */
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int shift;
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/* One bit syntax flags. */
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unsigned long flags;
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};
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/* Elements in the table are retrieved by indexing with values from
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the operands field of the s390_opcodes table. */
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extern const struct s390_operand s390_operands[];
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/* Values defined for the flags field of a struct s390_operand. */
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/* This operand names a register. The disassembler uses this to print
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register names with a leading 'r'. */
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#define S390_OPERAND_GPR 0x1
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/* This operand names a floating point register. The disassembler
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prints these with a leading 'f'. */
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#define S390_OPERAND_FPR 0x2
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/* This operand names an access register. The disassembler
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prints these with a leading 'a'. */
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#define S390_OPERAND_AR 0x4
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/* This operand names a control register. The disassembler
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prints these with a leading 'c'. */
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#define S390_OPERAND_CR 0x8
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/* This operand is a displacement. */
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#define S390_OPERAND_DISP 0x10
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/* This operand names a base register. */
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#define S390_OPERAND_BASE 0x20
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/* This operand names an index register, it can be skipped. */
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#define S390_OPERAND_INDEX 0x40
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/* This operand is a relative branch displacement. The disassembler
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prints these symbolically if possible. */
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#define S390_OPERAND_PCREL 0x80
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/* This operand takes signed values. */
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#define S390_OPERAND_SIGNED 0x100
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/* This operand is a length. */
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#define S390_OPERAND_LENGTH 0x200
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/* The operand needs to be a valid GP or FP register pair. */
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#define S390_OPERAND_REG_PAIR 0x400
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/* This operand names a vector register. The disassembler uses this
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to print register names with a leading 'v'. */
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#define S390_OPERAND_VR 0x800
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#define S390_OPERAND_CP16 0x1000
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#define S390_OPERAND_OR1 0x2000
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#define S390_OPERAND_OR2 0x4000
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#define S390_OPERAND_OR8 0x8000
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#endif /* S390_H */
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