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arm: Mve backend + testsuite fixes 2

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Hi all,

this patch improves a number of MVE tests in the testsuite for more
precise and better coverage using check-function-bodies instead of
scan-assembler checks.  Also all intrusctions prescribed in the
ACLE[1] are now checked.

Also a number of simple fixes are done in the backend to fix
capitalization and spacing.

Best Regards

  Andrea

[1] <https://github.com/ARM-software/acle>

gcc/ChangeLog:

	* config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
	(mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
	(mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
	(mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
	(mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
	(mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
	(mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
	(mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
	(mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
	(mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
	(mve_vbicq_n_<supf><mode>, mve_vctp<MVE_vctp>q_m<MVE_vpred>)
	(mve_vcvtbq_f16_f32v8hf, mve_vcvttq_f16_f32v8hf)
	(mve_veorq_f<mode>, mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
	(mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
	(mve_vrmlaldavhxq_sv4si, mve_vbicq_m_n_<supf><mode>)
	(mve_vcvtq_m_to_f_<supf><mode>, mve_vshlcq_<supf><mode>)
	(mve_vmvnq_m_<supf><mode>, mve_vpselq_<supf><mode>)
	(mve_vcvtbq_m_f16_f32v8hf, mve_vcvtbq_m_f32_f16v4sf)
	(mve_vcvttq_m_f16_f32v8hf, mve_vcvttq_m_f32_f16v4sf)
	(mve_vmlaldavq_p_<supf><mode>, mve_vmlsldavaq_s<mode>)
	(mve_vmlsldavaxq_s<mode>, mve_vmlsldavq_p_s<mode>)
	(mve_vmlsldavxq_p_s<mode>, mve_vmvnq_m_n_<supf><mode>)
	(mve_vorrq_m_n_<supf><mode>, mve_vpselq_f<mode>)
	(mve_vrev32q_m_fv8hf, mve_vrev32q_m_<supf><mode>)
	(mve_vrev64q_m_f<mode>, mve_vrmlaldavhaxq_sv4si)
	(mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhaxq_sv4si)
	(mve_vrmlsldavhq_p_sv4si, mve_vrmlsldavhxq_p_sv4si)
	(mve_vrev16q_m_<supf>v16qi, mve_vrmlaldavhq_p_<supf>v4si)
	(mve_vrmlsldavhaq_sv4si, mve_vandq_m_<supf><mode>)
	(mve_vbicq_m_<supf><mode>, mve_veorq_m_<supf><mode>)
	(mve_vornq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
	(mve_vandq_m_f<mode>, mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>)
	(mve_vornq_m_f<mode>, mve_vorrq_m_f<mode>)
	(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
	(mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
	capitalization in the emitted asm.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/asrl.c: Use
	check-function-bodies instead of scan-assembler checks.  Use
	extern "C" for C++ testing.
	* gcc.target/arm/mve/intrinsics/lsll.c: Likewise.
	* gcc.target/arm/mve/intrinsics/sqrshr.c: Likewise.
	* gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c: Likewise.
	* gcc.target/arm/mve/intrinsics/sqshl.c: Likewise.
	* gcc.target/arm/mve/intrinsics/sqshll.c: Likewise.
	* gcc.target/arm/mve/intrinsics/srshr.c: Likewise.
	* gcc.target/arm/mve/intrinsics/srshrl.c: Likewise.
	* gcc.target/arm/mve/intrinsics/uqrshl.c: Likewise.
	* gcc.target/arm/mve/intrinsics/uqrshll_sat48.c: Likewise.
	* gcc.target/arm/mve/intrinsics/uqshl.c: Likewise.
	* gcc.target/arm/mve/intrinsics/uqshll.c: Likewise.
	* gcc.target/arm/mve/intrinsics/urshr.c: Likewise.
	* gcc.target/arm/mve/intrinsics/urshrl.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadciq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadciq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadcq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vadcq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vandq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp16q.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp16q_m.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp32q.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp32q_m.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp64q.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp64q_m.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp8q.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vctp8q_m.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/veorq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmsq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmsq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmladavxq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovnbq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmovntq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vornq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vorrq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpnot.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vpselq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovntq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshlq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshlq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev16q_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev16q_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndaq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndaq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndmq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndmq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndnq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndnq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndpq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndpq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndxq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndxq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlcq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_r_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_r_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_r_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_r_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_r_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_r_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshlq_x_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsliq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vsriq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_p_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vst1q_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: Likewise.
This commit is contained in:
Andrea Corallo 2023-04-19 18:08:57 +02:00 committed by Stam Markianos-Wright
parent 8a4293d284
commit a3010f71d4
1069 changed files with 27457 additions and 3534 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

146
gcc/config/arm/mve.md
View File

@ -141,7 +141,7 @@
VRNDQ_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vrintzt.f%#<V_sz_elem> %q0, %q2"
"vpst\;vrintzt.f%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -239,7 +239,7 @@
VREV64Q_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vrev64.%#<V_sz_elem> %q0, %q1"
"vrev64.%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -293,7 +293,7 @@
VREV32Q_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vrev32.16 %q0, %q1"
"vrev32.16\t%q0, %q1"
[(set_attr "type" "mve_move")
])
;;
@ -306,7 +306,7 @@
VCVTTQ_F32_F16))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtt.f32.f16 %q0, %q1"
"vcvtt.f32.f16\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -320,7 +320,7 @@
VCVTBQ_F32_F16))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtb.f32.f16 %q0, %q1"
"vcvtb.f32.f16\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -334,7 +334,7 @@
VCVTQ_TO_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvt.f%#<V_sz_elem>.<supf>%#<V_sz_elem> %q0, %q1"
"vcvt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -348,7 +348,7 @@
VREV64Q))
]
"TARGET_HAVE_MVE"
"vrev64.%#<V_sz_elem> %q0, %q1"
"vrev64.%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -362,7 +362,7 @@
VCVTQ_FROM_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvt.<supf>%#<V_sz_elem>.f%#<V_sz_elem> %q0, %q1"
"vcvt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
;; [vqnegq_s])
@ -524,7 +524,7 @@
VMOVLTQ))
]
"TARGET_HAVE_MVE"
"vmovlt.<supf>%#<V_sz_elem> %q0, %q1"
"vmovlt.<supf>%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -538,7 +538,7 @@
VMOVLBQ))
]
"TARGET_HAVE_MVE"
"vmovlb.<supf>%#<V_sz_elem> %q0, %q1"
"vmovlb.<supf>%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -552,7 +552,7 @@
VCVTPQ))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtp.<supf>%#<V_sz_elem>.f%#<V_sz_elem> %q0, %q1"
"vcvtp.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -566,7 +566,7 @@
VCVTNQ))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtn.<supf>%#<V_sz_elem>.f%#<V_sz_elem> %q0, %q1"
"vcvtn.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -580,7 +580,7 @@
VCVTMQ))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtm.<supf>%#<V_sz_elem>.f%#<V_sz_elem> %q0, %q1"
"vcvtm.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -594,7 +594,7 @@
VCVTAQ))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvta.<supf>%#<V_sz_elem>.f%#<V_sz_elem> %q0, %q1"
"vcvta.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -608,7 +608,7 @@
VMVNQ_N))
]
"TARGET_HAVE_MVE"
"vmvn.i%#<V_sz_elem> %q0, %1"
"vmvn.i%#<V_sz_elem>\t%q0, %1"
[(set_attr "type" "mve_move")
])
@ -622,7 +622,7 @@
VREV16Q))
]
"TARGET_HAVE_MVE"
"vrev16.8 %q0, %q1"
"vrev16.8\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@ -650,7 +650,7 @@
VCTP))
]
"TARGET_HAVE_MVE"
"vctp.<MVE_vctp> %1"
"vctp.<MVE_vctp>\t%1"
[(set_attr "type" "mve_move")
])
@ -694,7 +694,7 @@
VBRSRQ_N_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vbrsr.<V_sz_elem> %q0, %q1, %2"
"vbrsr.<V_sz_elem>\t%q0, %q1, %2"
[(set_attr "type" "mve_move")
])
@ -976,7 +976,7 @@
VBRSRQ_N))
]
"TARGET_HAVE_MVE"
"vbrsr.%#<V_sz_elem> %q0, %q1, %2"
"vbrsr.%#<V_sz_elem>\t%q0, %q1, %2"
[(set_attr "type" "mve_move")
])
@ -1864,7 +1864,7 @@
(match_operand:MVE_0 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vand %q0, %q1, %q2"
"vand\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -1878,7 +1878,7 @@
(match_operand:MVE_0 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vbic %q0, %q1, %q2"
"vbic\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -1893,7 +1893,7 @@
VBICQ_N))
]
"TARGET_HAVE_MVE"
"vbic.i%#<V_sz_elem> %q0, %2"
"vbic.i%#<V_sz_elem>\t%q0, %2"
[(set_attr "type" "mve_move")
])
@ -1967,7 +1967,7 @@
VCTP_M))
]
"TARGET_HAVE_MVE"
"vpst\;vctpt.<MVE_vctp> %1"
"vpst\;vctpt.<MVE_vctp>\t%1"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -1982,7 +1982,7 @@
VCVTBQ_F16_F32))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtb.f16.f32 %q0, %q2"
"vcvtb.f16.f32\t%q0, %q2"
[(set_attr "type" "mve_move")
])
@ -1997,7 +1997,7 @@
VCVTTQ_F16_F32))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vcvtt.f16.f32 %q0, %q2"
"vcvtt.f16.f32\t%q0, %q2"
[(set_attr "type" "mve_move")
])
@ -2011,7 +2011,7 @@
(match_operand:MVE_0 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"veor %q0, %q1, %q2"
"veor\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2159,7 +2159,7 @@
VMLALDAVXQ_S))
]
"TARGET_HAVE_MVE"
"vmlaldavx.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
"vmlaldavx.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2174,7 +2174,7 @@
VMLSLDAVQ_S))
]
"TARGET_HAVE_MVE"
"vmlsldav.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
"vmlsldav.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2189,7 +2189,7 @@
VMLSLDAVXQ_S))
]
"TARGET_HAVE_MVE"
"vmlsldavx.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
"vmlsldavx.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2262,7 +2262,7 @@
(match_operand:MVE_0 1 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vorn %q0, %q1, %q2"
"vorn\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2276,7 +2276,7 @@
(match_operand:MVE_0 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vorr %q0, %q1, %q2"
"vorr\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2426,7 +2426,7 @@
VRMLALDAVHXQ_S))
]
"TARGET_HAVE_MVE"
"vrmlaldavhx.s32 %Q0, %R0, %q1, %q2"
"vrmlaldavhx.s32\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -2561,7 +2561,7 @@
VBICQ_M_N))
]
"TARGET_HAVE_MVE"
"vpst\;vbict.i%#<V_sz_elem> %q0, %2"
"vpst\;vbict.i%#<V_sz_elem>\t%q0, %2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
;;
@ -2606,7 +2606,7 @@
VCVTQ_M_TO_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vcvtt.f%#<V_sz_elem>.<supf>%#<V_sz_elem> %q0, %q2"
"vpst\;vcvtt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
;;
@ -2714,7 +2714,7 @@
(match_dup 4)]
VSHLCQ))]
"TARGET_HAVE_MVE"
"vshlc %q0, %1, %4")
"vshlc\t%q0, %1, %4")
;;
;; [vabsq_m_s])
@ -3272,7 +3272,7 @@
VMVNQ_M))
]
"TARGET_HAVE_MVE"
"vpst\;vmvnt %q0, %q2"
"vpst\;vmvnt\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -3304,7 +3304,7 @@
VPSELQ))
]
"TARGET_HAVE_MVE"
"vpsel %q0, %q1, %q2"
"vpsel\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -3929,7 +3929,7 @@
VCVTBQ_M_F16_F32))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vcvtbt.f16.f32 %q0, %q2"
"vpst\;vcvtbt.f16.f32\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -3945,7 +3945,7 @@
VCVTBQ_M_F32_F16))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vcvtbt.f32.f16 %q0, %q2"
"vpst\;vcvtbt.f32.f16\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -3961,7 +3961,7 @@
VCVTTQ_M_F16_F32))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vcvttt.f16.f32 %q0, %q2"
"vpst\;vcvttt.f16.f32\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -3977,7 +3977,7 @@
VCVTTQ_M_F32_F16))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vcvttt.f32.f16 %q0, %q2"
"vpst\;vcvttt.f32.f16\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4197,7 +4197,7 @@
VMLALDAVQ_P))
]
"TARGET_HAVE_MVE"
"vpst\;vmlaldavt.<supf>%#<V_sz_elem> %Q0, %R0, %q1, %q2"
"vpst\;vmlaldavt.<supf>%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4228,7 +4228,7 @@
VMLSLDAVAQ_S))
]
"TARGET_HAVE_MVE"
"vmlsldava.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
"vmlsldava.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@ -4244,7 +4244,7 @@
VMLSLDAVAXQ_S))
]
"TARGET_HAVE_MVE"
"vmlsldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
"vmlsldavax.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@ -4260,7 +4260,7 @@
VMLSLDAVQ_P_S))
]
"TARGET_HAVE_MVE"
"vpst\;vmlsldavt.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
"vpst\;vmlsldavt.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4276,7 +4276,7 @@
VMLSLDAVXQ_P_S))
]
"TARGET_HAVE_MVE"
"vpst\;vmlsldavxt.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
"vpst\;vmlsldavxt.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
;;
@ -4353,7 +4353,7 @@
VMVNQ_M_N))
]
"TARGET_HAVE_MVE"
"vpst\;vmvnt.i%#<V_sz_elem> %q0, %2"
"vpst\;vmvnt.i%#<V_sz_elem>\t%q0, %2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
;;
@ -4384,7 +4384,7 @@
VORRQ_M_N))
]
"TARGET_HAVE_MVE"
"vpst\;vorrt.i%#<V_sz_elem> %q0, %2"
"vpst\;vorrt.i%#<V_sz_elem>\t%q0, %2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
;;
@ -4399,7 +4399,7 @@
VPSELQ_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpsel %q0, %q1, %q2"
"vpsel\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@ -4575,7 +4575,7 @@
VREV32Q_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vrev32t.16 %q0, %q2"
"vpst\;vrev32t.16\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4591,7 +4591,7 @@
VREV32Q_M))
]
"TARGET_HAVE_MVE"
"vpst\;vrev32t.%#<V_sz_elem> %q0, %q2"
"vpst\;vrev32t.%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4607,7 +4607,7 @@
VREV64Q_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vrev64t.%#<V_sz_elem> %q0, %q2"
"vpst\;vrev64t.%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4623,7 +4623,7 @@
VRMLALDAVHAXQ_S))
]
"TARGET_HAVE_MVE"
"vrmlaldavhax.s32 %Q0, %R0, %q2, %q3"
"vrmlaldavhax.s32\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@ -4639,7 +4639,7 @@
VRMLALDAVHXQ_P_S))
]
"TARGET_HAVE_MVE"
"vpst\;vrmlaldavhxt.s32 %Q0, %R0, %q1, %q2"
"vpst\;vrmlaldavhxt.s32\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4655,7 +4655,7 @@
VRMLSLDAVHAXQ_S))
]
"TARGET_HAVE_MVE"
"vrmlsldavhax.s32 %Q0, %R0, %q2, %q3"
"vrmlsldavhax.s32\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@ -4671,7 +4671,7 @@
VRMLSLDAVHQ_P_S))
]
"TARGET_HAVE_MVE"
"vpst\;vrmlsldavht.s32 %Q0, %R0, %q1, %q2"
"vpst\;vrmlsldavht.s32\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4687,7 +4687,7 @@
VRMLSLDAVHXQ_P_S))
]
"TARGET_HAVE_MVE"
"vpst\;vrmlsldavhxt.s32 %Q0, %R0, %q1, %q2"
"vpst\;vrmlsldavhxt.s32\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4912,7 +4912,7 @@
VREV16Q_M))
]
"TARGET_HAVE_MVE"
"vpst\;vrev16t.8 %q0, %q2"
"vpst\;vrev16t.8\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4944,7 +4944,7 @@
VRMLALDAVHQ_P))
]
"TARGET_HAVE_MVE"
"vpst\;vrmlaldavht.<supf>32 %Q0, %R0, %q1, %q2"
"vpst\;vrmlaldavht.<supf>32\t%Q0, %R0, %q1, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -4960,7 +4960,7 @@
VRMLSLDAVHAQ_S))
]
"TARGET_HAVE_MVE"
"vrmlsldavha.s32 %Q0, %R0, %q2, %q3"
"vrmlsldavha.s32\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@ -5129,7 +5129,7 @@
VANDQ_M))
]
"TARGET_HAVE_MVE"
"vpst\;vandt %q0, %q2, %q3"
"vpst\;vandt\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -5146,7 +5146,7 @@
VBICQ_M))
]
"TARGET_HAVE_MVE"
"vpst\;vbict %q0, %q2, %q3"
"vpst\;vbict\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -5214,7 +5214,7 @@
VEORQ_M))
]
"TARGET_HAVE_MVE"
"vpst\;veort %q0, %q2, %q3"
"vpst\;veort\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -5469,7 +5469,7 @@
VORNQ_M))
]
"TARGET_HAVE_MVE"
"vpst\;vornt %q0, %q2, %q3"
"vpst\;vornt\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -5486,7 +5486,7 @@
VORRQ_M))
]
"TARGET_HAVE_MVE"
"vpst\;vorrt %q0, %q2, %q3"
"vpst\;vorrt\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -6658,7 +6658,7 @@
VANDQ_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vandt %q0, %q2, %q3"
"vpst\;vandt\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -6675,7 +6675,7 @@
VBICQ_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vbict %q0, %q2, %q3"
"vpst\;vbict\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -6879,7 +6879,7 @@
VEORQ_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;veort %q0, %q2, %q3"
"vpst\;veort\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -7032,7 +7032,7 @@
VORNQ_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vornt %q0, %q2, %q3"
"vpst\;vornt\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -7049,7 +7049,7 @@
VORRQ_M_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;vorrt %q0, %q2, %q3"
"vpst\;vorrt\t%q0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@ -8492,7 +8492,7 @@
(match_operand:V2QI 3 "vpr_register_operand" "Up")]
VSTRDSSOQ))]
"TARGET_HAVE_MVE"
"vpst\;vstrdt.64\t%q2, [%0, %q1, UXTW #3]"
"vpst\;vstrdt.64\t%q2, [%0, %q1, uxtw #3]"
[(set_attr "length" "8")])
;;
@ -8521,7 +8521,7 @@
(match_operand:V2DI 2 "s_register_operand" "w")]
VSTRDSSOQ))]
"TARGET_HAVE_MVE"
"vstrd.64\t%q2, [%0, %q1, UXTW #3]"
"vstrd.64\t%q2, [%0, %q1, uxtw #3]"
[(set_attr "length" "4")])
;;
@ -9473,7 +9473,7 @@
ops[0] = operands[1];
ops[1] = operands[2];
ops[2] = operands[3];
output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops);
output_asm_insn ("vpst\;vstrdt.u64\t%q2, [%q0, %1]!",ops);
return "";
}
[(set_attr "length" "8")])

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** asrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int64_t
asrl_reg (int64_t longval3, int32_t x)
foo (int64_t value, int32_t shift)
{
return asrl (longval3, x);
return asrl (value, shift);
}
/* { dg-final { scan-assembler "asrl\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** lsll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint64_t
lsll_reg (uint64_t longval3, int32_t x)
foo (uint64_t value, int32_t shift)
{
return lsll (longval3, x);
return lsll (value, shift);
}
/* { dg-final { scan-assembler "lsll\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
/*
**foo1:
** ...
** lsll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint64_t
foo1 (int32_t shift)
{
return lsll (1, shift);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** sqrshr (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32_t
sqrshr_reg (int32_t longval3, int32_t x)
foo (int32_t value, int32_t shift)
{
return sqrshr (longval3, x);
return sqrshr (value, shift);
}
/* { dg-final { scan-assembler "sqrshr\\tr\[0-9\]+, r\[0-9\]+" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** sqrshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int64_t
sqrshrl_reg (int64_t longval3, int32_t x)
foo (int64_t value, int32_t shift)
{
return sqrshrl_sat48 (longval3, x);
return sqrshrl_sat48 (value, shift);
}
/* { dg-final { scan-assembler "sqrshrl\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** sqshl (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
** ...
*/
int32_t
sqshl_imm (int32_t longval3)
foo (int32_t value)
{
return sqshl (longval3, 25);
return sqshl (value, 1);
}
/* { dg-final { scan-assembler "sqshl\\tr\[0-9\]+, #25" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** sqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
** ...
*/
int64_t
sqshll_imm(int64_t value)
foo (int64_t value)
{
return sqshll (value, 21);
return sqshll (value, 1);
}
/* { dg-final { scan-assembler "sqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** srshr (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
int32_t
srshr_imm (int32_t longval3)
foo (int32_t value)
{
return srshr (longval3, 25);
return srshr (value, 1);
}
/* { dg-final { scan-assembler "srshr\\tr\[0-9\]+, #25" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

21
gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c
View File

@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** srshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
int64_t
srshrl_imm(int64_t value)
foo (int64_t value)
{
return srshrl (value, 21);
return srshrl (value, 1);
}
/* { dg-final { scan-assembler "srshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** uqrshl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint32_t
uqrshl_reg (uint32_t longval3, int32_t x)
foo (uint32_t value, int32_t shift)
{
return uqrshl (longval3, x);
return uqrshl (value, shift);
}
/* { dg-final { scan-assembler "uqrshl\\tr\[0-9\]+, r\[0-9\]+" } } */
/*
**foo1:
** ...
** uqrshl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint32_t
foo1 (int32_t shift)
{
return uqrshl (1, shift);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** uqrshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint64_t
uqrshll_reg (uint64_t longval3, int32_t x)
foo (uint64_t value, int32_t shift)
{
return uqrshll_sat48 (longval3, x);
return uqrshll_sat48 (value, shift);
}
/* { dg-final { scan-assembler "uqrshll\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */
/*
**foo1:
** ...
** uqrshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint64_t
foo1 (int32_t shift)
{
return uqrshll_sat48 (1, shift);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** uqshl (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint32_t
uqshl_imm (uint32_t longval3)
foo (uint32_t value)
{
return uqshl (longval3, 21);
return uqshl (value, 1);
}
/* { dg-final { scan-assembler "uqshl\\tr\[0-9\]+, #21" } } */
/*
**foo1:
** ...
** uqshl (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint32_t
foo1 ()
{
return uqshl (1, 1);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** uqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint64_t
uqshll_imm(uint64_t value)
foo (uint64_t value)
{
return uqshll (value, 21);
return uqshll (value, 1);
}
/* { dg-final { scan-assembler "uqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
/*
**foo1:
** ...
** uqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint64_t
foo1 ()
{
return uqshll (1, 1);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

35
gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
uint64_t
urshr_imm (uint32_t longval3)
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** urshr (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint32_t
foo (uint32_t value)
{
return urshr (longval3, 21);
return urshr (value, 1);
}
/* { dg-final { scan-assembler "urshr\\tr\[0-9\]+, #21" } } */
/*
**foo1:
** ...
** urshr (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint32_t
foo1 ()
{
return urshr (1, 1);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c
View File

@ -1,13 +1,40 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** urshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint64_t
urshrl_imm(uint64_t value)
foo (uint64_t value)
{
return urshrl (value, 21);
return urshrl (value, 1);
}
/* { dg-final { scan-assembler "urshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
/*
**foo1:
** ...
** urshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|)
** ...
*/
uint64_t
foo1 ()
{
return urshrl (1, 1);
}
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

50
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c
View File

@ -1,23 +1,61 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
{
return vadciq_m_s32 (inactive, a, b, carry_out, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadcit.i32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
{
return vadciq_m (inactive, a, b, carry_out, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadcit.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

50
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c
View File

@ -1,23 +1,61 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
{
return vadciq_m_u32 (inactive, a, b, carry_out, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadcit.i32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
{
return vadciq_m (inactive, a, b, carry_out, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadcit.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

40
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c
View File

@ -1,21 +1,53 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32x4_t b, unsigned * carry_out)
foo (int32x4_t a, int32x4_t b, unsigned *carry_out)
{
return vadciq_s32 (a, b, carry_out);
}
/* { dg-final { scan-assembler "vadci.i32" } } */
/*
**foo1:
** ...
** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out)
foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out)
{
return vadciq (a, b, carry_out);
}
/* { dg-final { scan-assembler "vadci.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

40
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c
View File

@ -1,21 +1,53 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
{
return vadciq_u32 (a, b, carry_out);
}
/* { dg-final { scan-assembler "vadci.i32" } } */
/*
**foo1:
** ...
** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
{
return vadciq (a, b, carry_out);
}
/* { dg-final { scan-assembler "vadci.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

62
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c
View File

@ -1,23 +1,73 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
{
return vadcq_m_s32 (inactive, a, b, carry, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadct.i32" } } */
/*
**foo1:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
{
return vadcq_m (inactive, a, b, carry, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadct.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

62
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c
View File

@ -1,23 +1,73 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
{
return vadcq_m_u32 (inactive, a, b, carry, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadct.i32" } } */
/*
**foo1:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
{
return vadcq_m (inactive, a, b, carry, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vadct.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

52
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c
View File

@ -1,21 +1,65 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32x4_t b, unsigned * carry)
foo (int32x4_t a, int32x4_t b, unsigned *carry)
{
return vadcq_s32 (a, b, carry);
}
/* { dg-final { scan-assembler "vadc.i32" } } */
/*
**foo1:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, unsigned * carry)
foo1 (int32x4_t a, int32x4_t b, unsigned *carry)
{
return vadcq (a, b, carry);
}
/* { dg-final { scan-assembler "vadc.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

52
gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c
View File

@ -1,21 +1,65 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, unsigned * carry)
foo (uint32x4_t a, uint32x4_t b, unsigned *carry)
{
return vadcq_u32 (a, b, carry);
}
/* { dg-final { scan-assembler "vadc.i32" } } */
/*
**foo1:
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|)
** ...
** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|)
** ...
** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|)
** ...
** and (?:ip|fp|r[0-9]+), #1(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry)
foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry)
{
return vadcq (a, b, carry);
}
/* { dg-final { scan-assembler "vadc.i32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vandq_f16 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vandq_f32 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vandq_m_f16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vandq_m_f32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vandq_m_s16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vandq_m_s32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vandq_m_s8 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vandq_m_u16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vandq_m_u32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vandq_m_u8 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vandq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vandq_s16 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vandq_s32 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vandq_s8 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vandq_u16 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vandq_u32 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vandq_u8 (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
/*
**foo1:
** ...
** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vandq (a, b);
}
/* { dg-final { scan-assembler "vand" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vandq_x_f16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vandq_x_f32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vandq_x_s16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vandq_x_s32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vandq_x_s8 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vandq_x_u16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vandq_x_u32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vandq_x_u8 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vandt" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vandq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vbicq_f16 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vbicq_f32 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vbicq_m_f16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vbicq_m_f32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

37
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, mve_pred16_t p)
{
return vbicq_m_n_s16 (a, 16, p);
return vbicq_m_n_s16 (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict.i16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, mve_pred16_t p)
{
return vbicq_m_n (a, 16, p);
return vbicq_m_n (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, mve_pred16_t p)
{
return vbicq_m_n_s32 (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict.i32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, mve_pred16_t p)
{
return vbicq_m_n (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a, mve_pred16_t p)
{
return vbicq_m_n_u16 (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict.i16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a, mve_pred16_t p)
{
return vbicq_m_n (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, mve_pred16_t p)
{
return vbicq_m_n_u32 (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict.i32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, mve_pred16_t p)
{
return vbicq_m_n (a, 1, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vbicq_m_s16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vbicq_m_s32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vbicq_m_s8 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vbicq_m_u16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vbicq_m_u32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vbicq_m_u8 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vbicq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
View File

@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a)
{
return vbicq_n_s16 (a, 1);
}
/*
**foo1:
** ...
** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a)
{
return vbicq (a, 1);
}
/* { dg-final { scan-assembler-times "vbic.i16" 2 } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
View File

@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a)
{
return vbicq_n_s32 (a, 1);
}
/*
**foo1:
** ...
** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a)
{
return vbicq (a, 1);
}
/* { dg-final { scan-assembler-times "vbic.i32" 2 } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
View File

@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a)
{
return vbicq_n_u16 (a, 1);
}
/*
**foo1:
** ...
** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a)
{
return vbicq (a, 1);
}
/* { dg-final { scan-assembler-times "vbic.i16" 2 } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
View File

@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a)
{
return vbicq_n_u32 (a, 1);
}
/*
**foo1:
** ...
** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a)
{
return vbicq (a, 1);
}
/* { dg-final { scan-assembler-times "vbic.i32" 2 } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vbicq_s16 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vbicq_s32 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vbicq_s8 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vbicq_u16 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vbicq_u32 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

23
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c
View File

@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vbicq_u8 (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
/*
**foo1:
** ...
** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vbicq (a, b);
}
/* { dg-final { scan-assembler "vbic" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vbicq_x_f16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vbicq_x_f32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vbicq_x_s16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vbicq_x_s32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vbicq_x_s8 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vbicq_x_u16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vbicq_x_u32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

33
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c
View File

@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vbicq_x_u8 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbict" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vbicq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_f16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_f32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_s16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_s32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_s8 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.8" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.8" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_u16 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_u32 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m_n_u8 (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.8" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_m (inactive, a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.8" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t a, int32_t b)
{
return vbrsrq_n_f16 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.16" } } */
/*
**foo1:
** ...
** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t a, int32_t b)
{
return vbrsrq_n_f32 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.32" } } */
/*
**foo1:
** ...
** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, int32_t b)
{
return vbrsrq_n_s16 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.16" } } */
/*
**foo1:
** ...
** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32_t b)
{
return vbrsrq_n_s32 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.32" } } */
/*
**foo1:
** ...
** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t a, int32_t b)
{
return vbrsrq_n_s8 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.8" } } */
/*
**foo1:
** ...
** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.8" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint16x8_t
foo (uint16x8_t a, int32_t b)
{
return vbrsrq_n_u16 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.16" } } */
/*
**foo1:
** ...
** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint16x8_t
foo1 (uint16x8_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint32x4_t
foo (uint32x4_t a, int32_t b)
{
return vbrsrq_n_u32 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.32" } } */
/*
**foo1:
** ...
** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint32x4_t
foo1 (uint32x4_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

24
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c
View File

@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint8x16_t
foo (uint8x16_t a, int32_t b)
{
return vbrsrq_n_u8 (a, b);
}
/* { dg-final { scan-assembler "vbrsr.8" } } */
/*
**foo1:
** ...
** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
uint8x16_t
foo1 (uint8x16_t a, int32_t b)
{
return vbrsrq (a, b);
}
/* { dg-final { scan-assembler "vbrsr.8" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float16x8_t
foo (float16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x_n_f16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float16x8_t
foo1 (float16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float32x4_t
foo (float32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x_n_f32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
float32x4_t
foo1 (float32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int16x8_t
foo (int16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x_n_s16 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int16x8_t
foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.16" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c
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@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32x4_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x_n_s32 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int32x4_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.32" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

34
gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c
View File

@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**foo:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int8x16_t
foo (int8x16_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x_n_s8 (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.8" } } */
/*
**foo1:
** ...
** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
** vpst(?: @.*|)
** ...
** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
int8x16_t
foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
{
return vbrsrq_x (a, b, p);
}
/* { dg-final { scan-assembler "vpst" } } */
/* { dg-final { scan-assembler "vbrsrt.8" } } */
#ifdef __cplusplus
}
#endif
/* { dg-final { scan-assembler-not "__ARM_undef" } } */

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