llvm-project

History

[InstCombine] Remove shl if we only demand known signbits of shift source (#79014 )

This patch resolve TODO written in commit:
5909c67883

Proof: https://alive2.llvm.org/ce/z/C3VNoR

2024-04-10 11:19:09 +09:00

Analysis

[RISCV][TTI] Implement cost of intrinsic active_lane_mask (#87931 )

2024-04-10 10:08:33 +08:00

Assembler

Add support for nneg flag with uitofp

2024-04-09 18:12:33 -05:00

Bindings

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Bitcode

Add support for nneg flag with uitofp

2024-04-09 18:12:33 -05:00

BugPoint

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CodeGen

[AArch64][SME] Allow memory operations lowering to custom SME functions. (#79263 )

2024-04-09 17:27:46 +01:00

DebugInfo

[RemoveDIs] Add flag to preserve the debug info format of input IR (#87379 )

2024-04-05 14:18:59 +01:00

Demangle

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Examples

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ExecutionEngine

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Feature

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FileCheck

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Frontend/HLSL

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Instrumentation

[msan] Precommit tests.

2024-04-09 16:32:48 -07:00

Integer

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JitListener

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Linker

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LTO

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MachineVerifier

[RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_ICMP for scalable vector types

2024-04-03 15:27:15 -07:00

[M68k] Add support for bitwise NOT instruction (#88049 )

2024-04-09 09:07:26 -07:00

Object

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ObjectYAML

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Other

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SafepointIRVerifier

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Support

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SymbolRewriter

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TableGen

[X86] Add missing immediate qualifier to the (V)ROUND instructions (#87636 )

2024-04-04 15:20:16 +01:00

ThinLTO/X86

[PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (#79919 )

2024-04-01 13:54:54 -07:00

tools

llvm-reduce: Reduce nuw/nsw flags from trunc

2024-04-08 08:17:09 -04:00

Transforms

[InstCombine] Remove shl if we only demand known signbits of shift source (#79014 )

2024-04-10 11:19:09 +09:00

Unit

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Verifier

[AArch64][PAC][MC][ELF] Support PAuth ABI compatibility tag (#85236 )

2024-04-04 21:05:03 +03:00

YAMLParser

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.clang-format

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CMakeLists.txt

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lit.cfg.py

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lit.site.cfg.py.in

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TestRunner.sh

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