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Merge BoringSSL a0b49d6: aarch64: support BTI and pointer authentication in assembly.

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This commit is contained in:
Brian Smith 2020-10-19 19:54:32 -07:00
commit 6e500fe853
8 changed files with 125 additions and 0 deletions
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9
crypto/chacha/asm/chacha-armv8.pl
View File

@ -139,6 +139,7 @@ $code.=<<___;
.type GFp_ChaCha20_ctr32,%function
.align 5
GFp_ChaCha20_ctr32:
AARCH64_VALID_CALL_TARGET
cbz $len,.Labort
#if __has_feature(hwaddress_sanitizer) && __clang_major__ >= 10
adrp @x[0],:pg_hi21_nc:GFp_armcap_P
@ -152,6 +153,7 @@ GFp_ChaCha20_ctr32:
b.ne ChaCha20_neon
.Lshort:
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-96]!
add x29,sp,#0
@ -272,6 +274,7 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldp x29,x30,[sp],#96
AARCH64_VALIDATE_LINK_REGISTER
.Labort:
ret
@ -328,6 +331,7 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldp x29,x30,[sp],#96
AARCH64_VALIDATE_LINK_REGISTER
ret
.size GFp_ChaCha20_ctr32,.-GFp_ChaCha20_ctr32
___
@ -373,6 +377,7 @@ $code.=<<___;
.type ChaCha20_neon,%function
.align 5
ChaCha20_neon:
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-96]!
add x29,sp,#0
@ -572,6 +577,7 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldp x29,x30,[sp],#96
AARCH64_VALIDATE_LINK_REGISTER
ret
.Ltail_neon:
@ -681,6 +687,7 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldp x29,x30,[sp],#96
AARCH64_VALIDATE_LINK_REGISTER
ret
.size ChaCha20_neon,.-ChaCha20_neon
___
@ -693,6 +700,7 @@ $code.=<<___;
.type ChaCha20_512_neon,%function
.align 5
ChaCha20_512_neon:
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-96]!
add x29,sp,#0
@ -1112,6 +1120,7 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldp x29,x30,[sp],#96
AARCH64_VALIDATE_LINK_REGISTER
ret
.size ChaCha20_512_neon,.-ChaCha20_512_neon
___

9
crypto/fipsmodule/aes/asm/aesv8-armx.pl
View File

@ -96,6 +96,8 @@ GFp_${prefix}_set_encrypt_key:
.Lenc_key:
___
$code.=<<___ if ($flavour =~ /64/);
// Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
AARCH64_VALID_CALL_TARGET
stp x29,x30,[sp,#-16]!
add x29,sp,#0
___
@ -249,6 +251,11 @@ $code.=<<___;
.type GFp_${prefix}_${dir}crypt,%function
.align 5
GFp_${prefix}_${dir}crypt:
___
$code.=<<___ if ($flavour =~ /64/);
AARCH64_VALID_CALL_TARGET
___
$code.=<<___;
ldr $rounds,[$key,#240]
vld1.32 {$rndkey0},[$key],#16
vld1.8 {$inout},[$inp]
@ -299,6 +306,8 @@ $code.=<<___;
GFp_${prefix}_ctr32_encrypt_blocks:
___
$code.=<<___ if ($flavour =~ /64/);
// Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
AARCH64_VALID_CALL_TARGET
stp x29,x30,[sp,#-16]!
add x29,sp,#0
___

10
crypto/fipsmodule/aes/asm/vpaes-armv8.pl
View File

@ -49,6 +49,8 @@ open OUT,"| \"$^X\" $xlate $flavour $output";
*STDOUT=*OUT;
$code.=<<___;
#include <GFp/arm_arch.h>
.section .rodata
.type _vpaes_consts,%object
@ -237,6 +239,7 @@ _vpaes_encrypt_core:
.type GFp_vpaes_encrypt,%function
.align 4
GFp_vpaes_encrypt:
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-16]!
add x29,sp,#0
@ -246,6 +249,7 @@ GFp_vpaes_encrypt:
st1 {v0.16b}, [$out]
ldp x29,x30,[sp],#16
AARCH64_VALIDATE_LINK_REGISTER
ret
.size GFp_vpaes_encrypt,.-GFp_vpaes_encrypt
@ -391,6 +395,7 @@ _vpaes_key_preheat:
.type _vpaes_schedule_core,%function
.align 4
_vpaes_schedule_core:
AARCH64_SIGN_LINK_REGISTER
stp x29, x30, [sp,#-16]!
add x29,sp,#0
@ -550,6 +555,7 @@ _vpaes_schedule_core:
eor v6.16b, v6.16b, v6.16b // vpxor %xmm6, %xmm6, %xmm6
eor v7.16b, v7.16b, v7.16b // vpxor %xmm7, %xmm7, %xmm7
ldp x29, x30, [sp],#16
AARCH64_VALIDATE_LINK_REGISTER
ret
.size _vpaes_schedule_core,.-_vpaes_schedule_core
@ -720,6 +726,7 @@ _vpaes_schedule_mangle:
.type GFp_vpaes_set_encrypt_key,%function
.align 4
GFp_vpaes_set_encrypt_key:
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
@ -735,6 +742,7 @@ GFp_vpaes_set_encrypt_key:
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
AARCH64_VALIDATE_LINK_REGISTER
ret
.size GFp_vpaes_set_encrypt_key,.-GFp_vpaes_set_encrypt_key
___
@ -750,6 +758,7 @@ $code.=<<___;
.type GFp_vpaes_ctr32_encrypt_blocks,%function
.align 4
GFp_vpaes_ctr32_encrypt_blocks:
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
@ -817,6 +826,7 @@ GFp_vpaes_ctr32_encrypt_blocks:
ldp d10,d11,[sp],#16
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
AARCH64_VALIDATE_LINK_REGISTER
ret
.size GFp_vpaes_ctr32_encrypt_blocks,.-GFp_vpaes_ctr32_encrypt_blocks
___

13
crypto/fipsmodule/bn/asm/armv8-mont.pl
View File

@ -64,12 +64,15 @@ $n0="x4"; # const BN_ULONG *n0,
$num="x5"; # size_t num);
$code.=<<___;
#include <GFp/arm_arch.h>
.text
.globl GFp_bn_mul_mont
.type GFp_bn_mul_mont,%function
.align 5
GFp_bn_mul_mont:
AARCH64_SIGN_LINK_REGISTER
tst $num,#7
b.eq __bn_sqr8x_mont
tst $num,#3
@ -267,6 +270,7 @@ GFp_bn_mul_mont:
mov x0,#1
ldp x23,x24,[x29,#48]
ldr x29,[sp],#64
AARCH64_VALIDATE_LINK_REGISTER
ret
.size GFp_bn_mul_mont,.-GFp_bn_mul_mont
___
@ -284,6 +288,8 @@ $code.=<<___;
.type __bn_sqr8x_mont,%function
.align 5
__bn_sqr8x_mont:
// Not adding AARCH64_SIGN_LINK_REGISTER here because __bn_sqr8x_mont is jumped to
// only from bn_mul_mont which has already signed the return address.
cmp $ap,$bp
b.ne __bn_mul4x_mont
.Lsqr8x_mont:
@ -1040,6 +1046,8 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldr x29,[sp],#128
// x30 is popped earlier
AARCH64_VALIDATE_LINK_REGISTER
ret
.size __bn_sqr8x_mont,.-__bn_sqr8x_mont
___
@ -1063,6 +1071,9 @@ $code.=<<___;
.type __bn_mul4x_mont,%function
.align 5
__bn_mul4x_mont:
// Not adding AARCH64_SIGN_LINK_REGISTER here because __bn_mul4x_mont is jumped to
// only from bn_mul_mont or __bn_mul8x_mont which have already signed the
// return address.
stp x29,x30,[sp,#-128]!
add x29,sp,#0
stp x19,x20,[sp,#16]
@ -1496,6 +1507,8 @@ __bn_mul4x_mont:
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldr x29,[sp],#128
// x30 is popped earlier
AARCH64_VALIDATE_LINK_REGISTER
ret
.size __bn_mul4x_mont,.-__bn_mul4x_mont
___

5
crypto/fipsmodule/modes/asm/ghash-neon-armv8.pl
View File

@ -157,12 +157,15 @@ ___
}
$code .= <<___;
#include <GFp/arm_arch.h>
.text
.global GFp_gcm_init_neon
.type GFp_gcm_init_neon,%function
.align 4
GFp_gcm_init_neon:
AARCH64_VALID_CALL_TARGET
// This function is adapted from gcm_init_v8. xC2 is t3.
ld1 {$t1.2d}, [x1] // load H
movi $t3.16b, #0xe1
@ -187,6 +190,7 @@ GFp_gcm_init_neon:
.type GFp_gcm_gmult_neon,%function
.align 4
GFp_gcm_gmult_neon:
AARCH64_VALID_CALL_TARGET
ld1 {$INlo.16b}, [$Xi] // load Xi
ld1 {$Hlo.1d}, [$Htbl], #8 // load twisted H
ld1 {$Hhi.1d}, [$Htbl]
@ -205,6 +209,7 @@ GFp_gcm_gmult_neon:
.type GFp_gcm_ghash_neon,%function
.align 4
GFp_gcm_ghash_neon:
AARCH64_VALID_CALL_TARGET
ld1 {$Xl.16b}, [$Xi] // load Xi
ld1 {$Hlo.1d}, [$Htbl], #8 // load twisted H
ld1 {$Hhi.1d}, [$Htbl]

13
crypto/fipsmodule/modes/asm/ghashv8-armx.pl
View File

@ -86,6 +86,11 @@ $code.=<<___;
.type GFp_gcm_init_clmul,%function
.align 4
GFp_gcm_init_clmul:
___
$code.=<<___ if ($flavour =~ /64/);
AARCH64_VALID_CALL_TARGET
___
$code.=<<___;
vld1.64 {$t1},[x1] @ load input H
vmov.i8 $xC2,#0xe1
vshl.i64 $xC2,$xC2,#57 @ 0xc2.0
@ -145,6 +150,11 @@ $code.=<<___;
.type GFp_gcm_gmult_clmul,%function
.align 4
GFp_gcm_gmult_clmul:
___
$code.=<<___ if ($flavour =~ /64/);
AARCH64_VALID_CALL_TARGET
___
$code.=<<___;
vld1.64 {$t1},[$Xi] @ load Xi
vmov.i8 $xC2,#0xe1
vld1.64 {$H-$Hhl},[$Htbl] @ load twisted H, ...
@ -199,6 +209,9 @@ $code.=<<___;
.align 4
GFp_gcm_ghash_clmul:
___
$code.=<<___ if ($flavour =~ /64/);
AARCH64_VALID_CALL_TARGET
___
$code.=<<___ if ($flavour !~ /64/);
vstmdb sp!,{d8-d15} @ 32-bit ABI says so
___

4
crypto/fipsmodule/sha/asm/sha512-armv8.pl
View File

@ -185,6 +185,7 @@ $code.=<<___;
$func:
___
$code.=<<___ if ($SZ==4);
AARCH64_VALID_CALL_TARGET
#ifndef __KERNEL__
#if __has_feature(hwaddress_sanitizer) && __clang_major__ >= 10
adrp x16,:pg_hi21_nc:GFp_armcap_P
@ -197,6 +198,7 @@ $code.=<<___ if ($SZ==4);
#endif
___
$code.=<<___;
AARCH64_SIGN_LINK_REGISTER
stp x29,x30,[sp,#-128]!
add x29,sp,#0
@ -259,6 +261,7 @@ $code.=<<___;
ldp x25,x26,[x29,#64]
ldp x27,x28,[x29,#80]
ldp x29,x30,[sp],#128
AARCH64_VALIDATE_LINK_REGISTER
ret
.size $func,.-$func
@ -350,6 +353,7 @@ $code.=<<___;
.align 6
sha256_block_armv8:
.Lv8_entry:
// Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
stp x29,x30,[sp,#-16]!
add x29,sp,#0

62
include/GFp/arm_arch.h
View File

@ -110,4 +110,66 @@
// ARMV8_SHA256 indicates support for hardware SHA-256 instructions.
#define ARMV8_SHA256 (1 << 4)
#if defined(__ASSEMBLER__)
#if defined(__GNUC__)
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wundef"
#endif
// Support macros for
// - Armv8.3-A Pointer Authentication and
// - Armv8.5-A Branch Target Identification
// features which require emitting a .note.gnu.property section with the
// appropriate architecture-dependent feature bits set.
// Read more: "ELF for the Arm® 64-bit Architecture"
#if (__ARM_FEATURE_BTI_DEFAULT == 1)
#define GNU_PROPERTY_AARCH64_BTI (1 << 0) // Has Branch Target Identification
#define AARCH64_VALID_CALL_TARGET hint #34 // BTI 'c'
#else
#define GNU_PROPERTY_AARCH64_BTI 0 // No Branch Target Identification
#define AARCH64_VALID_CALL_TARGET
#endif
#if ((__ARM_FEATURE_PAC_DEFAULT & 1) == 1) // Signed with A-key
#define GNU_PROPERTY_AARCH64_POINTER_AUTH \
(1 << 1) // Has Pointer Authentication
#define AARCH64_SIGN_LINK_REGISTER hint #25 // PACIASP
#define AARCH64_VALIDATE_LINK_REGISTER hint #29 // AUTIASP
#elif ((__ARM_FEATURE_PAC_DEFAULT & 2) == 2) // Signed with B-key
#define GNU_PROPERTY_AARCH64_POINTER_AUTH \
(1 << 1) // Has Pointer Authentication
#define AARCH64_SIGN_LINK_REGISTER hint #27 // PACIBSP
#define AARCH64_VALIDATE_LINK_REGISTER hint #31 // AUTIBSP
#else
#define GNU_PROPERTY_AARCH64_POINTER_AUTH 0 // No Pointer Authentication
#if defined(__ARM_FEATURE_BTI_DEFAULT)
#define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET
#else
#define AARCH64_SIGN_LINK_REGISTER
#endif
#define AARCH64_VALIDATE_LINK_REGISTER
#endif
#if (GNU_PROPERTY_AARCH64_POINTER_AUTH != 0) || (GNU_PROPERTY_AARCH64_BTI != 0)
.pushsection note.gnu.property, "a";
.balign 8;
.long 4;
.long 0x10;
.long 0x5;
.asciz "GNU";
.long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4;
.long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
.long 0
.popsection
#endif
#if defined(__GNUC__)
#pragma GCC diagnostic pop
#endif
#endif /* defined __ASSEMBLER__ */
#endif // OPENSSL_HEADER_ARM_ARCH_H