feat: enable FP instructions in EL0/1

This commit is contained in:
2021-09-29 17:14:46 +03:00
parent 3e4d9a6a4e
commit 2d31cfd3ca
5 changed files with 70 additions and 1 deletions
+48
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@@ -0,0 +1,48 @@
//! Assembly intrinsics for AArch64 platform
#![allow(missing_docs)]
use tock_registers::{
interfaces::{Readable, Writeable},
register_bitfields
};
register_bitfields! {
u64,
pub CPACR_EL1 [
FPEN OFFSET(20) NUMBITS(2) [
TrapAll = 0,
TrapEl0 = 1,
TrapNone = 3
]
]
}
pub struct Reg;
impl Readable for Reg {
type T = u64;
type R = CPACR_EL1::Register;
#[inline(always)]
fn get(&self) -> Self::T {
let mut tmp;
unsafe {
asm!("mrs {}, cpacr_el1", out(reg) tmp);
}
tmp
}
}
impl Writeable for Reg {
type T = u64;
type R = CPACR_EL1::Register;
#[inline(always)]
fn set(&self, value: Self::T) {
unsafe {
asm!("msr cpacr_el1, {}", in(reg) value);
}
}
}
pub const CPACR_EL1: Reg = Reg;
+5 -1
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@@ -1,8 +1,12 @@
//! aarch64 common boot logic
use crate::arch::aarch64::asm::CPACR_EL1;
use tock_registers::interfaces::Writeable;
#[no_mangle]
fn __aa64_bsp_main() {
debugln!("Test");
// Disable FP instruction trapping
CPACR_EL1.write(CPACR_EL1::FPEN::TrapNone);
use crate::arch::machine;
use crate::dev::{serial::SerialDevice, timer::TimestampSource, Device};
+1
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@@ -2,6 +2,7 @@
pub mod boot;
pub mod timer;
pub mod asm;
cfg_if! {
if #[cfg(feature = "mach_qemu")] {
+1
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@@ -1,5 +1,6 @@
//! osdve5 crate (lol)
#![feature(
asm,
global_asm,
const_for,
const_mut_refs,
+15
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@@ -34,3 +34,18 @@ pub unsafe extern "C" fn memcmp(a: *mut u8, b: *mut u8, mut len: usize) -> isize
}
0
}
/// See memset(3p)
///
/// # Safety
///
/// Unsafe: writes to arbitrary memory locations, performs no pointer
/// validation.
#[no_mangle]
pub unsafe extern "C" fn memset(buf: *mut u8, val: u8, mut len: usize) -> *mut u8 {
while len != 0 {
len -= 1;
*buf.add(len) = val;
}
buf
}