libk: move trivial arch stuff to kernel-arch
This commit is contained in:
parent
72b8967339
commit
b653ec3c4a
@ -20,6 +20,8 @@ memtables = { path = "lib/memtables" }
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vmalloc = { path = "lib/vmalloc" }
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device-api-macros = { path = "lib/device-api/macros" }
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kernel-arch = { path = "arch" }
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# Drivers
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ygg_driver_pci = { path = "driver/bus/pci" }
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ygg_driver_block = { path = "driver/block/core" }
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17
arch/Cargo.toml
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17
arch/Cargo.toml
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@ -0,0 +1,17 @@
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[package]
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name = "kernel-arch"
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version = "0.1.0"
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edition = "2021"
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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[target.'cfg(target_arch = "x86_64")'.dependencies]
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kernel-arch-x86_64 = { path = "x86_64" }
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[target.'cfg(target_arch = "aarch64")'.dependencies]
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kernel-arch-aarch64 = { path = "aarch64" }
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[dependencies]
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kernel-arch-interface = { path = "interface" }
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cfg-if = "1.0.0"
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12
arch/aarch64/Cargo.toml
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12
arch/aarch64/Cargo.toml
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@ -0,0 +1,12 @@
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[package]
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name = "kernel-arch-aarch64"
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version = "0.1.0"
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edition = "2021"
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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[dependencies]
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kernel-arch-interface = { path = "../interface" }
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aarch64-cpu = "9.3.1"
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tock-registers = "0.8.1"
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27
arch/aarch64/src/lib.rs
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27
arch/aarch64/src/lib.rs
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@ -0,0 +1,27 @@
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#![no_std]
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use aarch64_cpu::registers::DAIF;
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use kernel_arch_interface::Architecture;
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use tock_registers::interfaces::{ReadWriteable, Readable};
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pub struct ArchitectureImpl;
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impl Architecture for ArchitectureImpl {
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fn interrupt_mask() -> bool {
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DAIF.read(DAIF::I) != 0
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}
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unsafe fn set_interrupt_mask(mask: bool) -> bool {
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let old = Self::interrupt_mask();
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if mask {
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DAIF.modify(DAIF::I::SET);
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} else {
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DAIF.modify(DAIF::I::CLEAR);
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}
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old
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}
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fn wait_for_interrupt() {
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aarch64_cpu::asm::wfi();
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}
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}
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8
arch/interface/Cargo.toml
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8
arch/interface/Cargo.toml
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@ -0,0 +1,8 @@
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[package]
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name = "kernel-arch-interface"
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version = "0.1.0"
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edition = "2021"
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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[dependencies]
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arch/interface/src/lib.rs
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9
arch/interface/src/lib.rs
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@ -0,0 +1,9 @@
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#![no_std]
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pub trait Architecture {
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fn interrupt_mask() -> bool;
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unsafe fn set_interrupt_mask(mask: bool) -> bool;
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fn wait_for_interrupt();
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}
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arch/src/lib.rs
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34
arch/src/lib.rs
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@ -0,0 +1,34 @@
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#![no_std]
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use cfg_if::cfg_if;
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pub use kernel_arch_interface::Architecture;
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/// Returns an absolute address to the given symbol
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#[macro_export]
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macro_rules! absolute_address {
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($sym:expr) => {{
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let mut _x: usize;
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#[cfg(target_arch = "aarch64")]
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unsafe {
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core::arch::asm!("ldr {0}, ={1}", out(reg) _x, sym $sym);
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}
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#[cfg(target_arch = "x86_64")]
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unsafe {
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core::arch::asm!("movabsq ${1}, {0}", out(reg) _x, sym $sym, options(att_syntax));
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}
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_x
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}};
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}
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cfg_if! {
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if #[cfg(target_arch = "aarch64")] {
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extern crate kernel_arch_aarch64 as imp;
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} else if #[cfg(target_arch = "x86_64")] {
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extern crate kernel_arch_x86_64 as imp;
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} else {
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compile_error!("Unsupported architecture");
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}
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}
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pub use imp::ArchitectureImpl;
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9
arch/x86_64/Cargo.toml
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9
arch/x86_64/Cargo.toml
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@ -0,0 +1,9 @@
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[package]
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name = "kernel-arch-x86_64"
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version = "0.1.0"
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edition = "2021"
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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[dependencies]
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kernel-arch-interface = { path = "../interface" }
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arch/x86_64/src/lib.rs
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33
arch/x86_64/src/lib.rs
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@ -0,0 +1,33 @@
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#![no_std]
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use kernel_arch_interface::Architecture;
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pub struct ArchitectureImpl;
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impl Architecture for ArchitectureImpl {
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fn interrupt_mask() -> bool {
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let mut flags: u64;
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unsafe {
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core::arch::asm!("pushfq; pop {0}", out(reg) flags, options(att_syntax));
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}
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// If IF is zero, interrupts are disabled (masked)
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flags & (1 << 9) == 0
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}
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unsafe fn set_interrupt_mask(mask: bool) -> bool {
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let old = Self::interrupt_mask();
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if mask {
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core::arch::asm!("cli");
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} else {
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core::arch::asm!("sti");
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}
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old
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}
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#[inline]
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fn wait_for_interrupt() {
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unsafe {
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core::arch::asm!("hlt");
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}
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}
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}
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@ -7,6 +7,7 @@ edition = "2021"
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[dependencies]
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yggdrasil-abi = { git = "https://git.alnyan.me/yggdrasil/yggdrasil-abi.git" }
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kernel-arch = { path = "../arch" }
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log = "0.4.20"
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crossbeam-queue = { version = "0.3.8", default-features = false, features = ["alloc"] }
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@ -1,4 +0,0 @@
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extern "Rust" {
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pub fn __acquire_irq_guard() -> bool;
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pub fn __release_irq_guard(mask: bool);
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}
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@ -11,8 +11,6 @@ use core::{
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sync::atomic::{AtomicUsize, Ordering},
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};
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pub(crate) mod api;
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pub mod event;
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pub mod queue;
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pub mod ring;
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@ -1,4 +1,4 @@
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use crate::api;
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use kernel_arch::{Architecture, ArchitectureImpl};
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/// Token type used to prevent IRQs from firing during some critical section. Normal IRQ operation
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/// (if enabled before) is resumed when [IrqGuard]'s lifetime is over.
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@ -8,12 +8,15 @@ pub struct IrqGuard(bool);
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impl IrqGuard {
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/// Saves the current IRQ state and masks them
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pub fn acquire() -> Self {
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Self(unsafe { api::__acquire_irq_guard() })
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let mask = unsafe { ArchitectureImpl::set_interrupt_mask(true) };
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Self(mask)
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}
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}
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impl Drop for IrqGuard {
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fn drop(&mut self) {
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unsafe { api::__release_irq_guard(self.0) }
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unsafe {
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ArchitectureImpl::set_interrupt_mask(self.0);
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}
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}
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}
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@ -41,7 +41,7 @@ impl TaskQueue {
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pub fn dequeue(&self) -> Result<Arc<Task>, Error> {
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let thread = Thread::current();
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// assert!(ArchitectureImpl::interrupt_mask());
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// assert!(PlatformImpl::interrupt_mask());
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loop {
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if let Some(task) = self.task_queue.pop() {
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return Ok(task);
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@ -5,6 +5,8 @@ use aarch64_cpu::{
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asm::barrier,
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registers::{CPACR_EL1, ID_AA64MMFR0_EL1, MAIR_EL1, SCTLR_EL1, TCR_EL1, TTBR0_EL1},
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};
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use kernel_arch::absolute_address;
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use kernel_arch::{Architecture, ArchitectureImpl};
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use kernel_fs::devfs;
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use libk::runtime;
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use libk_mm::{
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@ -14,11 +16,11 @@ use libk_mm::{
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use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
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use super::{
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exception, mem::load_fixed_tables, smp::CPU_COUNT, AArch64, BootStack, ARCHITECTURE,
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BOOT_STACK_SIZE,
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exception, mem::load_fixed_tables, smp::CPU_COUNT, AArch64, BootStack, BOOT_STACK_SIZE,
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PLATFORM,
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};
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use crate::{
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arch::{aarch64::mem::table::L3, Architecture},
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arch::{aarch64::mem::table::L3, Platform},
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kernel_main, kernel_secondary_main,
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mem::{phys, KERNEL_VIRT_OFFSET},
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};
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@ -75,7 +77,7 @@ unsafe fn enter_higher_half(sp: usize, elr: usize, x0: usize) -> ! {
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// NOTE executes in "lower-half" address space, MMU not yet enabled
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unsafe extern "C" fn __aarch64_el1_bsp_lower_entry(dtb: PhysicalAddress) -> ! {
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AArch64::set_interrupt_mask(true);
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ArchitectureImpl::set_interrupt_mask(true);
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// Don't trap FP operations
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CPACR_EL1.modify(CPACR_EL1::FPEN::TrapNothing);
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@ -98,7 +100,7 @@ unsafe extern "C" fn __aarch64_bsp_upper_entry(dtb: PhysicalAddress) -> ! {
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TTBR0_EL1.set(0);
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// Setup the "runtime" part of the kernel tables
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ARCHITECTURE
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PLATFORM
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.init_memory_management(dtb)
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.expect("Could not initialize memory management");
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barrier::isb(barrier::SY);
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@ -110,7 +112,7 @@ unsafe extern "C" fn __aarch64_bsp_upper_entry(dtb: PhysicalAddress) -> ! {
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runtime::init_task_queue();
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// Initialize the BSP CPU + the devices
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ARCHITECTURE
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PLATFORM
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.init_platform(true)
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.expect("Could not initialize the platform");
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@ -119,7 +121,7 @@ unsafe extern "C" fn __aarch64_bsp_upper_entry(dtb: PhysicalAddress) -> ! {
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unsafe extern "C" fn __aarch64_el1_ap_lower_entry() -> ! {
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const AP_STACK_PAGES: usize = 8;
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AArch64::set_interrupt_mask(true);
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ArchitectureImpl::set_interrupt_mask(true);
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// Unmask FP operations
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CPACR_EL1.modify(CPACR_EL1::FPEN::TrapNothing);
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@ -149,7 +151,7 @@ extern "C" fn __aarch64_ap_upper_entry() -> ! {
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exception::init_exceptions();
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unsafe {
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ARCHITECTURE
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PLATFORM
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.init_platform(false)
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.expect("Could not initialize the AP");
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}
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@ -13,16 +13,17 @@ use abi::{
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process::{Signal, SignalEntryData},
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syscall::SyscallFunction,
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};
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use kernel_arch::{Architecture, ArchitectureImpl};
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use tock_registers::interfaces::{Readable, Writeable};
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use crate::{
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arch::{Architecture, ArchitectureImpl},
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arch::{Platform, PlatformImpl},
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debug::LogLevel,
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syscall::raw_syscall_handler,
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task::{context::TaskFrame, thread::Thread},
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};
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use super::ARCHITECTURE;
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use super::PLATFORM;
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/// Struct for register values saved when taking an exception
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#[repr(C)]
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@ -351,7 +352,7 @@ fn el0_sync_inner(frame: &mut ExceptionFrame) {
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}
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fn irq_common() {
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ARCHITECTURE
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PLATFORM
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.external_interrupt_controller()
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.handle_pending_irqs();
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}
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@ -20,11 +20,11 @@ use libk_mm::{
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};
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use libk_util::{sync::IrqSafeSpinlock, OneTimeInit};
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use crate::arch::{aarch64::IrqNumber, Architecture, CpuAccess, CpuMessage};
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use crate::arch::{aarch64::IrqNumber, CpuAccess, CpuMessage, Platform};
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use self::{gicc::Gicc, gicd::Gicd};
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use super::{cpu::Cpu, smp::CPU_COUNT, ARCHITECTURE};
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use super::{cpu::Cpu, smp::CPU_COUNT, PLATFORM};
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const MAX_IRQ: usize = 300;
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const IPI_VECTOR: u64 = 1;
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@ -68,9 +68,9 @@ impl Device for Gic {
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self.gicd.init(gicd);
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self.gicc.init(gicc);
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ARCHITECTURE.register_external_interrupt_controller(self)?;
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ARCHITECTURE.register_local_interrupt_controller(self)?;
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ARCHITECTURE.register_message_interrupt_controller(self)?;
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PLATFORM.register_external_interrupt_controller(self)?;
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PLATFORM.register_local_interrupt_controller(self)?;
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PLATFORM.register_message_interrupt_controller(self)?;
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Ok(())
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}
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@ -43,7 +43,7 @@ use crate::{
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use self::mem::{table::L1, EarlyMapping};
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use super::{Architecture, CpuMessage};
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use super::{CpuMessage, Platform};
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pub mod boot;
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pub mod context;
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@ -78,7 +78,7 @@ pub struct AArch64 {
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initrd: OneTimeInit<PhysicalRef<'static, [u8]>>,
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}
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impl Architecture for AArch64 {
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impl Platform for AArch64 {
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const KERNEL_VIRT_OFFSET: usize = 0xFFFFFF8000000000;
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type IrqNumber = IrqNumber;
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@ -96,22 +96,6 @@ impl Architecture for AArch64 {
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smp::CPU_COUNT.load(Ordering::Acquire)
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}
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unsafe fn set_interrupt_mask(mask: bool) {
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if mask {
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DAIF.modify(DAIF::I::SET);
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} else {
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DAIF.modify(DAIF::I::CLEAR);
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}
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}
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fn interrupt_mask() -> bool {
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DAIF.read(DAIF::I) != 0
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}
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fn wait_for_interrupt() {
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aarch64_cpu::asm::wfi();
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}
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unsafe fn map_device_memory(
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&self,
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base: PhysicalAddress,
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@ -455,7 +439,7 @@ impl AArch64 {
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}
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/// AArch64 implementation value
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pub static ARCHITECTURE: AArch64 = AArch64 {
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pub static PLATFORM: AArch64 = AArch64 {
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dt: OneTimeInit::new(),
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initrd: OneTimeInit::new(),
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@ -5,7 +5,7 @@ use abi::error::Error;
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use device_api::CpuBringupDevice;
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use device_tree::dt::{DevTreeIndexNodePropGet, DeviceTree};
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use crate::arch::ARCHITECTURE;
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use crate::arch::PLATFORM;
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use crate::mem::KERNEL_VIRT_OFFSET;
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use super::{BootStack, BOOT_STACK_SIZE};
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@ -50,7 +50,7 @@ impl CpuEnableMethod {
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unsafe fn start_cpu(&self, id: usize, ip: usize, sp: usize) -> Result<(), Error> {
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match self {
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Self::Psci => {
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let psci = ARCHITECTURE.psci.try_get().ok_or_else(|| {
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let psci = PLATFORM.psci.try_get().ok_or_else(|| {
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warnln!(
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"cpu{} has to be enabled through PSCI, but no PSCI found",
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id
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@ -10,7 +10,7 @@ use device_tree::device_tree_driver;
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use libk::runtime;
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use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
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use crate::arch::{aarch64::IrqNumber, Architecture, CpuAccess, ARCHITECTURE};
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use crate::arch::{aarch64::IrqNumber, CpuAccess, Platform, PLATFORM};
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use super::cpu::Cpu;
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@ -53,12 +53,12 @@ impl Device for ArmTimer {
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unsafe fn init(&'static self) -> Result<(), Error> {
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CNTP_CTL_EL0.write(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
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ARCHITECTURE.register_monotonic_timer(self)?;
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PLATFORM.register_monotonic_timer(self)?;
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Ok(())
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}
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unsafe fn init_irq(&'static self) -> Result<(), Error> {
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let intc = ARCHITECTURE.external_interrupt_controller();
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let intc = PLATFORM.external_interrupt_controller();
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intc.register_irq(self.irq, Default::default(), self)?;
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@ -4,23 +4,6 @@ use core::{ops::DerefMut, time::Duration};
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use abi::error::Error;
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/// Returns an absolute address to the given symbol
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#[macro_export]
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macro_rules! absolute_address {
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($sym:expr) => {{
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let mut _x: usize;
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#[cfg(target_arch = "aarch64")]
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unsafe {
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core::arch::asm!("ldr {0}, ={1}", out(reg) _x, sym $sym);
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}
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#[cfg(target_arch = "x86_64")]
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unsafe {
|
||||
core::arch::asm!("movabsq ${1}, {0}", out(reg) _x, sym $sym, options(att_syntax));
|
||||
}
|
||||
_x
|
||||
}};
|
||||
}
|
||||
|
||||
use cfg_if::cfg_if;
|
||||
use device_api::{
|
||||
interrupt::{
|
||||
@ -30,6 +13,7 @@ use device_api::{
|
||||
timer::MonotonicTimestampProviderDevice,
|
||||
ResetDevice,
|
||||
};
|
||||
use kernel_arch::{Architecture, ArchitectureImpl};
|
||||
use libk_mm::{
|
||||
address::PhysicalAddress,
|
||||
device::{DeviceMemoryAttributes, RawDeviceMemoryMapping},
|
||||
@ -44,18 +28,18 @@ cfg_if! {
|
||||
if #[cfg(target_arch = "aarch64")] {
|
||||
pub mod aarch64;
|
||||
|
||||
pub use aarch64::{AArch64 as ArchitectureImpl, ARCHITECTURE};
|
||||
pub use aarch64::{AArch64 as PlatformImpl, PLATFORM};
|
||||
} else if #[cfg(target_arch = "x86_64")] {
|
||||
pub mod x86_64;
|
||||
|
||||
pub use x86_64::{X86_64 as ArchitectureImpl, ARCHITECTURE};
|
||||
pub use x86_64::{X86_64 as PlatformImpl, PLATFORM};
|
||||
} else {
|
||||
compile_error!("Architecture is not supported");
|
||||
}
|
||||
}
|
||||
|
||||
/// Architecture-specific lowest level of page mapping
|
||||
pub type L3 = <ArchitectureImpl as Architecture>::L3;
|
||||
pub type L3 = <PlatformImpl as Platform>::L3;
|
||||
|
||||
// Architecture interfaces
|
||||
|
||||
@ -72,7 +56,7 @@ pub enum CpuMessage {
|
||||
|
||||
/// Interface for an architecture-specific facilities
|
||||
#[allow(unused)]
|
||||
pub trait Architecture {
|
||||
pub trait Platform {
|
||||
/// Address, to which "zero" address is mapped in the virtual address space
|
||||
const KERNEL_VIRT_OFFSET: usize;
|
||||
|
||||
@ -125,20 +109,6 @@ pub trait Architecture {
|
||||
|
||||
// Architecture intrinsics
|
||||
|
||||
/// Suspends CPU until an interrupt is received
|
||||
fn wait_for_interrupt();
|
||||
|
||||
/// Sets the local CPU's interrupt mask.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// Enabling interrupts may lead to unexpected behavior unless the context explicitly expects
|
||||
/// them.
|
||||
unsafe fn set_interrupt_mask(mask: bool);
|
||||
|
||||
/// Returns the local CPU's interrupt mask
|
||||
fn interrupt_mask() -> bool;
|
||||
|
||||
/// Returns the count of present CPUs, including the BSP
|
||||
fn cpu_count() -> usize;
|
||||
|
||||
@ -225,9 +195,9 @@ pub trait Architecture {
|
||||
/// The caller must ensure it is actually safe to reset, i.e. no critical processes will be
|
||||
/// aborted and no data will be lost.
|
||||
unsafe fn reset(&self) -> ! {
|
||||
Self::set_interrupt_mask(true);
|
||||
ArchitectureImpl::set_interrupt_mask(true);
|
||||
loop {
|
||||
Self::wait_for_interrupt();
|
||||
ArchitectureImpl::wait_for_interrupt();
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -300,22 +270,6 @@ pub trait CpuAccess: Sized {
|
||||
|
||||
// External API for architecture specifics
|
||||
|
||||
#[no_mangle]
|
||||
fn __acquire_irq_guard() -> bool {
|
||||
let mask = ArchitectureImpl::interrupt_mask();
|
||||
unsafe {
|
||||
ArchitectureImpl::set_interrupt_mask(true);
|
||||
}
|
||||
mask
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn __release_irq_guard(mask: bool) {
|
||||
unsafe {
|
||||
ArchitectureImpl::set_interrupt_mask(mask);
|
||||
}
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn __cpu_index() -> usize {
|
||||
Cpu::local().id() as _
|
||||
@ -323,17 +277,17 @@ fn __cpu_index() -> usize {
|
||||
|
||||
#[no_mangle]
|
||||
fn __cpu_count() -> usize {
|
||||
ArchitectureImpl::cpu_count()
|
||||
PlatformImpl::cpu_count()
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn __virtualize(addr: u64) -> usize {
|
||||
ArchitectureImpl::virtualize(addr)
|
||||
PlatformImpl::virtualize(addr)
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn __physicalize(addr: usize) -> u64 {
|
||||
ArchitectureImpl::physicalize(addr)
|
||||
PlatformImpl::physicalize(addr)
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
@ -342,21 +296,21 @@ fn __map_device_pages(
|
||||
count: usize,
|
||||
attrs: DeviceMemoryAttributes,
|
||||
) -> Result<RawDeviceMemoryMapping, Error> {
|
||||
unsafe { ARCHITECTURE.map_device_memory(base, count, attrs) }
|
||||
unsafe { PLATFORM.map_device_memory(base, count, attrs) }
|
||||
}
|
||||
#[no_mangle]
|
||||
fn __unmap_device_pages(mapping: &RawDeviceMemoryMapping) {
|
||||
unsafe { ARCHITECTURE.unmap_device_memory(mapping) }
|
||||
unsafe { PLATFORM.unmap_device_memory(mapping) }
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn __monotonic_timestamp() -> Result<Duration, Error> {
|
||||
ARCHITECTURE.monotonic_timer().monotonic_timestamp()
|
||||
PLATFORM.monotonic_timer().monotonic_timestamp()
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn __message_interrupt_controller() -> &'static dyn MessageInterruptController {
|
||||
ARCHITECTURE.message_interrupt_controller()
|
||||
PLATFORM.message_interrupt_controller()
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
@ -365,7 +319,7 @@ fn __register_global_interrupt(
|
||||
options: IrqOptions,
|
||||
handler: &'static dyn InterruptHandler,
|
||||
) -> Result<(), Error> {
|
||||
let intc = ARCHITECTURE.external_interrupt_controller();
|
||||
let intc = PLATFORM.external_interrupt_controller();
|
||||
|
||||
let irq = {
|
||||
#[cfg(target_arch = "aarch64")]
|
||||
|
@ -25,7 +25,7 @@ use yggdrasil_abi::error::Error;
|
||||
use crate::{
|
||||
arch::{
|
||||
x86_64::{smp::CPU_COUNT, IrqNumber, SHUTDOWN_FENCE},
|
||||
Architecture, CpuMessage, ARCHITECTURE,
|
||||
CpuMessage, Platform, PLATFORM,
|
||||
},
|
||||
mem::{heap::GLOBAL_HEAP, read_memory, write_memory},
|
||||
};
|
||||
@ -169,7 +169,7 @@ impl acpi_system::Handler for AcpiHandlerImpl {
|
||||
fn install_interrupt_handler(irq: u32) -> Result<(), AcpiSystemError> {
|
||||
infoln!("Installing ACPI SCI handler at IRQ #{}", irq);
|
||||
|
||||
let intc = ARCHITECTURE.external_interrupt_controller();
|
||||
let intc = PLATFORM.external_interrupt_controller();
|
||||
let handler = Box::leak(Box::new(SciHandler));
|
||||
let irq = IrqNumber::Isa(irq as _);
|
||||
|
||||
@ -360,7 +360,7 @@ pub fn init_acpi(tables: &'static AcpiTables<AcpiHandlerImpl>) -> Result<(), Err
|
||||
// 7. Actually enter the S5 state
|
||||
|
||||
unsafe {
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.send_ipi(IpiDeliveryTarget::OtherCpus, CpuMessage::Shutdown)
|
||||
.unwrap();
|
||||
}
|
||||
|
@ -5,13 +5,13 @@ use core::arch::global_asm;
|
||||
use static_assertions::{const_assert, const_assert_eq};
|
||||
|
||||
use crate::{
|
||||
arch::{x86_64::cpu::Cpu, Architecture, CpuAccess},
|
||||
arch::{x86_64::cpu::Cpu, CpuAccess, Platform},
|
||||
task::thread::Thread,
|
||||
};
|
||||
|
||||
use super::{
|
||||
exception::{self, IrqFrame},
|
||||
ARCHITECTURE,
|
||||
PLATFORM,
|
||||
};
|
||||
|
||||
pub mod ioapic;
|
||||
@ -67,7 +67,7 @@ unsafe extern "C" fn irq_handler(vector: usize, frame: *mut IrqFrame) {
|
||||
let cpu = Cpu::local();
|
||||
let frame = &mut *frame;
|
||||
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.external_interrupt_controller()
|
||||
.handle_specific_irq(vector);
|
||||
cpu.local_apic().clear_interrupt();
|
||||
@ -85,7 +85,7 @@ unsafe extern "C" fn msi_handler(vector: usize, frame: *mut IrqFrame) {
|
||||
let cpu = Cpu::local();
|
||||
let frame = &mut *frame;
|
||||
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.message_interrupt_controller()
|
||||
.handle_msi(vector);
|
||||
cpu.local_apic().clear_interrupt();
|
||||
|
@ -15,7 +15,7 @@ use crate::{
|
||||
mem::KERNEL_VIRT_OFFSET,
|
||||
};
|
||||
|
||||
use super::{cpuid::init_cpuid, exception, ARCHITECTURE};
|
||||
use super::{cpuid::init_cpuid, exception, PLATFORM};
|
||||
|
||||
pub enum BootData {
|
||||
YBoot(&'static LoadProtocolV1),
|
||||
@ -79,14 +79,14 @@ extern "C" fn __x86_64_upper_entry() -> ! {
|
||||
init_dummy_cpu();
|
||||
}
|
||||
|
||||
ARCHITECTURE.set_boot_data(BootData::YBoot(&YBOOT_DATA));
|
||||
PLATFORM.set_boot_data(BootData::YBoot(&YBOOT_DATA));
|
||||
|
||||
// Gather available CPU features
|
||||
init_cpuid();
|
||||
|
||||
// Setup memory management: kernel virtual memory tables, physical page manager and heap
|
||||
unsafe {
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.init_memory_management()
|
||||
.expect("Could not initialize memory management");
|
||||
}
|
||||
@ -102,7 +102,7 @@ extern "C" fn __x86_64_upper_entry() -> ! {
|
||||
|
||||
// Initializes: local CPU, platform devices (timers/serials/etc), debug output
|
||||
unsafe {
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.init_platform(0)
|
||||
.expect("Could not initialize the platform");
|
||||
}
|
||||
@ -125,7 +125,7 @@ pub extern "C" fn __x86_64_ap_entry() -> ! {
|
||||
// syscall::init_syscall();
|
||||
exception::init_exceptions(cpu_id);
|
||||
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.init_platform(cpu_id)
|
||||
.expect("Could not initialize the platform (AP)");
|
||||
}
|
||||
|
@ -13,7 +13,7 @@ use crate::{
|
||||
task::{context::TaskFrame, thread::Thread, Cpu},
|
||||
};
|
||||
|
||||
use super::ARCHITECTURE;
|
||||
use super::PLATFORM;
|
||||
|
||||
primitive_enum! {
|
||||
enum ExceptionKind: u64 {
|
||||
@ -404,7 +404,7 @@ extern "C" fn __x86_64_exception_handler(frame: *mut ExceptionFrame) {
|
||||
|
||||
if let Some(msg) = cpu.get_ipi() {
|
||||
unsafe {
|
||||
ARCHITECTURE.handle_ipi(msg);
|
||||
PLATFORM.handle_ipi(msg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -73,7 +73,7 @@ use self::{
|
||||
smp::CPU_COUNT,
|
||||
};
|
||||
|
||||
use super::{Architecture, CpuAccess, CpuMessage};
|
||||
use super::{CpuAccess, CpuMessage, Platform};
|
||||
|
||||
/// x86-64-specific interrupt number
|
||||
#[derive(Clone, Copy, PartialEq, Eq, Debug, Hash)]
|
||||
@ -100,7 +100,7 @@ pub struct X86_64 {
|
||||
static SHUTDOWN_FENCE: SpinFence = SpinFence::new();
|
||||
|
||||
/// Global x86-64 architecture value
|
||||
pub static ARCHITECTURE: X86_64 = X86_64 {
|
||||
pub static PLATFORM: X86_64 = X86_64 {
|
||||
boot_data: OneTimeInit::new(),
|
||||
acpi: OneTimeInit::new(),
|
||||
|
||||
@ -111,7 +111,7 @@ pub static ARCHITECTURE: X86_64 = X86_64 {
|
||||
timer: OneTimeInit::new(),
|
||||
};
|
||||
|
||||
impl Architecture for X86_64 {
|
||||
impl Platform for X86_64 {
|
||||
const KERNEL_VIRT_OFFSET: usize = 0xFFFFFF8000000000;
|
||||
type IrqNumber = IrqNumber;
|
||||
type L3 = mem::table::L3;
|
||||
@ -134,29 +134,6 @@ impl Architecture for X86_64 {
|
||||
CPU_COUNT.load(Ordering::Acquire)
|
||||
}
|
||||
|
||||
unsafe fn set_interrupt_mask(mask: bool) {
|
||||
if mask {
|
||||
core::arch::asm!("cli");
|
||||
} else {
|
||||
core::arch::asm!("sti");
|
||||
}
|
||||
}
|
||||
|
||||
fn interrupt_mask() -> bool {
|
||||
let mut flags: u64;
|
||||
unsafe {
|
||||
core::arch::asm!("pushfq; pop {0}", out(reg) flags, options(att_syntax));
|
||||
}
|
||||
// If IF is zero, interrupts are disabled (masked)
|
||||
flags & (1 << 9) == 0
|
||||
}
|
||||
|
||||
fn wait_for_interrupt() {
|
||||
unsafe {
|
||||
core::arch::asm!("hlt");
|
||||
}
|
||||
}
|
||||
|
||||
#[inline]
|
||||
unsafe fn map_device_memory(
|
||||
&self,
|
||||
|
@ -10,7 +10,7 @@ use crate::arch::{
|
||||
intrinsics::{IoPort, IoPortAccess},
|
||||
IrqNumber,
|
||||
},
|
||||
Architecture, ARCHITECTURE,
|
||||
Platform, PLATFORM,
|
||||
};
|
||||
|
||||
const FREQUENCY: u32 = 1193180;
|
||||
@ -62,7 +62,7 @@ impl Device for I8253 {
|
||||
}
|
||||
|
||||
unsafe fn init_irq(&'static self) -> Result<(), Error> {
|
||||
let intc = ARCHITECTURE.external_interrupt_controller();
|
||||
let intc = PLATFORM.external_interrupt_controller();
|
||||
let inner = self.inner.lock();
|
||||
|
||||
let div: u16 = (FREQUENCY / 1000).try_into().unwrap();
|
||||
|
@ -13,7 +13,7 @@ use crate::{
|
||||
peripherals::ps2::codeset::{CODE_SET_1_00, CODE_SET_1_E0},
|
||||
IrqNumber,
|
||||
},
|
||||
Architecture, ARCHITECTURE,
|
||||
Platform, PLATFORM,
|
||||
},
|
||||
device::input,
|
||||
};
|
||||
@ -121,7 +121,7 @@ impl Device for PS2Controller {
|
||||
unsafe fn init_irq(&'static self) -> Result<(), Error> {
|
||||
let mut inner = self.inner.lock();
|
||||
// let intc = PLATFORM.interrupt_controller();
|
||||
let intc = ARCHITECTURE.external_interrupt_controller();
|
||||
let intc = PLATFORM.external_interrupt_controller();
|
||||
|
||||
intc.register_irq(self.primary_irq, Default::default(), self)?;
|
||||
|
||||
|
@ -2,6 +2,7 @@
|
||||
use core::sync::atomic::{AtomicUsize, Ordering};
|
||||
|
||||
use acpi_lib::platform::{ProcessorInfo, ProcessorState};
|
||||
use kernel_arch::{Architecture, ArchitectureImpl};
|
||||
use libk_mm::{
|
||||
address::{AsPhysicalAddress, FromRaw, IntoRaw, PhysicalAddress},
|
||||
pointer::PhysicalRefMut,
|
||||
@ -17,7 +18,7 @@ use crate::{
|
||||
KERNEL_TABLES,
|
||||
},
|
||||
},
|
||||
Architecture, ArchitectureImpl, CpuAccess,
|
||||
CpuAccess,
|
||||
},
|
||||
mem::phys,
|
||||
task::Cpu,
|
||||
|
@ -4,8 +4,9 @@ use abi::error::Error;
|
||||
use alloc::boxed::Box;
|
||||
use device_api::{CpuBringupDevice, Device, ResetDevice};
|
||||
use device_tree::{device_tree_driver, dt::DevTreeIndexNodePropGet};
|
||||
use kernel_arch::{Architecture, ArchitectureImpl};
|
||||
|
||||
use crate::arch::{Architecture, ArchitectureImpl, ARCHITECTURE};
|
||||
use crate::arch::{Platform, PlatformImpl, PLATFORM};
|
||||
|
||||
enum CallMethod {
|
||||
Hvc,
|
||||
@ -28,7 +29,7 @@ impl Device for Psci {
|
||||
}
|
||||
|
||||
unsafe fn init(&'static self) -> Result<(), Error> {
|
||||
ARCHITECTURE.psci.init(self);
|
||||
PLATFORM.psci.init(self);
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
@ -9,7 +9,7 @@ use tock_registers::{
|
||||
};
|
||||
|
||||
use crate::{
|
||||
arch::{Architecture, ARCHITECTURE},
|
||||
arch::{Architecture, PLATFORM},
|
||||
device::devtree::{self, DevTreeIndexNodePropGet, DevTreeIndexPropExt},
|
||||
device_tree_driver,
|
||||
mem::device::DeviceMemoryIo,
|
||||
@ -81,7 +81,7 @@ impl Device for RWdog {
|
||||
|
||||
self.inner.init(IrqSafeSpinlock::new(Inner { regs }));
|
||||
|
||||
ARCHITECTURE.register_reset_device(self)?;
|
||||
PLATFORM.register_reset_device(self)?;
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
@ -19,7 +19,7 @@ use tock_registers::{
|
||||
use vfs::{CharDevice, FileReadiness};
|
||||
|
||||
use crate::{
|
||||
arch::{aarch64::IrqNumber, Architecture, ARCHITECTURE},
|
||||
arch::{aarch64::IrqNumber, Platform, PLATFORM},
|
||||
debug::{self, DebugSink, LogLevel},
|
||||
device::tty::{TtyContext, TtyDevice},
|
||||
task::process::ProcessId,
|
||||
@ -221,7 +221,7 @@ impl Device for Pl011 {
|
||||
}
|
||||
|
||||
unsafe fn init_irq(&'static self) -> Result<(), Error> {
|
||||
let intc = ARCHITECTURE.external_interrupt_controller();
|
||||
let intc = PLATFORM.external_interrupt_controller();
|
||||
|
||||
intc.register_irq(self.irq, Default::default(), self)?;
|
||||
self.inner.get().lock().regs.IMSC.modify(IMSC::RXIM::SET);
|
||||
|
@ -12,7 +12,7 @@ use tock_registers::{
|
||||
use vfs::CharDevice;
|
||||
|
||||
use crate::{
|
||||
arch::{aarch64::IrqNumber, Architecture, ARCHITECTURE},
|
||||
arch::{aarch64::IrqNumber, Architecture, PLATFORM},
|
||||
debug::{self, DebugSink, LogLevel},
|
||||
device::{
|
||||
devtree::{self, DevTreeIndexPropExt},
|
||||
@ -173,7 +173,7 @@ impl Device for SunxiUart {
|
||||
}
|
||||
|
||||
unsafe fn init_irq(&'static self) -> Result<(), Error> {
|
||||
let intc = ARCHITECTURE.external_interrupt_controller();
|
||||
let intc = PLATFORM.external_interrupt_controller();
|
||||
|
||||
intc.register_irq(self.irq, Default::default(), self)?;
|
||||
intc.enable_irq(self.irq)?;
|
||||
|
10
src/main.rs
10
src/main.rs
@ -38,11 +38,11 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
use arch::Architecture;
|
||||
use arch::Platform;
|
||||
use libk_util::sync::SpinFence;
|
||||
|
||||
use crate::{
|
||||
arch::{ArchitectureImpl, ARCHITECTURE},
|
||||
arch::{PlatformImpl, PLATFORM},
|
||||
fs::sysfs,
|
||||
mem::heap,
|
||||
task::{spawn_kernel_closure, Cpu},
|
||||
@ -74,7 +74,7 @@ static CPU_INIT_FENCE: SpinFence = SpinFence::new();
|
||||
pub fn kernel_secondary_main() -> ! {
|
||||
// Synchronize the CPUs to this point
|
||||
CPU_INIT_FENCE.signal();
|
||||
CPU_INIT_FENCE.wait_all(ArchitectureImpl::cpu_count());
|
||||
CPU_INIT_FENCE.wait_all(PlatformImpl::cpu_count());
|
||||
|
||||
unsafe {
|
||||
task::enter();
|
||||
@ -100,14 +100,14 @@ pub fn kernel_main() -> ! {
|
||||
fs::add_pseudo_devices().unwrap();
|
||||
|
||||
unsafe {
|
||||
ARCHITECTURE.start_application_processors();
|
||||
PLATFORM.start_application_processors();
|
||||
}
|
||||
|
||||
Cpu::init_ipi_queues();
|
||||
|
||||
// Wait until all APs initialize
|
||||
CPU_INIT_FENCE.signal();
|
||||
CPU_INIT_FENCE.wait_all(ArchitectureImpl::cpu_count());
|
||||
CPU_INIT_FENCE.wait_all(PlatformImpl::cpu_count());
|
||||
|
||||
task::init().expect("Failed to initialize the scheduler");
|
||||
|
||||
|
@ -9,7 +9,7 @@ use core::{
|
||||
use abi::error::Error;
|
||||
use libk_mm::{address::PhysicalAddress, device::DeviceMemoryMapping};
|
||||
|
||||
use crate::arch::{Architecture, ArchitectureImpl};
|
||||
use crate::arch::{PlatformImpl, Platform};
|
||||
|
||||
pub mod address;
|
||||
pub mod heap;
|
||||
@ -20,7 +20,7 @@ pub mod table;
|
||||
use self::process::ProcessAddressSpace;
|
||||
|
||||
/// Offset applied to the physical kernel image when translating it into the virtual address space
|
||||
pub const KERNEL_VIRT_OFFSET: usize = ArchitectureImpl::KERNEL_VIRT_OFFSET;
|
||||
pub const KERNEL_VIRT_OFFSET: usize = PlatformImpl::KERNEL_VIRT_OFFSET;
|
||||
|
||||
/// Reads a value from an arbitrary physical address.
|
||||
///
|
||||
|
@ -1,6 +1,7 @@
|
||||
//! Physical memory management utilities
|
||||
|
||||
use abi::{error::Error, system::SystemMemoryStats};
|
||||
use kernel_arch::absolute_address;
|
||||
use libk_mm::{
|
||||
address::{FromRaw, IntoRaw, PhysicalAddress},
|
||||
phys::PhysicalMemoryRegion,
|
||||
@ -8,7 +9,7 @@ use libk_mm::{
|
||||
use libk_util::{sync::IrqSafeSpinlock, OneTimeInit};
|
||||
|
||||
use crate::{
|
||||
arch::{Architecture, ARCHITECTURE},
|
||||
arch::{Platform, PLATFORM},
|
||||
mem::phys::reserved::is_reserved,
|
||||
};
|
||||
|
||||
@ -122,7 +123,7 @@ pub unsafe fn init_from_iter<I: Iterator<Item = PhysicalMemoryRegion> + Clone>(
|
||||
|
||||
reserve_region("kernel", kernel_physical_memory_region());
|
||||
|
||||
ARCHITECTURE.map_physical_memory(it.clone(), phys_start, phys_end)?;
|
||||
PLATFORM.map_physical_memory(it.clone(), phys_start, phys_end)?;
|
||||
|
||||
let total_count = (phys_end - phys_start) / 0x1000;
|
||||
let page_bitmap_size = (total_count + BITMAP_WORD_SIZE - 1) / (BITMAP_WORD_SIZE / 8);
|
||||
|
@ -2,10 +2,11 @@
|
||||
use core::sync::atomic::{AtomicBool, AtomicU32, Ordering};
|
||||
|
||||
use device_api::interrupt::IpiDeliveryTarget;
|
||||
use kernel_arch::{Architecture, ArchitectureImpl};
|
||||
use libk_util::sync::{hack_locks, SpinFence};
|
||||
|
||||
use crate::{
|
||||
arch::{Architecture, ArchitectureImpl, CpuAccess, CpuMessage, ARCHITECTURE},
|
||||
arch::{CpuAccess, CpuMessage, Platform, PlatformImpl, PLATFORM},
|
||||
debug::{debug_internal, LogLevel},
|
||||
device::display::console::flush_consoles,
|
||||
task::Cpu,
|
||||
@ -53,12 +54,12 @@ fn panic_handler(pi: &core::panic::PanicInfo) -> ! {
|
||||
{
|
||||
// Let other CPUs know we're screwed
|
||||
unsafe {
|
||||
ARCHITECTURE
|
||||
PLATFORM
|
||||
.send_ipi(IpiDeliveryTarget::OtherCpus, CpuMessage::Panic)
|
||||
.ok();
|
||||
}
|
||||
|
||||
let ap_count = ArchitectureImpl::cpu_count() - 1;
|
||||
let ap_count = PlatformImpl::cpu_count() - 1;
|
||||
PANIC_HANDLED_FENCE.wait_all(ap_count);
|
||||
|
||||
unsafe {
|
||||
@ -101,7 +102,7 @@ fn panic_handler(pi: &core::panic::PanicInfo) -> ! {
|
||||
PANIC_SEQUENCE.fetch_add(1, Ordering::Release);
|
||||
|
||||
unsafe {
|
||||
ARCHITECTURE.reset();
|
||||
PLATFORM.reset();
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2,7 +2,7 @@
|
||||
|
||||
use libk_util::{sync::IrqSafeSpinlock, OneTimeInit};
|
||||
|
||||
use crate::arch::{Architecture, ARCHITECTURE};
|
||||
use crate::arch::{Platform, PLATFORM};
|
||||
|
||||
const BUFFER_SIZE: usize = 1024;
|
||||
|
||||
@ -67,7 +67,7 @@ pub fn read(buf: &mut [u8]) {
|
||||
|
||||
/// Initializes the random generator state
|
||||
pub fn init() {
|
||||
let now = ARCHITECTURE
|
||||
let now = PLATFORM
|
||||
.monotonic_timer()
|
||||
.monotonic_timestamp()
|
||||
.unwrap();
|
||||
|
@ -8,7 +8,7 @@ use libk::{runtime, thread::Termination};
|
||||
use libk_util::sync::SpinFence;
|
||||
|
||||
use crate::{
|
||||
arch::{Architecture, ArchitectureImpl, CpuAccess},
|
||||
arch::{PlatformImpl, CpuAccess, Platform},
|
||||
task::{sched::CpuQueue, thread::Thread},
|
||||
};
|
||||
|
||||
@ -35,7 +35,7 @@ pub fn spawn_kernel_closure<S: Into<String>, T: Termination, F: Fn() -> T + Send
|
||||
|
||||
/// Sets up CPU queues and gives them some processes to run
|
||||
pub fn init() -> Result<(), Error> {
|
||||
let cpu_count = ArchitectureImpl::cpu_count();
|
||||
let cpu_count = PlatformImpl::cpu_count();
|
||||
|
||||
// Create a queue for each CPU
|
||||
sched::init_queues(Vec::from_iter((0..cpu_count).map(CpuQueue::new)));
|
||||
|
@ -5,12 +5,10 @@ use core::cell::Cell;
|
||||
use alloc::{sync::Arc, vec::Vec};
|
||||
use cfg_if::cfg_if;
|
||||
use crossbeam_queue::SegQueue;
|
||||
use kernel_arch::{Architecture, ArchitectureImpl};
|
||||
use libk_util::{sync::IrqGuard, OneTimeInit};
|
||||
|
||||
use crate::{
|
||||
arch::{Architecture, ArchitectureImpl, CpuAccess},
|
||||
task::thread::ThreadState,
|
||||
};
|
||||
use crate::{arch::CpuAccess, task::thread::ThreadState};
|
||||
|
||||
use super::{
|
||||
context::TaskContextImpl,
|
||||
|
Loading…
x
Reference in New Issue
Block a user