pinctrl: basic gpio led support

boot/yboot-proto/src/lib.rs

@@ -1,3 +1,4 @@
+#![allow(unused)]
 #![no_std]
 
 use bytemuck::{Pod, Zeroable};

boot/yboot/src/elf.rs

@@ -16,6 +16,7 @@ use crate::elf::types::{PT_LOAD, SHF_ALLOC, SHF_WRITE, SHT_PROGBITS};
 
 use self::types::{Ehdr, Phdr, Shdr};
 
+#[allow(unused)]
 mod types {
     use bytemuck::{Pod, Zeroable};
 

boot/yboot/src/initrd.rs

@@ -25,7 +25,7 @@ pub fn load_somewhere(
 
     let file_info: &FileInfo = file.get_info(&mut info_buffer).unwrap();
     let size = file_info.file_size();
-    let page_count = (size + 0xFFF) / 0x1000;
+    let page_count = size.div_ceil(0x1000);
 
     let base = bs.allocate_pages(
         AllocateType::MaxAddress(MAXIMUM_ADDRESS),

doc/raspi4b.txt

@@ -3,55 +3,96 @@
 
 Booting Yggdrasil on Raspberry Pi 4B with u-boot:
 
-1. Clone u-boot sources to some directory and checkout some
-   stable branch. I've used v2024.10.
-2. Modify cmd/boot.c by replacing the do_go_exec function:
+1. Clone u-boot sources and build with rpi_4_defconfig
 
-/* Allow ports to override the default behavior */
-__attribute__((weak))
-unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
-				 char *const argv[])
-{
-    void *entry_ptr = (void *) entry;
-    ulong fdt_addr_r = 0;
-    if (argc >= 2) {
-        fdt_addr_r = hextoul(argv[1], NULL);
-    }
-    void (*func)(ulong) = entry_ptr;
-    func(fdt_addr_r);
-
-    return 0;
-}
-
-3. make CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 rpi_4_defconfig
-4. make CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 -j
-5. Copy u-boot.bin into your Pi SD-card's boot partition.
 **NOTE** I assume you have all the bootloader parts in the boot partition already.
          If not, clone raspberry fw repo and copy the following files to the boot partition:
             * bootcode.bin
             * start4.elf
             * all the .dtb files (a bcm2711-rpi-4-b.dtb should be enough though)
-6. config.txt:
+
+2. Copy u-boot.bin into the Pi's boot partition and edit the config.txt:
 enable_uart=1
 arm64_bit=1
 kernel=u-boot.bin
 
-7. Compile the OS with `cargo xtask --arch=aarch64 --board=raspi4b --release`
-8. Copy the following files into some directory:
-    * target/aarch64-unknown-raspi4b/release/yggdrasil-kernel
+3. Compile the OS with `cargo xtask --arch=aarch64 --board=raspi4b --release`
+4. Copy the following files into some directory:
+    * target/aarch64-unknown-raspi4b/release/kernel.bin
     * userspace/target/aarch64-unknown-yggdrasil/release/initrd.tar
-9. cd into that directory and start a TFTP server of your choice. I used `uftpd`.
+5. cd into that directory and start a TFTP server of your choice. I used `uftpd`.
 
-10. Connect an ethernet and serial to the Pi and run the following commands in u-boot shell:
+6. Connect an ethernet and serial to the Pi and run the following commands in u-boot shell:
 
-tftpboot 0x04000000 <YOUR IP>:initrd.tar
-tftpboot ${loadaddr} <YOUR IP>:yggdrasil-kernel
-load mmc 0:1 ${fdt_addr_r} bcm2711-rpi-4-b.dtb
-fdt addr ${fdt_addr_r}
-fdt resize
-fdt memory 0x0 0x3C000000
-fdt chosen 0x04000000 <WHATEVER SIZE WAS PRINTED WHEN RUNNING THE FIRST COMMAND>
-bootelf -p
-go ${kernel_addr_r} ${fdt_addr_r}
+### If using DHCP
+$ dhcp
+### If not using DHCP
+$ env set ipaddr <RASPBERRY-IP-ADDR>
+$ env set fdt_addr_r 0x11000000
+$ env set initrd_addr_r 0x04000000
+$ tftpboot ${initrd_addr_r} <BUILD-MACHINE-IP-ADDR>:initrd.tar
+$ tftpboot ${loadaddr} <BUILD-MACHINE-IP-ADDR>:kernel.bin
+$ load mmc 0:1 ${fdt_addr_r} bcm2711-rpi-4-b.dtb
+$ fdt addr ${fdt_addr_r}
+$ fdt resize
+$ fdt memory 0x0 0x3C000000
+$ booti ${loadaddr} ${initrd_addr_r}:<SIZE-PRINTED-WHEN-LOADING-INITRD> ${fdt_addr_r}
 
-11. Yggdrasil OS should start!
+###### Assuming BUILD-MACHINE-IP-ADDR is 13.0.0.1 and RASPBERRY-IP-ADDR is 13.0.0.2, here's
+###### a quick command for a development boot
+###### (FIXME when initrd gets larger than 64MiB)
+
+env set ipaddr 13.0.0.2; env set fdt_addr_r 0x11000000; env set initrd_addr_r 0x04000000; tftpboot ${initrd_addr_r} 13.0.0.1:initrd.tar; tftpboot ${loadaddr} 13.0.0.1:kernel.bin; load mmc 0:1 ${fdt_addr_r} bcm2711-rpi-4-b.dtb; fdt addr ${fdt_addr_r}; fdt resize; fdt memory 0x0 0x3C000000; booti ${loadaddr} ${initrd_addr_r}:67108864 ${fdt_addr_r}
+
+dhcp;
+env set initrd_addr_r 0x20000000; tftpboot ${initrd_addr_r} 192.168.88.10:initrd.img; tftpboot ${loadaddr} 192.168.88.10:yggdrasil-kernel.bin; load mmc 1:1 ${fdt_addr_r} bcm2711-rpi-4-b.dtb; fdt addr ${fdt_addr_r}; fdt resize; fdt memory 0x0 0x3C000000; booti ${loadaddr} ${initrd_addr_r}:0x4000000 ${fdt_addr_r}
+
+
+Missing drivers:
+
+No driver for Some("hvs@7e400000") ("brcm,bcm2711-hvs")
+No driver for Some("i2c@7e804000") ("brcm,bcm2711-i2c")
+  also "brcm,bcm2835-i2c"
+No driver for Some("usb@7e980000") ("brcm,bcm2835-usb")
+No driver for Some("local_intc@40000000") ("brcm,bcm2836-l1-intc")
+: avs-monitor@7d5d2000: probed
+No driver for Some("thermal") ("brcm,bcm2711-thermal")
+No driver for Some("dma@7e007000") ("brcm,bcm2835-dma")
+No driver for Some("watchdog@7e100000") ("brcm,bcm2835-pm")
+  also "brcm,bcm2835-pm-wdt"
+No driver for Some("rng@7e104000") ("brcm,bcm2711-rng200")
+No driver for Some("pixelvalve@7e206000") ("brcm,bcm2711-pixelvalve0")
+No driver for Some("pixelvalve@7e207000") ("brcm,bcm2711-pixelvalve1")
+No driver for Some("pixelvalve@7e20a000") ("brcm,bcm2711-pixelvalve2")
+No driver for Some("pwm@7e20c800") ("brcm,bcm2835-pwm")
+No driver for Some("pixelvalve@7e216000") ("brcm,bcm2711-pixelvalve4")
+No driver for Some("clock@7ef00000") ("brcm,brcm2711-dvp")
+No driver for Some("interrupt-controller@7ef00100") ("brcm,bcm2711-l2-intc")
+  also "brcm,l2-intc"
+No driver for Some("hdmi@7ef00700") ("brcm,bcm2711-hdmi0")
+No driver for Some("i2c@7ef04500") ("brcm,bcm2711-hdmi-i2c")
+No driver for Some("hdmi@7ef05700") ("brcm,bcm2711-hdmi1")
+No driver for Some("i2c@7ef09500") ("brcm,bcm2711-hdmi-i2c")
+No driver for Some("firmware") ("raspberrypi,bcm2835-firmware")
+  also "simple-mfd"
+No driver for Some("clocks") ("raspberrypi,firmware-clocks")
+No driver for Some("gpio") ("raspberrypi,firmware-gpio")
+No driver for Some("reset") ("raspberrypi,firmware-reset")
+No driver for Some("power") ("raspberrypi,bcm2835-power")
+No driver for Some("mailbox@7e00b840") ("brcm,bcm2835-vchiq")
+No driver for Some("phy") ("usb-nop-xceiv")
+No driver for Some("gpu") ("brcm,bcm2711-vc5")
+No driver for Some("mmc@7e340000") ("brcm,bcm2711-emmc2")
+No driver for Some("arm-pmu") ("arm,cortex-a72-pmu")
+  also "arm,armv8-pmuv3"
+No driver for Some("cpu@0") ("arm,cortex-a72")
+No driver for Some("cpu@1") ("arm,cortex-a72")
+No driver for Some("cpu@2") ("arm,cortex-a72")
+No driver for Some("cpu@3") ("arm,cortex-a72")
+No driver for Some("pcie@7d500000") ("brcm,bcm2711-pcie")
+No driver for Some("ethernet@7d580000") ("brcm,bcm2711-genet-v5")
+No driver for Some("mdio@e14") ("brcm,genet-mdio-v5")
+No driver for Some("leds") ("gpio-leds")
+No driver for Some("wifi-pwrseq") ("mmc-pwrseq-simple")
+No driver for Some("sd_io_1v8_reg") ("regulator-gpio")
+No driver for Some("sd_vcc_reg") ("regulator-fixed")

doc/visionfive2.txt

@@ -1,7 +1,6 @@
 Booting Yggdrasil OS on Starfive VisionFive 2 RISC-V board:
 
 * TODO: proper format for initrd image
-* TODO: 0x70000000 can be replaced with a builtin var?
 
 Prerequisites:
 
@@ -13,18 +12,119 @@ Steps:
 
 1. Copy yggdrasil-kernel.bin and initrd.img into some directory and start a TFTP server there
 2. Connect to VF2's serial port, ethernet and enter u-boot
-3. Run the following commands:
+3. Run the following commands in u-boot:
+
+### If using DHCP
+$ dhcp
+### If not using DHCP
+$ env set ipaddr <VF2-IP-ADDR>
+$ env set initrd_addr_r 0x70000000
+### [Optional] set some kernel cmdline params
+$ env set bootargs "debug.serial-level=info"
+$ tftpboot ${initrd_addr_r} <BUILD-MACHINE-IP-ADDR>:initrd.img
+$ tftpboot ${loadaddr} <BUILD-MACHINE-IP-ADDR>:yggdrasil-kernel.bin
+$ load mmc 1:3 ${fdt_addr_r} dtbs/6.6.20-starfive/starfive/${fdtfile}
+$ fdt resize
+$ booti ${loadaddr} ${initrd_addr_r}:<initrd-size> ${fdt_addr_r}
+
+###### Assuming BUILD-MACHINE-IP-ADDR is 13.0.0.1 and VF2-IP-ADDR is 13.0.0.2, here's
+###### a quick command for a development boot
+###### (FIXME when initrd gets larger than 64MiB)
+
+env set ipaddr 13.0.0.2; env set initrd_addr_r 0x70000000; tftpboot ${initrd_addr_r} 13.0.0.1:initrd.img; tftpboot ${loadaddr} 13.0.0.1:yggdrasil-kernel.bin; load mmc 1:3 ${fdt_addr_r} dtbs/6.6.20-starfive/starfive/${fdtfile}; fdt resize; booti ${loadaddr} ${initrd_addr_r}:60000000 ${fdt_addr_r}
+
+#### For DHCP boot with BUILD-MACHINE-IP-ADDR 192.168.88.10
 
-# Get an IP address
 dhcp
-# [Optional] set some kernel cmdline params
-setenv bootargs "debug.serial-level=info"
-# Load initrd
-tftpboot 0x70000000 <your-ip-address>:initrd.img
-# Load kernel
-tftpboot ${loadaddr} <your-ip-address>:yggdrasil-kernel.bin
-# Load dtb
-load mmc 1:3 ${fdt_addr_r} dtbs/...-starfive/starfive/${fdtfile}
-fdt resize
-# Enter the kernel
-booti ${loadaddr} 0x70000000:<initrd-size> ${fdt_addr_r}
+dhcp; env set initrd_addr_r 0x70000000; tftpboot ${initrd_addr_r} 192.168.88.10:initrd.img; tftpboot ${loadaddr} 192.168.88.10:yggdrasil-kernel.bin; load mmc 1:3 ${fdt_addr_r} dtbs/6.6.20-starfive/starfive/${fdtfile}; fdt resize; booti ${loadaddr} ${initrd_addr_r}:60000000 ${fdt_addr_r}
+
+
+Missing drivers:
+
+Clock/reset/pin:
+    No driver for Some("pinctrl@17020000") ("starfive,jh7110-aon-pinctrl")
+    No driver for Some("clock-controller@19810000") ("starfive,jh7110-ispcrg")
+    No driver for Some("clock-controller@295c0000") ("starfive,jh7110-voutcrg")
+
+Power/reg/GPIO:
+    No driver for Some("opp-table-0") ("operating-points-v2")
+    No driver for Some("pmic@36") ("x-powers,axp15060")
+    No driver for Some("power-controller@17030000") ("starfive,jh7110-pmu")
+    No driver for Some("leds") ("gpio-leds")
+    No driver for Some("gpio-restart") ("gpio-restart")
+
+Serial:
+    No driver for Some("i2c@10030000") ("snps,designware-i2c")
+    No driver for Some("i2c@10050000") ("snps,designware-i2c")
+    No driver for Some("i2c@12050000") ("snps,designware-i2c")
+    No driver for Some("i2c@12060000") ("snps,designware-i2c")
+    No driver for Some("spi@10060000") ("arm,pl022")
+      also "arm,primecell"
+
+Bus:
+    No driver for Some("usb@10100000") ("starfive,jh7110-usb")
+    No driver for Some("usb@0") ("cdns,usb3")
+    No driver for Some("phy@10200000") ("starfive,jh7110-usb-phy")
+    No driver for Some("phy@10210000") ("starfive,jh7110-pcie-phy")
+    No driver for Some("phy@10220000") ("starfive,jh7110-pcie-phy")
+    No driver for Some("pcie@940000000") ("starfive,jh7110-pcie")
+    No driver for Some("pcie@9c0000000") ("starfive,jh7110-pcie")
+
+Interrupt:
+    No driver for Some("interrupt-controller") ("riscv,cpu-intc")
+    No driver for Some("timer@2000000") ("starfive,jh7110-clint")
+      also "sifive,clint0"
+
+Display/GPU subsystem:
+    No driver for Some("display-subsystem") ("starfive,jh7110-display")
+      also "verisilicon,display-subsystem"
+    No driver for Some("dsi-output") ("starfive,jh7110-display-encoder")
+      also "verisilicon,dsi-encoder"
+    No driver for Some("jpu@13090000") ("starfive,jpu")
+    No driver for Some("vpu_dec@130a0000") ("starfive,vdec")
+    No driver for Some("vpu_enc@130b0000") ("starfive,venc")
+    No driver for Some("gpu@18000000") ("img-gpu")
+    No driver for Some("vin_sysctl@19800000") ("starfive,jh7110-vin")
+    No driver for Some("phy@19820000") ("starfive,jh7110-dphy-rx")
+    No driver for Some("dc8200@29400000") ("starfive,jh7110-dc8200")
+      also "verisilicon,dc8200"
+    No driver for Some("hdmi@29590000") ("starfive,jh7110-hdmi")
+      also "inno,hdmi"
+    No driver for Some("mipi@295d0000") ("starfive,jh7110-mipi_dsi")
+      also "cdns,dsi"
+    No driver for Some("mipi-dphy@295e0000") ("starfive,jh7110-mipi-dphy-tx")
+      also "m31,mipi-dphy-tx"
+
+Misc:
+    No driver for Some("mailbox_client") ("starfive,mailbox-test")
+    No driver for Some("cache-controller@2010000") ("starfive,jh7110-ccache")
+      also "sifive,ccache0"
+      also "cache"
+    No driver for Some("pwm@120d0000") ("starfive,jh7110-pwm")
+      also "opencores,pwm-v1"
+    No driver for Some("temperature-sensor@120e0000") ("starfive,jh7110-temp")
+    No driver for Some("timer@13050000") ("starfive,jh7110-timer")
+    No driver for Some("mailbox@13060000") ("starfive,mail_box")
+    No driver for Some("watchdog@13070000") ("starfive,jh7110-wdt")
+    No driver for Some("crypto@16000000") ("starfive,jh7110-crypto")
+    No driver for Some("rng@1600c000") ("starfive,jh7110-trng")
+    No driver for Some("mdio") ("snps,dwmac-mdio")
+    No driver for Some("mdio") ("snps,dwmac-mdio")
+    No driver for Some("dma-controller@16050000") ("starfive,jh7110-axi-dma")
+    No driver for Some("dma-controller@16008000") ("arm,pl080")
+      also "arm,primecell"
+    No driver for Some("rtc@17040000") ("starfive,jh7110-rtc")
+    No driver for Some("e24@6e210000") ("starfive,e24")
+    No driver for Some("linux,cma") ("shared-dma-pool")
+
+Storage:
+    No driver for Some("spi@13010000") ("starfive,jh7110-qspi")
+      also "cdns,qspi-nor"
+    No driver for Some("flash@0") ("jedec,spi-nor")
+    No driver for Some("partitions") ("fixed-partitions")
+    No driver for Some("mmc@16010000") ("starfive,jh7110-mmc")
+    No driver for Some("mmc@16020000") ("starfive,jh7110-mmc")
+
+Audio:
+    No driver for Some("pwmdac@100b0000") ("starfive,jh7110-pwmdac")
+    No driver for Some("i2s@120b0000") ("starfive,jh7110-i2stx0")

etc/dtb/aarch64-qemu-virt.dts

@@ -0,0 +1,433 @@
+/dts-v1/;
+
+/ {
+	interrupt-parent = <0x8005>;
+	dma-coherent;
+	model = "linux,dummy-virt";
+	#size-cells = <0x02>;
+	#address-cells = <0x02>;
+	compatible = "linux,dummy-virt";
+
+	psci {
+		migrate = <0xc4000005>;
+		cpu_on = <0xc4000003>;
+		cpu_off = <0x84000002>;
+		cpu_suspend = <0xc4000001>;
+		method = "smc";
+		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
+	};
+
+	memory@40000000 {
+		reg = <0x00 0x40000000 0x00 0x20000000>;
+		device_type = "memory";
+	};
+
+	platform-bus@c000000 {
+		interrupt-parent = <0x8005>;
+		ranges = <0x00 0x00 0xc000000 0x2000000>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		compatible = "qemu,platform", "simple-bus";
+	};
+
+	fw-cfg@9020000 {
+		dma-coherent;
+		reg = <0x00 0x9020000 0x00 0x18>;
+		compatible = "qemu,fw-cfg-mmio";
+	};
+
+	virtio_mmio@a000000 {
+		dma-coherent;
+		interrupts = <0x00 0x10 0x01>;
+		reg = <0x00 0xa000000 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000200 {
+		dma-coherent;
+		interrupts = <0x00 0x11 0x01>;
+		reg = <0x00 0xa000200 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000400 {
+		dma-coherent;
+		interrupts = <0x00 0x12 0x01>;
+		reg = <0x00 0xa000400 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000600 {
+		dma-coherent;
+		interrupts = <0x00 0x13 0x01>;
+		reg = <0x00 0xa000600 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000800 {
+		dma-coherent;
+		interrupts = <0x00 0x14 0x01>;
+		reg = <0x00 0xa000800 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000a00 {
+		dma-coherent;
+		interrupts = <0x00 0x15 0x01>;
+		reg = <0x00 0xa000a00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000c00 {
+		dma-coherent;
+		interrupts = <0x00 0x16 0x01>;
+		reg = <0x00 0xa000c00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a000e00 {
+		dma-coherent;
+		interrupts = <0x00 0x17 0x01>;
+		reg = <0x00 0xa000e00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001000 {
+		dma-coherent;
+		interrupts = <0x00 0x18 0x01>;
+		reg = <0x00 0xa001000 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001200 {
+		dma-coherent;
+		interrupts = <0x00 0x19 0x01>;
+		reg = <0x00 0xa001200 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001400 {
+		dma-coherent;
+		interrupts = <0x00 0x1a 0x01>;
+		reg = <0x00 0xa001400 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001600 {
+		dma-coherent;
+		interrupts = <0x00 0x1b 0x01>;
+		reg = <0x00 0xa001600 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001800 {
+		dma-coherent;
+		interrupts = <0x00 0x1c 0x01>;
+		reg = <0x00 0xa001800 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001a00 {
+		dma-coherent;
+		interrupts = <0x00 0x1d 0x01>;
+		reg = <0x00 0xa001a00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001c00 {
+		dma-coherent;
+		interrupts = <0x00 0x1e 0x01>;
+		reg = <0x00 0xa001c00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a001e00 {
+		dma-coherent;
+		interrupts = <0x00 0x1f 0x01>;
+		reg = <0x00 0xa001e00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002000 {
+		dma-coherent;
+		interrupts = <0x00 0x20 0x01>;
+		reg = <0x00 0xa002000 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002200 {
+		dma-coherent;
+		interrupts = <0x00 0x21 0x01>;
+		reg = <0x00 0xa002200 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002400 {
+		dma-coherent;
+		interrupts = <0x00 0x22 0x01>;
+		reg = <0x00 0xa002400 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002600 {
+		dma-coherent;
+		interrupts = <0x00 0x23 0x01>;
+		reg = <0x00 0xa002600 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002800 {
+		dma-coherent;
+		interrupts = <0x00 0x24 0x01>;
+		reg = <0x00 0xa002800 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002a00 {
+		dma-coherent;
+		interrupts = <0x00 0x25 0x01>;
+		reg = <0x00 0xa002a00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002c00 {
+		dma-coherent;
+		interrupts = <0x00 0x26 0x01>;
+		reg = <0x00 0xa002c00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a002e00 {
+		dma-coherent;
+		interrupts = <0x00 0x27 0x01>;
+		reg = <0x00 0xa002e00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003000 {
+		dma-coherent;
+		interrupts = <0x00 0x28 0x01>;
+		reg = <0x00 0xa003000 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003200 {
+		dma-coherent;
+		interrupts = <0x00 0x29 0x01>;
+		reg = <0x00 0xa003200 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003400 {
+		dma-coherent;
+		interrupts = <0x00 0x2a 0x01>;
+		reg = <0x00 0xa003400 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003600 {
+		dma-coherent;
+		interrupts = <0x00 0x2b 0x01>;
+		reg = <0x00 0xa003600 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003800 {
+		dma-coherent;
+		interrupts = <0x00 0x2c 0x01>;
+		reg = <0x00 0xa003800 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003a00 {
+		dma-coherent;
+		interrupts = <0x00 0x2d 0x01>;
+		reg = <0x00 0xa003a00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003c00 {
+		dma-coherent;
+		interrupts = <0x00 0x2e 0x01>;
+		reg = <0x00 0xa003c00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@a003e00 {
+		dma-coherent;
+		interrupts = <0x00 0x2f 0x01>;
+		reg = <0x00 0xa003e00 0x00 0x200>;
+		compatible = "virtio,mmio";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		poweroff {
+			gpios = <0x8007 0x03 0x00>;
+			linux,code = <0x74>;
+			label = "GPIO Key Poweroff";
+		};
+	};
+
+	pl061@9030000 {
+		phandle = <0x8007>;
+		clock-names = "apb_pclk";
+		clocks = <0x8000>;
+		interrupts = <0x00 0x07 0x04>;
+		gpio-controller;
+		#gpio-cells = <0x02>;
+		compatible = "arm,pl061", "arm,primecell";
+		reg = <0x00 0x9030000 0x00 0x1000>;
+	};
+
+	pcie@10000000 {
+		interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
+		interrupt-map = <0x00 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x05 0x04>;
+		#interrupt-cells = <0x01>;
+		ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>;
+		reg = <0x40 0x10000000 0x00 0x10000000>;
+		msi-map = <0x00 0x8006 0x00 0x10000>;
+		dma-coherent;
+		bus-range = <0x00 0xff>;
+		linux,pci-domain = <0x00>;
+		#size-cells = <0x02>;
+		#address-cells = <0x03>;
+		device_type = "pci";
+		compatible = "pci-host-ecam-generic";
+	};
+
+	pl031@9010000 {
+		clock-names = "apb_pclk";
+		clocks = <0x8000>;
+		interrupts = <0x00 0x02 0x04>;
+		reg = <0x00 0x9010000 0x00 0x1000>;
+		compatible = "arm,pl031", "arm,primecell";
+	};
+
+	pl011@9000000 {
+		clock-names = "uartclk", "apb_pclk";
+		clocks = <0x8000 0x8000>;
+		interrupts = <0x00 0x01 0x04>;
+		reg = <0x00 0x9000000 0x00 0x1000>;
+		compatible = "arm,pl011", "arm,primecell";
+	};
+
+	pmu {
+		interrupts = <0x01 0x07 0xf04>;
+		compatible = "arm,armv8-pmuv3";
+	};
+
+	intc@8000000 {
+		phandle = <0x8005>;
+		interrupts = <0x01 0x09 0x04>;
+		reg = <0x00 0x8000000 0x00 0x10000 0x00 0x8010000 0x00 0x10000 0x00 0x8030000 0x00 0x10000 0x00 0x8040000 0x00 0x10000>;
+		compatible = "arm,cortex-a15-gic";
+		ranges;
+		#size-cells = <0x02>;
+		#address-cells = <0x02>;
+		interrupt-controller;
+		#interrupt-cells = <0x03>;
+
+		v2m@8020000 {
+			phandle = <0x8006>;
+			reg = <0x00 0x8020000 0x00 0x1000>;
+			msi-controller;
+			compatible = "arm,gic-v2m-frame";
+		};
+	};
+
+	flash@0 {
+		bank-width = <0x04>;
+		reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>;
+		compatible = "cfi-flash";
+	};
+
+	cpus {
+		#size-cells = <0x00>;
+		#address-cells = <0x01>;
+
+		cpu-map {
+
+			socket0 {
+
+				cluster0 {
+
+					core0 {
+						cpu = <0x8004>;
+					};
+
+					core1 {
+						cpu = <0x8003>;
+					};
+
+					core2 {
+						cpu = <0x8002>;
+					};
+
+					core3 {
+						cpu = <0x8001>;
+					};
+				};
+			};
+		};
+
+		cpu@0 {
+			phandle = <0x8004>;
+			reg = <0x00>;
+			enable-method = "psci";
+			compatible = "arm,cortex-a57";
+			device_type = "cpu";
+		};
+
+		cpu@1 {
+			phandle = <0x8003>;
+			reg = <0x01>;
+			enable-method = "psci";
+			compatible = "arm,cortex-a57";
+			device_type = "cpu";
+		};
+
+		cpu@2 {
+			phandle = <0x8002>;
+			reg = <0x02>;
+			enable-method = "psci";
+			compatible = "arm,cortex-a57";
+			device_type = "cpu";
+		};
+
+		cpu@3 {
+			phandle = <0x8001>;
+			reg = <0x03>;
+			enable-method = "psci";
+			compatible = "arm,cortex-a57";
+			device_type = "cpu";
+		};
+	};
+
+	timer {
+		interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04 0x01 0x0c 0xf04>;
+		always-on;
+		compatible = "arm,armv8-timer", "arm,armv7-timer";
+	};
+
+	apb-pclk {
+		phandle = <0x8000>;
+		clock-output-names = "clk24mhz";
+		clock-frequency = <0x16e3600>;
+		#clock-cells = <0x00>;
+		compatible = "fixed-clock";
+	};
+
+	aliases {
+		serial0 = "/pl011@9000000";
+	};
+
+	chosen {
+		linux,initrd-end = <0x00 0x49fd4600>;
+		linux,initrd-start = <0x00 0x48000000>;
+		stdout-path = "/pl011@9000000";
+		rng-seed = <0xf119f64b 0xacade219 0xaefd1e87 0x5fb37f65 0xc770054a 0xd779b25f 0x1ba6d6e9 0x8121c19d>;
+		kaslr-seed = <0x1f500308 0xbb36e27a>;
+	};
+};

etc/dtb/riscv64-qemu-virt.dts

@@ -0,0 +1,217 @@
+/dts-v1/;
+
+/ {
+	#address-cells = <0x02>;
+	#size-cells = <0x02>;
+	compatible = "riscv-virtio";
+	model = "riscv-virtio,qemu";
+
+	poweroff {
+		value = <0x5555>;
+		offset = <0x00>;
+		regmap = <0x04>;
+		compatible = "syscon-poweroff";
+	};
+
+	reboot {
+		value = <0x7777>;
+		offset = <0x00>;
+		regmap = <0x04>;
+		compatible = "syscon-reboot";
+	};
+
+	platform-bus@4000000 {
+		interrupt-parent = <0x03>;
+		ranges = <0x00 0x00 0x4000000 0x2000000>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		compatible = "qemu,platform", "simple-bus";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x00 0x80000000 0x00 0x40000000>;
+	};
+
+	cpus {
+		#address-cells = <0x01>;
+		#size-cells = <0x00>;
+		timebase-frequency = <0x989680>;
+
+		cpu@0 {
+			phandle = <0x01>;
+			device_type = "cpu";
+			reg = <0x00>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,cbop-block-size = <0x40>;
+			riscv,cboz-block-size = <0x40>;
+			riscv,cbom-block-size = <0x40>;
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zic64b", "zicbom", "zicbop", "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zmmul", "za64rs", "zaamo", "zalrsc", "zawrs", "zfa", "zca", "zcd", "zba", "zbb", "zbc", "zbs", "shcounterenw", "shgatpa", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "ssccptr", "sscounterenw", "sstc", "sstvala", "sstvecd", "ssu64xl", "svadu", "svvptc";
+			riscv,isa-base = "rv64i";
+			riscv,isa = "rv64imafdch_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ziccrse_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zmmul_za64rs_zaamo_zalrsc_zawrs_zfa_zca_zcd_zba_zbb_zbc_zbs_shcounterenw_shgatpa_shtvala_shvsatpa_shvstvala_shvstvecd_ssccptr_sscounterenw_sstc_sstvala_sstvecd_ssu64xl_svadu_svvptc";
+			mmu-type = "riscv,sv57";
+
+			interrupt-controller {
+				#interrupt-cells = <0x01>;
+				interrupt-controller;
+				compatible = "riscv,cpu-intc";
+				phandle = <0x02>;
+			};
+		};
+
+		cpu-map {
+
+			cluster0 {
+
+				core0 {
+					cpu = <0x01>;
+				};
+			};
+		};
+	};
+
+	pmu {
+		riscv,event-to-mhpmcounters = <0x01 0x01 0x7fff9 0x02 0x02 0x7fffc 0x10019 0x10019 0x7fff8 0x1001b 0x1001b 0x7fff8 0x10021 0x10021 0x7fff8>;
+		compatible = "riscv,pmu";
+	};
+
+	fw-cfg@10100000 {
+		dma-coherent;
+		reg = <0x00 0x10100000 0x00 0x18>;
+		compatible = "qemu,fw-cfg-mmio";
+	};
+
+	flash@20000000 {
+		bank-width = <0x04>;
+		reg = <0x00 0x20000000 0x00 0x2000000 0x00 0x22000000 0x00 0x2000000>;
+		compatible = "cfi-flash";
+	};
+
+	aliases {
+		serial0 = "/soc/serial@10000000";
+	};
+
+	chosen {
+		linux,initrd-end = <0x00 0xa2b4f200>;
+		linux,initrd-start = <0x00 0xa0200000>;
+		stdout-path = "/soc/serial@10000000";
+		rng-seed = <0xa7074b10 0xf3373c0c 0x94a3a9a0 0xa2442477 0x817e30af 0x6460a6d7 0xbcaa71c4 0xb75dd35>;
+	};
+
+	soc {
+		#address-cells = <0x02>;
+		#size-cells = <0x02>;
+		compatible = "simple-bus";
+		ranges;
+
+		rtc@101000 {
+			interrupts = <0x0b>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x101000 0x00 0x1000>;
+			compatible = "google,goldfish-rtc";
+		};
+
+		serial@10000000 {
+			interrupts = <0x0a>;
+			interrupt-parent = <0x03>;
+			clock-frequency = "", "8@";
+			reg = <0x00 0x10000000 0x00 0x100>;
+			compatible = "ns16550a";
+		};
+
+		test@100000 {
+			phandle = <0x04>;
+			reg = <0x00 0x100000 0x00 0x1000>;
+			compatible = "sifive,test1", "sifive,test0", "syscon";
+		};
+
+		virtio_mmio@10008000 {
+			interrupts = <0x08>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10008000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10007000 {
+			interrupts = <0x07>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10007000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10006000 {
+			interrupts = <0x06>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10006000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10005000 {
+			interrupts = <0x05>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10005000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10004000 {
+			interrupts = <0x04>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10004000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10003000 {
+			interrupts = <0x03>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10003000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10002000 {
+			interrupts = <0x02>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10002000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		virtio_mmio@10001000 {
+			interrupts = <0x01>;
+			interrupt-parent = <0x03>;
+			reg = <0x00 0x10001000 0x00 0x1000>;
+			compatible = "virtio,mmio";
+		};
+
+		plic@c000000 {
+			phandle = <0x03>;
+			riscv,ndev = <0x5f>;
+			reg = <0x00 0xc000000 0x00 0x600000>;
+			interrupts-extended = <0x02 0x0b 0x02 0x09>;
+			interrupt-controller;
+			compatible = "sifive,plic-1.0.0", "riscv,plic0";
+			#address-cells = <0x00>;
+			#interrupt-cells = <0x01>;
+		};
+
+		clint@2000000 {
+			interrupts-extended = <0x02 0x03 0x02 0x07>;
+			reg = <0x00 0x2000000 0x00 0x10000>;
+			compatible = "sifive,clint0", "riscv,clint0";
+		};
+
+		pci@30000000 {
+			interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
+			interrupt-map = <0x00 0x00 0x00 0x01 0x03 0x20 0x00 0x00 0x00 0x02 0x03 0x21 0x00 0x00 0x00 0x03 0x03 0x22 0x00 0x00 0x00 0x04 0x03 0x23 0x800 0x00 0x00 0x01 0x03 0x21 0x800 0x00 0x00 0x02 0x03 0x22 0x800 0x00 0x00 0x03 0x03 0x23 0x800 0x00 0x00 0x04 0x03 0x20 0x1000 0x00 0x00 0x01 0x03 0x22 0x1000 0x00 0x00 0x02 0x03 0x23 0x1000 0x00 0x00 0x03 0x03 0x20 0x1000 0x00 0x00 0x04 0x03 0x21 0x1800 0x00 0x00 0x01 0x03 0x23 0x1800 0x00 0x00 0x02 0x03 0x20 0x1800 0x00 0x00 0x03 0x03 0x21 0x1800 0x00 0x00 0x04 0x03 0x22>;
+			ranges = <0x1000000 0x00 0x00 0x00 0x3000000 0x00 0x10000 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00 0x40000000 0x3000000 0x04 0x00 0x04 0x00 0x04 0x00>;
+			reg = <0x00 0x30000000 0x00 0x10000000>;
+			dma-coherent;
+			bus-range = <0x00 0xff>;
+			linux,pci-domain = <0x00>;
+			device_type = "pci";
+			compatible = "pci-host-ecam-generic";
+			#size-cells = <0x02>;
+			#interrupt-cells = <0x01>;
+			#address-cells = <0x03>;
+		};
+	};
+};

etc/gdb/aarch64-virt.gdb

@@ -1,4 +0,0 @@
-# Lower-half
-symbol-file -o 0x40080000 target/aarch64-unknown-none/release/yggdrasil-kernel
-symbol-file -o 0xFFFFFF8040080000 target/aarch64-unknown-none/release/yggdrasil-kernel
-target remote :1234

etc/i686-unknown-none.json

@@ -1,29 +0,0 @@
-{
-  "arch": "x86",
-  "cpu": "pentium4",
-  "os": "none",
-  "abi": "softfloat",
-  "llvm-target": "i686-unknown-linux-gnu",
-  "data-layout": "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i128:128-f64:32:64-f80:32-n8:16:32-S128",
-  "max-atomic-width": 64,
-  "target-pointer-width": "32",
-  "features": "-avx,-sse,+soft-float",
-
-  "executables": true,
-  "stack-probes": {
-    "kind": "inline"
-  },
-  "dynamic-linking": true,
-  "panic-strategy": "abort",
-  "relocation-model": "pic",
-
-  "has-thread-local": false,
-
-  "supported-split-debuginfo": [
-    "packed",
-    "unpacked",
-    "off"
-  ],
-  "linker": "rust-lld",
-  "linker-flavor": "ld.lld"
-}

etc/ld/aarch64-unknown-none.ld

@@ -0,0 +1,75 @@
+ENTRY(__aarch64_entry);
+
+SECTIONS {
+    . = 0x0;
+
+    PROVIDE(__kernel_start = .);
+
+    .text : {
+        *(.text.entry)
+        *(.text*)
+    }
+
+    . = ALIGN(4K);
+
+    .rodata : {
+        *(.rodata*)
+        *(.eh_frame*)
+
+        . = ALIGN(16);
+        PROVIDE(__init_array_start = .);
+        KEEP(*(.init_array*));
+        PROVIDE(__init_array_end = .);
+    }
+
+    . = ALIGN(4K);
+
+    .rela : {
+        PROVIDE(__rela_start = .);
+        *(.rela*)
+        PROVIDE(__rela_end = .);
+    }
+
+    .got : {
+        *(.got*)
+    }
+
+    .dynamic : {
+        *(.dynamic)
+    }
+
+    . = ALIGN(4K);
+
+    .data : {
+        *(.data*)
+    }
+
+    . = ALIGN(4K);
+    PROVIDE(__bss_start = .);
+
+    .bss : {
+        *(COMMON)
+        *(.bss*)
+    }
+
+    . = ALIGN(4K);
+    PROVIDE(__bss_end = .);
+    PROVIDE(__kernel_end = .);
+    PROVIDE(__kernel_size = __kernel_end - __kernel_start);
+
+    .dynsym : {
+        *(.dynsym)
+    }
+
+    .gnu.hash : {
+        *(.gnu.hash)
+    }
+
+    .hash : {
+        *(.hash)
+    }
+
+    .dynstr : {
+        *(.dynstr)
+    }
+}

etc/ld/arm/aarch64-unknown-none.ld

@@ -1,67 +0,0 @@
-ENTRY(__aarch64_entry);
-
-/* KERNEL_PHYS_BASE = 0x40080000; */
-KERNEL_VIRT_OFFSET = 0xFFFFFF8000000000;
-
-SECTIONS {
-    /* . = KERNEL_PHYS_BASE; */
-    . = 0x0;
-
-    PROVIDE(__kernel_start = .);
-
-    /* .text.entry : {
-        *(.text.entry)
-    }
-
-    . = ALIGN(16);
-    . = . + KERNEL_VIRT_OFFSET; */
-
-    .text : {
-        KEEP(*(.text.entry));
-        KEEP(*(.text.vectors));
-        *(.text*)
-    }
-
-    . = ALIGN(4K);
-    .rodata : {
-        *(.rodata*)
-        *(.eh_frame*)
-
-        . = ALIGN(16);
-        PROVIDE(__init_array_start = .);
-        KEEP(*(.init_array*))
-        PROVIDE(__init_array_end = .);
-    }
-
-    . = ALIGN(4K);
-    PROVIDE(__rela_start = .);
-    .rela : {
-        *(.rela*)
-    }
-    PROVIDE(__rela_end = .);
-
-    /* . = ALIGN(4K);            */
-    /* .data.tables : {          */
-    /*     KEEP(*(.data.tables)) */
-    /* }                         */
-
-    . = ALIGN(4K);
-    .data : {
-        *(.data*)
-        *(.got*)
-    }
-
-    . = ALIGN(4K);
-    PROVIDE(__bss_start = .);
-    /* PROVIDE(__bss_start_phys = . - KERNEL_VIRT_OFFSET); */
-    .bss : {
-        *(COMMON)
-        *(.bss*)
-    }
-    . = ALIGN(4K);
-    PROVIDE(__bss_end = .);
-    /* PROVIDE(__bss_end_phys = . - KERNEL_VIRT_OFFSET); */
-    /* PROVIDE(__bss_size = __bss_end_phys - __bss_start_phys); */
-
-    PROVIDE(__kernel_end = .);
-};

etc/ld/riscv64-unknown-none.ld

@@ -1,52 +1,75 @@
-ENTRY(__rv64_entry);
-
-KERNEL_VIRT_OFFSET = 0xFFFFFFF000000000;
+ENTRY(__riscv64_entry);
 
 SECTIONS {
-    . = 0;
+    . = 0x0;
+
     PROVIDE(__kernel_start = .);
 
     .text : {
-        KEEP(*(.text.entry));
-        KEEP(*(.text.vectors));
+        *(.text.entry)
         *(.text*)
     }
 
     . = ALIGN(4K);
+
     .rodata : {
         *(.rodata*)
         *(.eh_frame*)
-    }
-
-    . = ALIGN(4K);
-    PROVIDE(__rela_start = .);
-    .rela : {
-        *(.rela*)
-    }
-    PROVIDE(__rela_end = .);
-
-    . = ALIGN(4K);
-    .data : {
-        *(.data*)
-        . = ALIGN(8);
-        /* PROVIDE(__global_pointer = . + 0x800 - KERNEL_VIRT_OFFSET); */
 
         . = ALIGN(16);
         PROVIDE(__init_array_start = .);
-        KEEP(*(.init_array*))
+        KEEP(*(.init_array*));
         PROVIDE(__init_array_end = .);
+    }
 
+    . = ALIGN(4K);
+
+    .rela : {
+        PROVIDE(__rela_start = .);
+        *(.rela*)
+        PROVIDE(__rela_end = .);
+    }
+
+    .got : {
         *(.got*)
     }
 
+    .dynamic : {
+        *(.dynamic)
+    }
+
+    . = ALIGN(4K);
+
+    .data : {
+        *(.data*)
+    }
+
     . = ALIGN(4K);
     PROVIDE(__bss_start = .);
+
     .bss : {
         *(COMMON)
         *(.bss*)
     }
+
     . = ALIGN(4K);
     PROVIDE(__bss_end = .);
-
     PROVIDE(__kernel_end = .);
-};
+    PROVIDE(__kernel_size = __kernel_end - __kernel_start);
+
+    .dynsym : {
+        *(.dynsym)
+    }
+
+    .gnu.hash : {
+        *(.gnu.hash)
+    }
+
+    .hash : {
+        *(.hash)
+    }
+
+    .dynstr : {
+        *(.dynstr)
+    }
+}

etc/ld/x86/i686-unknown-none.ld

@@ -1,53 +0,0 @@
-ENTRY(__i686_entry);
-
-KERNEL_PHYS_BASE = 0x100000;
-KERNEL_VIRT_OFFSET = 0xC0000000;
-
-SECTIONS {
-    . = KERNEL_PHYS_BASE;
-    PROVIDE(__kernel_start = . + KERNEL_VIRT_OFFSET);
-
-    .text.entry : {
-        KEEP(*(.multiboot))
-        *(.text.entry)
-    }
-
-    . = ALIGN(16);
-    . = . + KERNEL_VIRT_OFFSET;
-
-    .text : AT(. - KERNEL_VIRT_OFFSET) {
-        *(.text*)
-    }
-
-    .export.text : AT(. - KERNEL_VIRT_OFFSET) {
-        KEEP(*(.export.text*))
-    }
-
-    . = ALIGN(4K);
-    .rodata : AT(. - KERNEL_VIRT_OFFSET) {
-        *(.eh_frame*)
-        *(.rodata*)
-    }
-
-    . = ALIGN(4K);
-    .data.tables : AT (. - KERNEL_VIRT_OFFSET) {
-        KEEP(*(.data.tables))
-    }
-
-    .data : AT(. - KERNEL_VIRT_OFFSET) {
-        KEEP(*(.data.yboot))
-        *(.data*)
-        *(.got*)
-    }
-
-    . = ALIGN(4K);
-    PROVIDE(__bss_start_phys = . - KERNEL_VIRT_OFFSET);
-    .bss : AT(. - KERNEL_VIRT_OFFSET) {
-        *(COMMON)
-        *(.bss*)
-    }
-    . = ALIGN(4K);
-    PROVIDE(__bss_end_phys = . - KERNEL_VIRT_OFFSET);
-
-    PROVIDE(__kernel_end = .);
-};

etc/ld/x86_64-unknown-none.ld

@@ -1,13 +1,8 @@
 ENTRY(__x86_64_entry);
 
-/* KERNEL_PHYS_BASE = 0x200000; */
-KERNEL_VIRT_OFFSET = 0xFFFFFF8000000000;
-
 SECTIONS {
-    /* . = KERNEL_PHYS_BASE; */
-    /* PROVIDE(__kernel_start = . + KERNEL_VIRT_OFFSET); */
-
     . = 0x0;
+
     PROVIDE(__kernel_start = .);
 
     .text : {
@@ -15,24 +10,32 @@ SECTIONS {
         *(.text*)
     }
 
-    .export.text : {
-        KEEP(*(.export.text*))
-    }
-
     . = ALIGN(4K);
+
     .rodata : {
-        *(.eh_frame*)
         *(.rodata*)
+        *(.eh_frame*)
+
+        . = ALIGN(16);
+        PROVIDE(__init_array_start = .);
+        KEEP(*(.init_array*));
+        PROVIDE(__init_array_end = .);
     }
 
     . = ALIGN(4K);
-    PROVIDE(__rela_start = .);
+
     .rela : {
+        PROVIDE(__rela_start = .);
         *(.rela*)
+        PROVIDE(__rela_end = .);
+    }
+
+    .dynamic : {
+        *(.dynamic)
     }
-    PROVIDE(__rela_end = .);
 
     . = ALIGN(4K);
+
     .data : {
         KEEP(*(.data.yboot))
         *(.data*)
@@ -41,12 +44,30 @@ SECTIONS {
 
     . = ALIGN(4K);
     PROVIDE(__bss_start = .);
+
     .bss : {
         *(COMMON)
         *(.bss*)
     }
+
     . = ALIGN(4K);
     PROVIDE(__bss_end = .);
-
     PROVIDE(__kernel_end = .);
-};
+    PROVIDE(__kernel_size = __kernel_end - __kernel_start);
+
+    .dynsym : {
+        *(.dynsym)
+    }
+
+    .gnu.hash : {
+        *(.gnu.hash)
+    }
+
+    .hash : {
+        *(.hash)
+    }
+
+    .dynstr : {
+        *(.dynstr)
+    }
+}

kernel/Cargo.toml

@@ -72,10 +72,6 @@ ygg_driver_net_igbe.path = "driver/net/igbe"
 
 acpi.workspace = true
 
-[target.'cfg(target_arch = "x86")'.dependencies]
-kernel-arch-i686.workspace = true
-kernel-arch-x86.workspace = true
-
 [build-dependencies]
 abi-generator.workspace = true
 
@@ -86,7 +82,6 @@ prettyplease = "0.2.15"
 aarch64-cpu.workspace = true
 device-tree.workspace = true
 kernel-arch-x86_64.workspace = true
-kernel-arch-i686.workspace = true
 kernel-arch-x86.workspace = true
 kernel-arch-aarch64.workspace = true
 kernel-arch-riscv64.workspace = true

kernel/arch/Cargo.toml

@@ -9,9 +9,6 @@ kernel-arch-x86_64.path = "x86_64"
 [target.'cfg(all(target_os = "none", target_arch = "aarch64"))'.dependencies]
 kernel-arch-aarch64.path = "aarch64"
 
-[target.'cfg(all(target_os = "none", target_arch = "x86"))'.dependencies]
-kernel-arch-i686.path = "i686"
-
 [target.'cfg(all(target_os = "none", target_arch = "riscv64"))'.dependencies]
 kernel-arch-riscv64.path = "riscv64"
 

kernel/arch/aarch64/Cargo.toml

@@ -13,15 +13,9 @@ bitflags.workspace = true
 static_assertions.workspace = true
 aarch64-cpu.workspace = true
 tock-registers.workspace = true
-log.workspace = true
 
 [build-dependencies]
 cc = "1.0"
 
-[features]
-default = []
-aarch64_board_virt = []
-aarch64_board_raspi4b = []
-
 [lints]
 workspace = true

kernel/arch/aarch64/build.rs

@@ -5,7 +5,7 @@ fn build_fp_context_obj() {
 
     let out_dir = env::var("OUT_DIR").unwrap();
 
-    println!("cargo:rerun-if-changed={}", FP_CONTEXT_S);
+    println!("cargo:rerun-if-changed={FP_CONTEXT_S}");
 
     cc::Build::new()
         .out_dir(&out_dir)

kernel/arch/aarch64/src/mem/device.rs

@@ -1,95 +0,0 @@
-use core::ops::Range;
-
-use kernel_arch_interface::mem::DeviceMemoryAttributes;
-use libk_mm_interface::{
-    address::PhysicalAddress,
-    table::{DevicePageManager, DevicePageManagerLevel, EntryLevel},
-};
-
-use crate::mem::table::PageEntry;
-
-use super::{
-    table::{PageTable, L2, L3},
-    tlb_flush_range_va, DEVICE_MAPPING_OFFSET, DEVICE_MEMORY_L3_COUNT,
-};
-
-#[repr(transparent)]
-pub struct L2DeviceMemory(pub PageTable<L2>);
-#[repr(transparent)]
-pub struct L3DeviceMemory(pub [PageTable<L3>; DEVICE_MEMORY_L3_COUNT]);
-
-pub(super) static mut DEVICE_MEMORY: DevicePageManager<L3DeviceMemory, L2DeviceMemory> =
-    DevicePageManager::new(
-        L3DeviceMemory([PageTable::zeroed(); DEVICE_MEMORY_L3_COUNT]),
-        L2DeviceMemory(PageTable::zeroed()),
-    );
-
-impl DevicePageManagerLevel for L2DeviceMemory {
-    type Level = L2;
-    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
-    const INDEX_RANGE: Range<usize> = DEVICE_MEMORY_L3_COUNT..512;
-
-    fn map_page(
-        &mut self,
-        index: usize,
-        physical: PhysicalAddress,
-        attrs: &DeviceMemoryAttributes,
-    ) {
-        let _ = index;
-        let _ = physical;
-        let _ = attrs;
-        todo!()
-    }
-
-    fn unmap_page(&mut self, index: usize) {
-        let _ = index;
-        todo!()
-    }
-
-    fn is_mapped(&self, index: usize) -> bool {
-        let _ = index;
-        todo!()
-    }
-
-    fn flush_range(range: Range<usize>) {
-        let start = range.start * L2::SIZE + Self::VIRTUAL_BASE;
-        let size = (range.end - range.start) * L2::SIZE;
-        tlb_flush_range_va(start, size);
-    }
-}
-
-impl DevicePageManagerLevel for L3DeviceMemory {
-    type Level = L3;
-    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
-    const INDEX_RANGE: Range<usize> = 0..512 * DEVICE_MEMORY_L3_COUNT;
-
-    fn map_page(
-        &mut self,
-        index: usize,
-        physical: PhysicalAddress,
-        attrs: &DeviceMemoryAttributes,
-    ) {
-        let _ = attrs;
-        let l2i = index / 512;
-        let l3i = index % 512;
-        self.0[l2i][l3i] = PageEntry::device_page(physical);
-    }
-
-    // TODO
-    fn unmap_page(&mut self, index: usize) {
-        let _ = index;
-        todo!()
-    }
-
-    fn is_mapped(&self, index: usize) -> bool {
-        let l2i = index / 512;
-        let l3i = index % 512;
-        self.0[l2i][l3i].is_present()
-    }
-
-    fn flush_range(range: Range<usize>) {
-        let start = range.start * L3::SIZE + Self::VIRTUAL_BASE;
-        let size = (range.end - range.start) * L3::SIZE;
-        tlb_flush_range_va(start, size);
-    }
-}

kernel/arch/aarch64/src/mem/fixed.rs

@@ -0,0 +1,124 @@
+use core::ops::Range;
+
+use aarch64_cpu::registers::{TTBR0_EL1, TTBR1_EL1};
+use kernel_arch_interface::{mem::DeviceMemoryAttributes, KERNEL_VIRT_OFFSET};
+use libk_mm_interface::{
+    address::PhysicalAddress,
+    device::{DevicePageManager, DevicePageTableLevel},
+    table::EntryLevel,
+};
+
+use crate::mem::{
+    auto_lower_address,
+    table::{PageAttributes, PageEntry, PageTable, L1, L2, L3},
+    tlb_flush_range_va,
+};
+
+pub const IDENTITY_SIZE_L1: usize = 8;
+pub const DEVICE_L1: usize = IDENTITY_SIZE_L1;
+pub const DEVICE_MAPPING_L3_COUNT: usize = 32;
+pub const DEVICE_MAPPING_OFFSET: usize = KERNEL_VIRT_OFFSET + (DEVICE_L1 << L1::SHIFT);
+
+#[repr(transparent)]
+pub struct L2DeviceMemory(pub PageTable<L2>);
+#[repr(transparent)]
+pub struct L3DeviceMemory(pub [PageTable<L3>; DEVICE_MAPPING_L3_COUNT]);
+
+static mut KERNEL_L1: PageTable<L1> = PageTable::zeroed();
+pub(super) static mut DEVICE_MEMORY: DevicePageManager<L3DeviceMemory, L2DeviceMemory> =
+    DevicePageManager::new(
+        L3DeviceMemory([PageTable::zeroed(); DEVICE_MAPPING_L3_COUNT]),
+        L2DeviceMemory(PageTable::zeroed()),
+    );
+
+impl DevicePageTableLevel for L2DeviceMemory {
+    type Level = L2;
+    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
+    const INDEX_RANGE: Range<usize> = DEVICE_MAPPING_L3_COUNT..512;
+
+    fn map_page(
+        &mut self,
+        index: usize,
+        physical: PhysicalAddress,
+        attrs: &DeviceMemoryAttributes,
+    ) {
+        let _ = attrs;
+        self.0[index] = PageEntry::device_block(physical);
+    }
+
+    fn unmap_page(&mut self, index: usize) {
+        self.0[index] = PageEntry::INVALID;
+    }
+
+    fn is_mapped(&self, index: usize) -> bool {
+        self.0[index].is_present()
+    }
+
+    fn flush_range(range: Range<usize>) {
+        let start = range.start * L2::SIZE + Self::VIRTUAL_BASE;
+        let size = (range.end - range.start) * L2::SIZE;
+        tlb_flush_range_va(start, size);
+    }
+}
+
+impl DevicePageTableLevel for L3DeviceMemory {
+    type Level = L3;
+    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
+    const INDEX_RANGE: Range<usize> = 0..512 * DEVICE_MAPPING_L3_COUNT;
+
+    fn map_page(
+        &mut self,
+        index: usize,
+        physical: PhysicalAddress,
+        attrs: &DeviceMemoryAttributes,
+    ) {
+        let _ = attrs;
+        let l2i = index / 512;
+        let l3i = index % 512;
+        self.0[l2i][l3i] = PageEntry::device_page(physical);
+    }
+
+    fn unmap_page(&mut self, index: usize) {
+        let l2i = index / 512;
+        let l3i = index % 512;
+        self.0[l2i][l3i] = PageEntry::INVALID;
+    }
+
+    fn is_mapped(&self, index: usize) -> bool {
+        let l2i = index / 512;
+        let l3i = index % 512;
+        self.0[l2i][l3i].is_present()
+    }
+
+    fn flush_range(range: Range<usize>) {
+        let start = range.start * L3::SIZE + Self::VIRTUAL_BASE;
+        let size = (range.end - range.start) * L3::SIZE;
+        tlb_flush_range_va(start, size);
+    }
+}
+
+pub unsafe fn setup() {
+    // 0..IDENTITY_SIZE_L1 -> lower RAM region
+    for i in 0..IDENTITY_SIZE_L1 {
+        let phys = PhysicalAddress::from_usize(i << L1::SHIFT);
+        KERNEL_L1[i] = PageEntry::normal_block(phys, PageAttributes::empty());
+    }
+
+    // DEVICE_L1 -> Device L2 table
+    //               0..DEVICE_MAPPING_L3_COUNT -> Device L3 tables -> Device L3 pages
+    //               ..512                      -> Device L2 pages
+    for i in 0..DEVICE_MAPPING_L3_COUNT {
+        let phys =
+            PhysicalAddress::from_usize(auto_lower_address(&raw const DEVICE_MEMORY.normal.0[i]));
+        DEVICE_MEMORY.large.0[i] = PageEntry::table(phys, PageAttributes::empty());
+    }
+    let phys = PhysicalAddress::from_usize(auto_lower_address(&raw const DEVICE_MEMORY.large.0));
+    KERNEL_L1[DEVICE_L1] = PageEntry::table(phys, PageAttributes::empty());
+}
+
+pub unsafe fn load() {
+    let ttbr_physical = auto_lower_address(&raw const KERNEL_L1) as u64;
+
+    TTBR0_EL1.set_baddr(ttbr_physical);
+    TTBR1_EL1.set_baddr(ttbr_physical);
+}

kernel/arch/aarch64/src/mem/intrinsics.rs

@@ -1,10 +1,57 @@
 use core::sync::atomic::{self, Ordering};
 
-use aarch64_cpu::{asm::barrier, registers::PAR_EL1};
+use aarch64_cpu::{
+    asm::barrier,
+    registers::{PAR_EL1, SCTLR_EL1},
+};
 use libk_mm_interface::table::{EntryLevel, EntryLevelExt};
-use tock_registers::interfaces::Readable;
+use tock_registers::interfaces::{ReadWriteable, Readable};
 
-use super::table::L3;
+use crate::mem::table::L3;
+
+/// Enables data cache.
+///
+/// # Safety
+///
+/// Manipulates low-level machine state, use with care.
+pub unsafe fn enable_dcache() {
+    barrier::dsb(barrier::ISHST);
+    barrier::isb(barrier::SY);
+
+    SCTLR_EL1.modify(SCTLR_EL1::C::Cacheable);
+
+    barrier::dsb(barrier::ISH);
+    barrier::isb(barrier::SY);
+}
+
+/// Enables instruction cache.
+///
+/// # Safety
+///
+/// Manipulates low-level machine state, use with care.
+pub unsafe fn enable_icache() {
+    barrier::isb(barrier::SY);
+
+    SCTLR_EL1.modify(SCTLR_EL1::I::Cacheable);
+
+    barrier::dsb(barrier::ISH);
+    barrier::isb(barrier::SY);
+}
+
+/// Disables instruction cache.
+///
+/// # Safety
+///
+/// Manipulates low-level machine state, use with care. Might break some instructions.
+pub unsafe fn disable_icache() {
+    barrier::isb(barrier::SY);
+
+    ic_iallu();
+    SCTLR_EL1.modify(SCTLR_EL1::I::NonCacheable);
+
+    barrier::dsb(barrier::ISH);
+    barrier::isb(barrier::SY);
+}
 
 #[inline]
 pub fn tlb_flush_asid(asid: u8) {
@@ -38,6 +85,7 @@ pub fn tlb_flush_vaae1(page: usize) {
     barrier::isb(barrier::SY);
 }
 
+#[inline]
 pub fn tlb_flush_range_va(base: usize, size: usize) {
     let end = (base + size).page_align_up::<L3>();
     let base = base.page_align_down::<L3>();

kernel/arch/aarch64/src/mem/mod.rs

@@ -1,6 +1,7 @@
+#![allow(clippy::missing_safety_doc)]
 use aarch64_cpu::{
     asm::barrier,
-    registers::{MAIR_EL1, SCTLR_EL1, TCR_EL1, TTBR0_EL1, TTBR1_EL1},
+    registers::{MAIR_EL1, SCTLR_EL1, TCR_EL1},
 };
 use kernel_arch_interface::{
     mem::{DeviceMemoryAttributes, KernelTableManager, RawDeviceMemoryMapping},
@@ -8,36 +9,41 @@ use kernel_arch_interface::{
     KERNEL_VIRT_OFFSET,
 };
 use libk_mm_interface::{address::PhysicalAddress, table::EntryLevel};
-use table::{PageAttributes, PageEntry, PageTable, L1};
 use tock_registers::interfaces::{ReadWriteable, Writeable};
-
-mod intrinsics;
-
-pub mod device;
-pub mod process;
-pub mod table;
-
-pub use intrinsics::*;
 use yggdrasil_abi::error::Error;
 
-use crate::ArchitectureImpl;
+pub use intrinsics::*;
+
+use crate::{mem::table::L1, ArchitectureImpl};
+
+pub mod fixed;
+pub mod intrinsics;
+pub mod process;
+pub mod table;
 
 #[derive(Debug)]
 pub struct KernelTableManagerImpl;
 
+static KERNEL_MEMORY_LOCK: IrqSafeSpinlock<ArchitectureImpl, ()> = IrqSafeSpinlock::new(());
+
 impl KernelTableManager for KernelTableManagerImpl {
-    fn virtualize(phys: u64) -> usize {
-        if phys as usize >= IDENTITY_SIZE {
-            unreachable!("Invalid physical address to virtualize: {phys:#x}");
+    fn virtualize(address: u64) -> usize {
+        let address = address as usize;
+        if address < fixed::IDENTITY_SIZE_L1 * L1::SIZE {
+            address + KERNEL_VIRT_OFFSET
+        } else {
+            panic!("Invalid physical address: {address:#x}");
         }
-        phys as usize + KERNEL_VIRT_OFFSET
     }
 
-    fn physicalize(virt: usize) -> u64 {
-        if virt < KERNEL_VIRT_OFFSET || virt - KERNEL_VIRT_OFFSET >= IDENTITY_SIZE {
-            unreachable!("Invalid virtualized address: {virt:#x}");
+    fn physicalize(address: usize) -> u64 {
+        if address < KERNEL_VIRT_OFFSET
+            || address - KERNEL_VIRT_OFFSET >= fixed::IDENTITY_SIZE_L1 * L1::SIZE
+        {
+            panic!("Invalid virtual (-> physical) address {address:#x}");
         }
-        (virt - KERNEL_VIRT_OFFSET) as _
+
+        (address - KERNEL_VIRT_OFFSET) as u64
     }
 
     unsafe fn map_device_pages(
@@ -45,93 +51,66 @@ impl KernelTableManager for KernelTableManagerImpl {
         count: usize,
         attrs: DeviceMemoryAttributes,
     ) -> Result<RawDeviceMemoryMapping<Self>, Error> {
-        let _guard = DEVICE_MEMORY_LOCK.lock();
+        let _lock = KERNEL_MEMORY_LOCK.lock();
         #[allow(static_mut_refs)]
-        unsafe {
-            device::DEVICE_MEMORY.map_device_pages(PhysicalAddress::from_u64(base), count, attrs)
-        }
+        fixed::DEVICE_MEMORY.map_device_pages(PhysicalAddress::from_u64(base), count, attrs)
     }
 
-    unsafe fn unmap_device_pages(_mapping: &RawDeviceMemoryMapping<Self>) {
-        // TODO
+    unsafe fn unmap_device_pages(mapping: &RawDeviceMemoryMapping<Self>) {
+        let _lock = KERNEL_MEMORY_LOCK.lock();
+        #[allow(static_mut_refs)]
+        fixed::DEVICE_MEMORY.unmap_device_pages(mapping);
     }
 }
 
-// 64GiB of identity-mapped memory
-pub const IDENTITY_SIZE: usize = 64 * L1::SIZE;
-pub const IDENTITY_L1_START: usize = (KERNEL_VIRT_OFFSET >> L1::SHIFT) & 0x1FF;
-// 1GiB of memory-mapped devices
-pub const DEVICE_MEMORY_L1: usize = IDENTITY_L1_START + IDENTITY_SIZE / L1::SIZE;
-pub const DEVICE_MEMORY_L3_COUNT: usize = 32;
-pub const DEVICE_MAPPING_OFFSET: usize = KERNEL_VIRT_OFFSET + DEVICE_MEMORY_L1 * L1::SIZE;
-static DEVICE_MEMORY_LOCK: IrqSafeSpinlock<ArchitectureImpl, ()> = IrqSafeSpinlock::new(());
-
-static mut FIXED_L1: PageTable<L1> = const {
-    if IDENTITY_L1_START != 0 {
-        panic!("Invalid KERNEL_VIRT_OFFSET");
-    }
-    if IDENTITY_L1_START + IDENTITY_SIZE / L1::SIZE >= 500 {
-        panic!("Invalid KERNEL_VIRT_OFFSET + IDENTITY_SIZE");
-    }
-
-    let mut table = PageTable::<L1>::zeroed();
-    let mut i = 0;
-
-    while i < IDENTITY_SIZE / L1::SIZE {
-        let phys = PhysicalAddress::from_usize(i * L1::SIZE);
-        table.entries[i + IDENTITY_L1_START] =
-            PageEntry::normal_block(phys, PageAttributes::empty());
-        i += 1;
-    }
-
-    table
-};
-
-pub unsafe fn setup_fixed_tables() {
-    let device_l2_physical = auto_lower_address(&raw const device::DEVICE_MEMORY.large);
-    FIXED_L1[DEVICE_MEMORY_L1] = PageEntry::table(
-        PhysicalAddress::from_usize(device_l2_physical),
-        PageAttributes::empty(),
-    );
-    for i in 0..DEVICE_MEMORY_L3_COUNT {
-        let device_l3_physical = auto_lower_address(&raw const device::DEVICE_MEMORY.normal.0[i]);
-        device::DEVICE_MEMORY.large.0[i] = PageEntry::table(
-            PhysicalAddress::from_usize(device_l3_physical),
-            PageAttributes::empty(),
-        );
+#[inline]
+pub fn auto_lower_address<T>(ptr: *const T) -> usize {
+    let address = ptr.addr();
+    if address < KERNEL_VIRT_OFFSET {
+        address
+    } else {
+        address - KERNEL_VIRT_OFFSET
     }
 }
 
-pub fn load_fixed_tables() {
-    let l1_physical = auto_lower_address(&raw const FIXED_L1);
-    TTBR0_EL1.set_baddr(l1_physical as _);
-    TTBR1_EL1.set_baddr(l1_physical as _);
+#[inline]
+pub fn auto_upper_address<T>(ptr: *const T) -> usize {
+    let address = ptr.addr();
+    if address < KERNEL_VIRT_OFFSET {
+        address + KERNEL_VIRT_OFFSET
+    } else {
+        address
+    }
 }
 
-pub fn configure_mmu() {
+fn setup_memory_attributes() {
     // TODO: Figure out why WriteBack_NonTransient_ReadWriteAlloc doesn't work on Pi 4B
+
     MAIR_EL1.write(
         //// Attribute 0 -- normal memory
         MAIR_EL1::Attr0_Normal_Inner::WriteBack_NonTransient +
-        MAIR_EL1::Attr0_Normal_Outer::WriteBack_NonTransient +
-        //// Attribute 1 -- normal non-cacheable memory
-        MAIR_EL1::Attr0_Normal_Inner::NonCacheable +
-        MAIR_EL1::Attr0_Normal_Outer::NonCacheable +
-        //// Attribute 2 -- device memory
-        MAIR_EL1::Attr1_Device::nonGathering_nonReordering_EarlyWriteAck,
+         MAIR_EL1::Attr0_Normal_Outer::WriteBack_NonTransient +
+         //// Attribute 1 -- normal non-cacheable memory
+         MAIR_EL1::Attr0_Normal_Inner::NonCacheable +
+         MAIR_EL1::Attr0_Normal_Outer::NonCacheable +
+         //// Attribute 2 -- device memory
+         MAIR_EL1::Attr1_Device::nonGathering_nonReordering_EarlyWriteAck,
     );
+}
 
+unsafe fn enable_mmu() {
     TCR_EL1.write(
         TCR_EL1::AS::ASID8Bits +
-             TCR_EL1::A1::TTBR0 +
-             TCR_EL1::HD::CLEAR +
-             // General
-             TCR_EL1::IPS::Bits_48 +
-             // TTBR0
-             TCR_EL1::TG0::KiB_4 + TCR_EL1::T0SZ.val(25) + TCR_EL1::SH0::Inner +
-             // TTBR1
-             TCR_EL1::TG1::KiB_4 + TCR_EL1::T1SZ.val(25) + TCR_EL1::SH1::Inner,
+         TCR_EL1::A1::TTBR0 +
+         TCR_EL1::HD::CLEAR +
+         // General
+         TCR_EL1::IPS::Bits_48 +
+         // TTBR0
+         TCR_EL1::TG0::KiB_4 + TCR_EL1::T0SZ.val(25) + TCR_EL1::SH0::Inner +
+         // TTBR1
+         TCR_EL1::TG1::KiB_4 + TCR_EL1::T1SZ.val(25) + TCR_EL1::SH1::Inner,
     );
+
     barrier::dsb(barrier::ISHST);
     barrier::isb(barrier::SY);
 
@@ -148,62 +127,20 @@ pub fn configure_mmu() {
 
     barrier::dsb(barrier::ISH);
     barrier::isb(barrier::SY);
-}
 
-pub fn enable_mmu() {
     // Enable translation
     SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
+
+    // Enable caches
+    enable_icache();
+    enable_dcache();
 }
 
-/// Enables data cache.
-///
-/// # Safety
-///
-/// Manipulates low-level machine state, use with care.
-pub unsafe fn enable_dcache() {
-    barrier::dsb(barrier::ISHST);
-    barrier::isb(barrier::SY);
-
-    SCTLR_EL1.modify(SCTLR_EL1::C::Cacheable);
-
-    barrier::dsb(barrier::ISH);
-    barrier::isb(barrier::SY);
-}
-
-/// Enables instruction cache.
-///
-/// # Safety
-///
-/// Manipulates low-level machine state, use with care.
-pub unsafe fn enable_icache() {
-    barrier::isb(barrier::SY);
-
-    SCTLR_EL1.modify(SCTLR_EL1::I::Cacheable);
-
-    barrier::dsb(barrier::ISH);
-    barrier::isb(barrier::SY);
-}
-
-/// Disables instruction cache.
-///
-/// # Safety
-///
-/// Manipulates low-level machine state, use with care. Might break some instructions.
-pub unsafe fn disable_icache() {
-    barrier::isb(barrier::SY);
-
-    ic_iallu();
-    SCTLR_EL1.modify(SCTLR_EL1::I::NonCacheable);
-
-    barrier::dsb(barrier::ISH);
-    barrier::isb(barrier::SY);
-}
-
-fn auto_lower_address<T>(ptr: *const T) -> usize {
-    let address = ptr.addr();
-    if address < KERNEL_VIRT_OFFSET {
-        address
-    } else {
-        address - KERNEL_VIRT_OFFSET
+pub unsafe fn init_lower(bsp: bool) {
+    setup_memory_attributes();
+    if bsp {
+        fixed::setup();
     }
+    fixed::load();
+    enable_mmu();
 }

kernel/arch/aarch64/src/mem/table.rs

@@ -56,7 +56,7 @@ bitflags! {
 #[derive(Clone, Copy)]
 #[repr(C, align(0x1000))]
 pub struct PageTable<L: EntryLevel> {
-    pub entries: [PageEntry<L>; 512],
+    entries: [PageEntry<L>; 512],
 }
 
 #[derive(Clone, Copy)]
@@ -262,13 +262,18 @@ impl<L: NonTerminalEntryLevel> PageEntry<L> {
         )
     }
 
-    pub const fn normal_block(phys: PhysicalAddress, attrs: PageAttributes) -> Self {
-        const ATTR: u64 = PageAttributes::BLOCK.bits()
-            | PageAttributes::PRESENT.bits()
-            | PageAttributes::ACCESS.bits()
-            | PageAttributes::SH_OUTER.bits()
-            | PageAttributes::PAGE_ATTR_NORMAL.bits();
-        Self(phys.into_u64() | attrs.bits() | ATTR, PhantomData)
+    pub fn normal_block(phys: PhysicalAddress, attrs: PageAttributes) -> Self {
+        Self(
+            phys.into_u64()
+                | (PageAttributes::BLOCK
+                    | PageAttributes::PRESENT
+                    | PageAttributes::ACCESS
+                    | PageAttributes::SH_OUTER
+                    | PageAttributes::PAGE_ATTR_NORMAL
+                    | attrs)
+                    .bits(),
+            PhantomData,
+        )
     }
 
     pub fn device_block(phys: PhysicalAddress) -> Self {

kernel/arch/i686/Cargo.toml

@@ -1,16 +0,0 @@
-[package]
-name = "kernel-arch-i686"
-version = "0.1.0"
-edition = "2021"
-
-[dependencies]
-yggdrasil-abi.workspace = true
-kernel-arch-interface.workspace = true
-libk-mm-interface.workspace = true
-device-api = { workspace = true, features = ["derive"] }
-kernel-arch-x86.workspace = true
-
-bitflags.workspace = true
-static_assertions.workspace = true
-tock-registers.workspace = true
-log.workspace = true

kernel/arch/i686/src/context.S

@@ -1,116 +0,0 @@
-// vi: set ft=asm :
-
-.macro SAVE_TASK_STATE
-    push %edi
-    push %esi
-    push %ebp
-    push %ebx
-.endm
-
-.macro LOAD_TASK_STATE
-    pop %ebx
-    pop %ebp
-    pop %esi
-    pop %edi
-.endm
-
-.section .text
-
-.global __i686_task_enter_kernel
-.global __i686_task_enter_user
-.global __i686_task_enter_from_fork
-.global __i686_switch_task
-.global __i686_enter_task
-.global __i686_switch_and_drop
-
-__i686_task_enter_kernel:
-    // %esp + 4: argument
-    // %esp + 0: entry
-    xor %ecx, %ecx
-    xchg (%esp), %ecx
-
-    // Enable IRQ in EFLAGS
-    pushfl
-    pop %edx
-    or $(1 << 9), %edx
-
-    // Setup iret
-    push %edx       // eflags
-    pushl $0x08     // cs
-    push %ecx       // eip
-
-    iret
-
-__i686_task_enter_user:
-    pop %edx // User %esp
-    pop %ecx // entry
-    pop %eax // flags
-
-    // Setup iret
-
-    // %ss:%esp
-    pushl $0x23
-    push %edx
-
-    // %eflags
-    push %eax
-
-    // %cs:%eip
-    pushl $0x1B
-    push %ecx
-
-    mov $0x23, %bx
-    mov %bx, %ds
-    mov %bx, %es
-    mov %bx, %fs
-
-    iret
-
-__i686_task_enter_from_fork:
-    jmp .
-
-__i686_switch_task:
-    // %esp + 0: return
-    // %esp + 4: destination
-    // %esp + 8: source
-    mov 4(%esp), %eax
-    mov 8(%esp), %ecx
-
-    SAVE_TASK_STATE
-
-    // Store stack to "from" context
-    mov %esp, (%ecx)
-
-    // Load stack from "to" context
-    mov (%eax), %esp
-
-    LOAD_TASK_STATE
-
-    ret
-
-__i686_enter_task:
-    // %esp + 0: return
-    // %esp + 4: destination
-
-    // Switch to destination stack
-    mov 4(%esp), %eax
-    mov (%eax), %esp
-
-    LOAD_TASK_STATE
-
-    ret
-
-__i686_switch_and_drop:
-    // %esp + 0: return
-    // %esp + 4: destination
-    // %esp + 8: thread to drop
-    mov 8(%esp), %ecx
-    mov 4(%esp), %eax
-    // Switch to stack
-    mov (%eax), %esp
-
-    LOAD_TASK_STATE
-
-    // TODO actually drop the thread
-
-    ret

kernel/arch/i686/src/context.rs

@@ -1,462 +0,0 @@
-use core::{arch::global_asm, cell::UnsafeCell, marker::PhantomData};
-
-use kernel_arch_interface::{
-    mem::{KernelTableManager, PhysicalMemoryAllocator},
-    task::{StackBuilder, TaskContext, TaskFrame, UserContextInfo},
-};
-use kernel_arch_x86::registers::{FpuContext, CR3};
-use libk_mm_interface::address::{AsPhysicalAddress, PhysicalAddress};
-use tock_registers::interfaces::Writeable;
-use yggdrasil_abi::{arch::SavedFrame, error::Error};
-
-use crate::{
-    gdt::{self, TSS},
-    mem::KERNEL_TABLES,
-};
-
-#[allow(unused)]
-#[repr(C)]
-pub struct ExceptionFrame {
-    pub eax: u32,
-    pub ecx: u32,
-    pub edx: u32,
-    pub ebx: u32,
-    pub ebp: u32,
-    pub esi: u32,
-    pub edi: u32,
-
-    pub exc_number: u32,
-    pub exc_code: u32,
-
-    pub eip: u32,
-    pub cs: u32,
-    pub eflags: u32,
-    pub esp: u32,
-    pub ss: u32,
-}
-
-#[allow(unused)]
-#[derive(Debug)]
-#[repr(C)]
-pub struct SyscallFrame {
-    pub eax: usize,
-    // ebx, ecx, edx, esi, edi, ebp
-    pub args: [usize; 6],
-
-    pub eip: u32,
-    pub cs: u32,
-    pub eflags: u32,
-    pub esp: u32,
-    pub ss: u32,
-}
-
-#[allow(unused)]
-#[repr(C)]
-pub struct InterruptFrame {
-    pub eax: u32,
-    pub ecx: u32,
-    pub edx: u32,
-    pub ebx: u32,
-    pub ebp: u32,
-    pub esi: u32,
-    pub edi: u32,
-
-    pub irq_number: u32,
-
-    pub eip: u32,
-    pub cs: u32,
-    pub eflags: u32,
-    esp: u32,
-    ss: u32,
-}
-
-#[repr(C, align(0x10))]
-struct Inner {
-    // 0x00
-    sp: usize,
-
-    gs_base: usize,
-}
-
-#[allow(dead_code)]
-pub struct TaskContextImpl<
-    K: KernelTableManager,
-    PA: PhysicalMemoryAllocator<Address = PhysicalAddress>,
-> {
-    inner: UnsafeCell<Inner>,
-    fpu_context: Option<UnsafeCell<FpuContext>>,
-    stack_base_phys: PhysicalAddress,
-    stack_size: usize,
-
-    cr3: u32,
-    tss_esp0: u32,
-
-    _pd: PhantomData<(K, PA)>,
-}
-
-impl<K: KernelTableManager, PA: PhysicalMemoryAllocator<Address = PhysicalAddress>>
-    TaskContextImpl<K, PA>
-{
-    unsafe fn store_state(&self) {
-        if let Some(fpu) = self.fpu_context.as_ref() {
-            FpuContext::store(fpu.get());
-        }
-    }
-
-    unsafe fn load_state(&self) {
-        if let Some(fpu) = self.fpu_context.as_ref() {
-            FpuContext::restore(fpu.get());
-        }
-        gdt::set_gs_base((*self.inner.get()).gs_base);
-        TSS.esp0 = self.tss_esp0;
-        CR3.set(self.cr3 as _);
-    }
-}
-
-impl<K: KernelTableManager, PA: PhysicalMemoryAllocator<Address = PhysicalAddress>>
-    TaskContext<K, PA> for TaskContextImpl<K, PA>
-{
-    const SIGNAL_STACK_EXTRA_ALIGN: usize = 0;
-    const USER_STACK_EXTRA_ALIGN: usize = 0;
-
-    fn user(context: UserContextInfo) -> Result<Self, Error> {
-        const USER_TASK_PAGES: usize = 16;
-
-        let stack_base_phys = PA::allocate_contiguous_pages(USER_TASK_PAGES)?;
-        let stack_base = stack_base_phys.raw_virtualize::<K>();
-
-        let mut stack = StackBuilder::new(stack_base, USER_TASK_PAGES * 0x1000);
-        let mut flags = 0x200;
-
-        if context.single_step {
-            flags |= 1 << 8;
-        }
-
-        stack.push(flags);
-        stack.push(context.entry as _);
-        stack.push(context.stack_pointer);
-
-        setup_common_context(&mut stack, __i686_task_enter_user as _);
-
-        let sp = stack.build();
-        let esp0 = stack_base + USER_TASK_PAGES * 0x1000;
-        let fpu_context = FpuContext::new(true);
-
-        Ok(Self {
-            inner: UnsafeCell::new(Inner {
-                sp,
-                gs_base: context.thread_pointer,
-            }),
-            fpu_context: Some(UnsafeCell::new(fpu_context)),
-            stack_base_phys,
-            stack_size: USER_TASK_PAGES * 0x1000,
-
-            tss_esp0: esp0 as _,
-            cr3: context.address_space.try_into().unwrap(),
-
-            _pd: PhantomData,
-        })
-    }
-
-    fn kernel(
-        entry: extern "C" fn(usize) -> !,
-        arg: usize,
-    ) -> Result<Self, yggdrasil_abi::error::Error> {
-        const KERNEL_TASK_PAGES: usize = 32;
-
-        let stack_base_phys = PA::allocate_contiguous_pages(KERNEL_TASK_PAGES)?;
-        let stack_base = stack_base_phys.raw_virtualize::<K>();
-
-        let mut stack = StackBuilder::new(stack_base, KERNEL_TASK_PAGES * 0x1000);
-
-        // Entry and argument
-        stack.push(arg);
-        stack.push(entry as _);
-
-        // XXX
-        setup_common_context(&mut stack, __i686_task_enter_kernel as _);
-
-        let sp = stack.build();
-        let cr3 = unsafe {
-            KERNEL_TABLES
-                .lock()
-                .as_physical_address()
-                .try_into_u32()
-                .unwrap()
-        };
-
-        // TODO stack is leaked
-
-        Ok(Self {
-            inner: UnsafeCell::new(Inner { sp, gs_base: 0 }),
-            fpu_context: None,
-            stack_base_phys,
-            stack_size: KERNEL_TASK_PAGES * 0x1000,
-
-            tss_esp0: 0,
-            cr3,
-
-            _pd: PhantomData,
-        })
-    }
-
-    unsafe fn switch(&self, from: &Self) {
-        if core::ptr::addr_eq(self, from) {
-            return;
-        }
-
-        from.store_state();
-        self.load_state();
-
-        __i686_switch_task(self.inner.get(), from.inner.get());
-    }
-
-    unsafe fn enter(&self) -> ! {
-        self.load_state();
-        __i686_enter_task(self.inner.get())
-    }
-
-    unsafe fn switch_and_drop(&self, thread: *const ()) {
-        self.load_state();
-        __i686_switch_and_drop(self.inner.get(), thread);
-    }
-
-    fn set_thread_pointer(&self, tp: usize) {
-        unsafe { (*self.inner.get()).gs_base = tp };
-        gdt::set_gs_base(tp);
-    }
-
-    fn align_stack_for_entry(sp: usize) -> usize {
-        (sp & !0xF) - 12
-    }
-}
-
-fn setup_common_context(builder: &mut StackBuilder, entry: usize) {
-    builder.push(entry);
-
-    builder.push(0); // %edi
-    builder.push(0); // %esi
-    builder.push(0); // %ebp
-    builder.push(0); // %ebx
-}
-
-extern "C" {
-    fn __i686_task_enter_kernel();
-    fn __i686_task_enter_user();
-    fn __i686_task_enter_from_fork();
-    fn __i686_enter_task(to: *mut Inner) -> !;
-    fn __i686_switch_task(to: *mut Inner, from: *mut Inner);
-    fn __i686_switch_and_drop(to: *mut Inner, from: *const ());
-}
-
-impl TaskFrame for SyscallFrame {
-    fn store(&self) -> SavedFrame {
-        SavedFrame {
-            eax: self.eax as _,
-            ecx: self.args[1] as _,
-            edx: self.args[2] as _,
-            ebx: self.args[0] as _,
-            ebp: self.args[5] as _,
-            esi: self.args[3] as _,
-            edi: self.args[4] as _,
-
-            user_ip: self.eip,
-            user_sp: self.esp,
-            eflags: self.eflags,
-        }
-    }
-
-    fn restore(&mut self, saved: &SavedFrame) {
-        self.eax = saved.eax as _;
-        self.args[0] = saved.ebx as _;
-        self.args[1] = saved.ecx as _;
-        self.args[2] = saved.edx as _;
-        self.args[3] = saved.esi as _;
-        self.args[4] = saved.edi as _;
-        self.args[5] = saved.ebp as _;
-
-        self.eip = saved.user_ip;
-        self.esp = saved.user_sp;
-        self.eflags = saved.eflags;
-    }
-
-    fn user_sp(&self) -> usize {
-        todo!()
-    }
-
-    fn user_ip(&self) -> usize {
-        todo!()
-    }
-
-    fn argument(&self) -> u64 {
-        self.args[0] as _
-    }
-
-    fn set_user_sp(&mut self, value: usize) {
-        self.esp = value as _;
-    }
-
-    fn set_user_ip(&mut self, value: usize) {
-        self.eip = value as _;
-    }
-
-    fn set_argument(&mut self, value: u64) {
-        // TODO implement ABI for passing 64-bit values via EAX/EDX
-        if value & (1 << 63) != 0 {
-            assert_eq!(value & 0xFFFFFFFF00000000, 0xFFFFFFFF00000000);
-        }
-
-        self.eax = value as usize;
-    }
-
-    fn set_single_step(&mut self, _step: bool) {
-        todo!()
-    }
-
-    fn set_return_value(&mut self, value: u64) {
-        // TODO implement ABI for returning 64-bit values via EAX/EDX
-        if value & (1 << 63) != 0 {
-            assert_eq!(value & 0xFFFFFFFF00000000, 0xFFFFFFFF00000000);
-        }
-
-        self.eax = value as usize;
-    }
-}
-
-impl TaskFrame for InterruptFrame {
-    fn store(&self) -> SavedFrame {
-        SavedFrame {
-            eax: self.eax,
-            ecx: self.ecx,
-            edx: self.edx,
-            ebx: self.ebx,
-            ebp: self.ebp,
-            esi: self.esi,
-            edi: self.edi,
-
-            user_ip: self.eip,
-            user_sp: self.esp,
-            eflags: self.eflags,
-        }
-    }
-
-    fn restore(&mut self, _saved: &SavedFrame) {
-        todo!()
-    }
-
-    fn user_sp(&self) -> usize {
-        todo!()
-    }
-
-    fn user_ip(&self) -> usize {
-        todo!()
-    }
-
-    fn argument(&self) -> u64 {
-        todo!()
-    }
-
-    fn set_user_sp(&mut self, value: usize) {
-        self.esp = value as u32;
-    }
-
-    fn set_user_ip(&mut self, value: usize) {
-        self.eip = value as u32;
-    }
-
-    fn set_argument(&mut self, value: u64) {
-        // TODO implement ABI for returning 64-bit values via EAX/EDX
-        if value & (1 << 63) != 0 {
-            assert_eq!(value & 0xFFFFFFFF00000000, 0xFFFFFFFF00000000);
-        }
-
-        self.eax = value as u32;
-    }
-
-    fn set_single_step(&mut self, step: bool) {
-        if step {
-            self.eflags |= 1 << 8;
-        } else {
-            self.eflags &= !(1 << 8);
-        }
-    }
-
-    fn set_return_value(&mut self, value: u64) {
-        // TODO implement ABI for returning 64-bit values via EAX/EDX
-        if value & (1 << 63) != 0 {
-            assert_eq!(value & 0xFFFFFFFF00000000, 0xFFFFFFFF00000000);
-        }
-
-        self.eax = value as u32;
-    }
-}
-
-impl TaskFrame for ExceptionFrame {
-    fn store(&self) -> SavedFrame {
-        SavedFrame {
-            eax: self.eax,
-            ecx: self.ecx,
-            edx: self.edx,
-            ebx: self.ebx,
-            ebp: self.ebp,
-            esi: self.esi,
-            edi: self.edi,
-
-            user_ip: self.eip,
-            user_sp: self.esp,
-            eflags: self.eflags,
-        }
-    }
-
-    fn restore(&mut self, _saved: &SavedFrame) {
-        todo!()
-    }
-
-    fn user_sp(&self) -> usize {
-        todo!()
-    }
-
-    fn user_ip(&self) -> usize {
-        self.eip as _
-    }
-
-    fn argument(&self) -> u64 {
-        todo!()
-    }
-
-    fn set_user_sp(&mut self, value: usize) {
-        self.esp = value as u32;
-    }
-
-    fn set_user_ip(&mut self, value: usize) {
-        self.eip = value as u32;
-    }
-
-    fn set_argument(&mut self, value: u64) {
-        // TODO implement ABI for returning 64-bit values via EAX/EDX
-        if value & (1 << 63) != 0 {
-            assert_eq!(value & 0xFFFFFFFF00000000, 0xFFFFFFFF00000000);
-        }
-
-        self.eax = value as u32;
-    }
-
-    fn set_single_step(&mut self, step: bool) {
-        if step {
-            self.eflags |= 1 << 8;
-        } else {
-            self.eflags &= !(1 << 8);
-        }
-    }
-
-    fn set_return_value(&mut self, value: u64) {
-        // TODO implement ABI for returning 64-bit values via EAX/EDX
-        if value & (1 << 63) != 0 {
-            assert_eq!(value & 0xFFFFFFFF00000000, 0xFFFFFFFF00000000);
-        }
-
-        self.eax = value as u32;
-    }
-}
-
-global_asm!(include_str!("context.S"), options(att_syntax));

kernel/arch/i686/src/gdt.rs

@@ -1,108 +0,0 @@
-use core::{cell::UnsafeCell, ptr::addr_of_mut};
-
-use kernel_arch_interface::guard::IrqGuard;
-pub use kernel_arch_x86::gdt::{Entry, Pointer};
-
-use crate::ArchitectureImpl;
-
-#[allow(dead_code)]
-#[repr(C, packed)]
-pub struct Tss {
-    prev_tss: u32,
-    pub esp0: u32,
-    pub ss0: u16,
-    _res0: u16,
-    esp1: u32,
-    ss1: u16,
-    _res1: u16,
-    esp2: u32,
-    ss2: u16,
-    _res2: u16,
-    cr3: u32,
-    eip: u32,
-    eflags: u32,
-    eax: u32,
-    ecx: u32,
-    edx: u32,
-    ebx: u32,
-    esp: u32,
-    ebp: u32,
-    esi: u32,
-    edi: u32,
-    es: u32,
-    cs: u32,
-    ss: u32,
-    ds: u32,
-    fs: u32,
-    gs: u32,
-    ldt: u32,
-    trap: u16,
-    iomap_base: u16,
-}
-
-impl Tss {
-    const NULL: Self = Self {
-        prev_tss: 0,
-        esp0: 0,
-        ss0: 0x10,
-        _res0: 0,
-        esp1: 0,
-        ss1: 0,
-        _res1: 0,
-        esp2: 0,
-        ss2: 0,
-        _res2: 0,
-        cr3: 0,
-        eip: 0,
-        eflags: 0,
-        eax: 0,
-        ecx: 0,
-        edx: 0,
-        ebx: 0,
-        esp: 0,
-        ebp: 0,
-        esi: 0,
-        edi: 0,
-        es: 0,
-        cs: 0,
-        ss: 0,
-        ds: 0,
-        fs: 0,
-        gs: 0,
-        ldt: 0,
-        trap: 0,
-        iomap_base: 0,
-    };
-}
-
-pub static mut TSS: Tss = Tss::NULL;
-pub static mut GDT: UnsafeCell<[Entry; 7]> = UnsafeCell::new([
-    Entry::NULL,       // 0x00
-    Entry::RING0_CS32, // 0x08
-    Entry::RING0_DS32, // 0x10
-    Entry::RING3_CS32, // 0x1B
-    Entry::RING3_DS32, // 0x23
-    Entry::NULL,       // 0x28, TSS
-    Entry::RING3_GS32, // 0x33, Task GS
-]);
-
-pub fn create_gdt() -> (&'static [Entry], &'static Tss) {
-    // Won't be deallocated, so leaks are not a concern
-    let tss = unsafe { &mut *addr_of_mut!(TSS) };
-    tss.ss0 = 0x10;
-    let tss_addr = (tss as *mut Tss).addr();
-    #[allow(static_mut_refs)]
-    let gdt = unsafe { GDT.get_mut() };
-    gdt[5] = Entry::tss(tss_addr as u32, (size_of::<Tss>() - 1) as u32);
-
-    (gdt, tss)
-}
-
-pub fn set_gs_base(gs_base: usize) {
-    let _guard = IrqGuard::<ArchitectureImpl>::acquire();
-    unsafe {
-        #[allow(static_mut_refs)]
-        GDT.get_mut()[6].set_base(gs_base);
-        core::arch::asm!("mov $0x33, %ax; mov %ax, %gs", out("ax") _, options(att_syntax, nostack));
-    }
-}

kernel/arch/i686/src/lib.rs

@@ -1,142 +0,0 @@
-#![feature(never_type, naked_functions, trace_macros)]
-#![no_std]
-
-extern crate alloc;
-
-use core::ptr::null_mut;
-
-use alloc::vec::Vec;
-use device_api::interrupt::{LocalInterruptController, MessageInterruptController};
-use kernel_arch_interface::{
-    cpu::{CpuData, CpuImpl, IpiQueue},
-    task::Scheduler,
-    Architecture,
-};
-
-pub mod context;
-pub mod gdt;
-pub mod mem;
-
-pub use context::TaskContextImpl;
-use kernel_arch_x86::cpuid::CpuFeatures;
-pub use mem::{KernelTableManagerImpl, ProcessAddressSpaceImpl};
-
-pub struct ArchitectureImpl;
-
-#[repr(C)]
-pub struct PerCpuData {
-    pub available_features: CpuFeatures,
-    pub enabled_features: CpuFeatures,
-}
-
-impl CpuData for PerCpuData {}
-
-static mut CPU: *mut () = null_mut();
-
-#[naked]
-extern "C" fn idle_task(_: usize) -> ! {
-    unsafe {
-        core::arch::naked_asm!(
-            r#"
-        1:
-            nop
-            jmp 1b
-        "#,
-            options(att_syntax)
-        );
-    }
-}
-
-impl Architecture for ArchitectureImpl {
-    type PerCpuData = PerCpuData;
-    type CpuFeatures = CpuFeatures;
-    type BreakpointType = u8;
-
-    const BREAKPOINT_VALUE: Self::BreakpointType = 0xCC;
-
-    unsafe fn init_local_cpu<S: Scheduler + 'static>(id: Option<u32>, data: Self::PerCpuData) {
-        use alloc::boxed::Box;
-
-        let cpu = Box::leak(Box::new(CpuImpl::<Self, S>::new(
-            id.expect("x86_64 required manual CPU ID set"),
-            data,
-        )));
-
-        cpu.set_local();
-    }
-
-    unsafe fn set_interrupt_mask(mask: bool) -> bool {
-        let old = Self::interrupt_mask();
-        if mask {
-            core::arch::asm!("cli");
-        } else {
-            core::arch::asm!("sti");
-        }
-        old
-    }
-
-    fn interrupt_mask() -> bool {
-        let mut flags: u32;
-        unsafe {
-            core::arch::asm!("pushfl; pop {0:e}", out(reg) flags, options(att_syntax));
-        }
-        // If IF is zero, interrupts are disabled (masked)
-        flags & (1 << 9) == 0
-    }
-
-    fn wait_for_interrupt() {
-        unsafe {
-            core::arch::asm!("hlt");
-        }
-    }
-
-    unsafe fn init_ipi_queues(_queues: Vec<IpiQueue<Self>>) {}
-
-    fn local_cpu() -> *mut () {
-        unsafe { CPU }
-    }
-
-    fn cpu_index<S: Scheduler + 'static>() -> u32 {
-        0
-    }
-
-    unsafe fn set_local_cpu(cpu: *mut ()) {
-        CPU = cpu;
-    }
-
-    fn cpu_count() -> usize {
-        1
-    }
-
-    fn local_interrupt_controller() -> Option<&'static dyn LocalInterruptController> {
-        None
-    }
-
-    fn message_interrupt_controller() -> Option<&'static dyn MessageInterruptController> {
-        None
-    }
-
-    fn ipi_queue(_cpu_id: u32) -> Option<&'static IpiQueue<Self>> {
-        None
-    }
-
-    fn idle_task() -> extern "C" fn(usize) -> ! {
-        idle_task
-    }
-
-    fn halt() -> ! {
-        loop {
-            unsafe {
-                core::arch::asm!("cli; hlt");
-            }
-        }
-    }
-
-    fn cpu_available_features<S: Scheduler>(cpu: &CpuImpl<Self, S>) -> Option<&Self::CpuFeatures> {
-        Some(&cpu.available_features)
-    }
-
-    fn cpu_enabled_features<S: Scheduler>(cpu: &CpuImpl<Self, S>) -> Option<&Self::CpuFeatures> {
-        Some(&cpu.enabled_features)
-    }
-}

kernel/arch/i686/src/mem/fixed.rs

@@ -1,141 +0,0 @@
-use kernel_arch_interface::{sync::IrqSafeSpinlock, KERNEL_VIRT_OFFSET};
-use libk_mm_interface::{address::PhysicalAddress, table::EntryLevel, KernelImageObject};
-use yggdrasil_abi::error::Error;
-
-use crate::{
-    mem::{flush_tlb_entry, table::PageAttributes},
-    ArchitectureImpl,
-};
-
-use super::{
-    table::{PageEntry, PageTable, L0, L3},
-    KERNEL_TABLES,
-};
-
-pub const KERNEL_SPLIT_L0: usize = KERNEL_VIRT_OFFSET >> 22;
-pub const DYNAMIC_MAP_COUNT: usize = 64;
-pub const FIXED_MAP_COUNT: usize = 1024 - (KERNEL_SPLIT_L0 + DYNAMIC_MAP_COUNT);
-pub const DYNAMIC_MAP_OFFSET: usize = (KERNEL_SPLIT_L0 + FIXED_MAP_COUNT) << L0::SHIFT;
-pub const MAX_FIXED_PHYSICAL: PhysicalAddress =
-    PhysicalAddress::from_u64((FIXED_MAP_COUNT as u64) << 22);
-
-#[repr(C)]
-pub struct FixedTables {
-    pub l0: KernelL0,
-    pub dynamic: IrqSafeSpinlock<ArchitectureImpl, KernelDynamic>,
-}
-
-#[repr(C, align(0x1000))]
-pub struct KernelL0 {
-    pub lower: [PageEntry<L0>; KERNEL_SPLIT_L0],
-    pub kernel: [PageEntry<L0>; FIXED_MAP_COUNT],
-    pub dynamic: [PageEntry<L0>; DYNAMIC_MAP_COUNT],
-}
-
-#[allow(unused)]
-pub struct KernelDynamic {
-    pub l3s: [KernelImageObject<PageTable<L3>>; DYNAMIC_MAP_COUNT],
-    free: usize,
-}
-
-impl FixedTables {
-    pub const fn zeroed() -> Self {
-        Self {
-            l0: KernelL0::zeroed(),
-            dynamic: IrqSafeSpinlock::new(KernelDynamic::zeroed()),
-        }
-    }
-
-    pub fn virtualize(&mut self, address: PhysicalAddress) -> usize {
-        if address < MAX_FIXED_PHYSICAL {
-            // It's a fixed address
-            address.into_u64() as usize + KERNEL_VIRT_OFFSET
-        } else {
-            todo!()
-        }
-    }
-
-    pub fn physicalize(&mut self, address: usize) -> Option<PhysicalAddress> {
-        if address < KERNEL_VIRT_OFFSET {
-            return None;
-        }
-
-        if address < KERNEL_VIRT_OFFSET + MAX_FIXED_PHYSICAL.into_u64() as usize {
-            // It's a fixed address
-            Some(PhysicalAddress::from_usize(address - KERNEL_VIRT_OFFSET))
-        } else {
-            todo!()
-        }
-    }
-
-    pub fn map_dynamic_memory(&mut self, base: u64, page_count: usize) -> Result<usize, Error> {
-        self.dynamic.lock().map(base, page_count)
-    }
-}
-
-impl KernelL0 {
-    pub const fn zeroed() -> Self {
-        Self {
-            lower: [PageEntry::INVALID; KERNEL_SPLIT_L0],
-            kernel: [PageEntry::INVALID; FIXED_MAP_COUNT],
-            dynamic: [PageEntry::INVALID; DYNAMIC_MAP_COUNT],
-        }
-    }
-}
-
-impl KernelDynamic {
-    pub const fn zeroed() -> Self {
-        Self {
-            l3s: [const { unsafe { KernelImageObject::new(PageTable::zeroed()) } };
-                DYNAMIC_MAP_COUNT],
-            free: DYNAMIC_MAP_COUNT * 1024,
-        }
-    }
-
-    fn map(&mut self, base: u64, page_count: usize) -> Result<usize, Error> {
-        if page_count > self.free {
-            return Err(Error::OutOfMemory);
-        }
-
-        'l0: for i in 0..DYNAMIC_MAP_COUNT * 1024 - page_count {
-            for j in 0..page_count {
-                let entry = self.entry(i + j);
-                if entry.is_present() {
-                    continue 'l0;
-                }
-            }
-
-            self.free -= page_count;
-            for j in 0..page_count {
-                let address = PhysicalAddress::from_u64(base + ((j as u64) << L3::SHIFT));
-                *self.entry_mut(i + j) = PageEntry::page(address, PageAttributes::WRITABLE);
-                unsafe {
-                    flush_tlb_entry(DYNAMIC_MAP_OFFSET + ((i + j) << L3::SHIFT));
-                }
-            }
-            let addr = DYNAMIC_MAP_OFFSET + (i << L3::SHIFT);
-            return Ok(addr);
-        }
-
-        Err(Error::OutOfMemory)
-    }
-
-    fn entry(&self, index: usize) -> &PageEntry<L3> {
-        &self.l3s[index / 1024][index % 1024]
-    }
-
-    fn entry_mut(&mut self, index: usize) -> &mut PageEntry<L3> {
-        &mut self.l3s[index / 1024][index % 1024]
-    }
-}
-
-pub fn clone_kernel_tables(dst: &mut PageTable<L0>) {
-    let tables = KERNEL_TABLES.lock();
-    for (i, entry) in tables.l0.kernel.iter().enumerate() {
-        dst[i + KERNEL_SPLIT_L0] = *entry;
-    }
-
-    for (i, entry) in tables.l0.dynamic.iter().enumerate() {
-        dst[i + KERNEL_SPLIT_L0 + FIXED_MAP_COUNT] = *entry;
-    }
-}

kernel/arch/i686/src/mem/mod.rs

@@ -1,131 +0,0 @@
-use fixed::FixedTables;
-use kernel_arch_interface::{
-    mem::{DeviceMemoryAttributes, KernelTableManager, RawDeviceMemoryMapping},
-    split_spinlock, KERNEL_VIRT_OFFSET,
-};
-use libk_mm_interface::{
-    address::{AsPhysicalAddress, PhysicalAddress},
-    table::{page_count, EntryLevel},
-};
-use table::{PageAttributes, PageEntry, L0, L3};
-use yggdrasil_abi::error::Error;
-
-pub mod fixed;
-pub mod process;
-pub mod table;
-
-pub use process::ProcessAddressSpaceImpl;
-
-#[derive(Debug)]
-pub struct KernelTableManagerImpl;
-
-split_spinlock! {
-    use libk_mm_interface::KernelImageObject;
-    use crate::mem::FixedTables;
-    use crate::ArchitectureImpl;
-
-    #[link_section = ".data.tables"]
-    static KERNEL_TABLES: KernelImageObject<FixedTables> = unsafe {
-        KernelImageObject::new(FixedTables::zeroed())
-    };
-}
-
-impl KernelTableManager for KernelTableManagerImpl {
-    unsafe fn map_device_pages(
-        base: u64,
-        count: usize,
-        _attrs: DeviceMemoryAttributes,
-    ) -> Result<RawDeviceMemoryMapping<Self>, Error> {
-        // TODO page align up
-
-        let offset = (base & 0xFFF) as usize;
-        let base = base & !0xFFF;
-        let end = (base + count as u64 + 0xFFF) & !0xFFF;
-
-        // assert_eq!(base & 0xFFF, 0);
-        if end < fixed::MAX_FIXED_PHYSICAL.into_u64() {
-            // 1:1
-            let address = Self::virtualize(base);
-            Ok(RawDeviceMemoryMapping::from_raw_parts(
-                address, address, 0, 0,
-            ))
-        } else {
-            assert_eq!(base & 0xFFF, 0);
-            log::info!("map_device_pages({:#x}, {})", base, count);
-            let page_count = page_count::<L3>(count);
-            let virt = KERNEL_TABLES.lock().map_dynamic_memory(base, page_count)?;
-
-            Ok(RawDeviceMemoryMapping::from_raw_parts(
-                virt + offset,
-                virt,
-                page_count,
-                0,
-            ))
-        }
-    }
-
-    unsafe fn unmap_device_pages(_mapping: &RawDeviceMemoryMapping<Self>) {
-        // todo!()
-    }
-
-    fn virtualize(phys: u64) -> usize {
-        KERNEL_TABLES
-            .lock()
-            .virtualize(PhysicalAddress::from_u64(phys))
-    }
-
-    fn physicalize(virt: usize) -> u64 {
-        KERNEL_TABLES
-            .lock()
-            .physicalize(virt)
-            .expect("Invalid virtual address")
-            .into_u64()
-    }
-
-    unsafe fn unmap_physical_address(virt: usize) {
-        if virt < KERNEL_VIRT_OFFSET {
-            panic!("Invalid 'virtualized' address: {:#x}", virt);
-        }
-        let virt = virt - KERNEL_VIRT_OFFSET;
-        if virt >= fixed::FIXED_MAP_COUNT << L0::SHIFT {
-            todo!()
-        }
-    }
-}
-
-/// Sets up fixed MMU translation tables.
-///
-/// # Safety
-///
-/// Only meant to be called once during early OS init.
-pub unsafe fn init_fixed_tables() {
-    let mut tables = KERNEL_TABLES.lock();
-
-    // Unmap lower stuff
-    for (i, entry) in tables.l0.lower.iter_mut().enumerate() {
-        *entry = PageEntry::INVALID;
-        flush_tlb_entry(i << 22);
-    }
-
-    // Map the rest of fixed translation
-    for (i, entry) in tables.l0.kernel.iter_mut().enumerate() {
-        let virt = KERNEL_VIRT_OFFSET + (i << L0::SHIFT);
-        let phys = (i << L0::SHIFT) as u32;
-        *entry = PageEntry::block(PhysicalAddress::from_u32(phys), PageAttributes::WRITABLE);
-        flush_tlb_entry(virt);
-    }
-
-    let dynamic_len = tables.l0.dynamic.len();
-    for i in 0..dynamic_len {
-        let phys = tables.dynamic.lock().l3s[i].as_physical_address();
-        tables.l0.dynamic[i] = PageEntry::table(phys, PageAttributes::WRITABLE);
-    }
-}
-
-/// # Safety
-///
-/// `address` must be page-aligned.
-#[inline]
-pub unsafe fn flush_tlb_entry(address: usize) {
-    core::arch::asm!("invlpg ({0})", in(reg) address, options(att_syntax));
-}

kernel/arch/i686/src/mem/process.rs

@@ -1,137 +0,0 @@
-use core::marker::PhantomData;
-
-use kernel_arch_interface::KERNEL_VIRT_OFFSET;
-use libk_mm_interface::{
-    address::{AsPhysicalAddress, PhysicalAddress},
-    pointer::PhysicalRefMut,
-    process::ProcessAddressSpaceManager,
-    table::{
-        EntryLevel, EntryLevelDrop, EntryLevelExt, MapAttributes, NextPageTable, TableAllocator,
-    },
-};
-use yggdrasil_abi::error::Error;
-
-use crate::{mem::flush_tlb_entry, KernelTableManagerImpl};
-
-use super::{
-    fixed::{clone_kernel_tables, KERNEL_SPLIT_L0},
-    table::{PageEntry, PageTable, L0, L3},
-};
-
-#[repr(C)]
-pub struct ProcessAddressSpaceImpl<TA: TableAllocator> {
-    l0: PhysicalRefMut<'static, PageTable<L0>, KernelTableManagerImpl>,
-    _alloc: PhantomData<TA>,
-}
-
-impl<TA: TableAllocator> ProcessAddressSpaceManager<TA> for ProcessAddressSpaceImpl<TA> {
-    const UPPER_LIMIT_PFN: usize = KERNEL_VIRT_OFFSET >> L3::SHIFT;
-    const LOWER_LIMIT_PFN: usize = 32;
-
-    fn new() -> Result<Self, Error> {
-        let mut l0 = unsafe {
-            PhysicalRefMut::<'static, PageTable<L0>, KernelTableManagerImpl>::map(
-                TA::allocate_page_table()?,
-            )
-        };
-
-        for i in 0..1024 {
-            l0[i] = PageEntry::INVALID;
-        }
-
-        clone_kernel_tables(&mut l0);
-
-        Ok(Self {
-            l0,
-            _alloc: PhantomData,
-        })
-    }
-
-    unsafe fn clear(&mut self) {
-        self.l0.drop_range::<TA>(0..KERNEL_SPLIT_L0);
-    }
-
-    fn translate(&self, address: usize) -> Result<(PhysicalAddress, MapAttributes), Error> {
-        self.read_l3_entry(address).ok_or(Error::DoesNotExist)
-    }
-
-    unsafe fn map_page(
-        &mut self,
-        address: usize,
-        physical: PhysicalAddress,
-        flags: MapAttributes,
-    ) -> Result<(), Error> {
-        self.write_l3_entry(address, PageEntry::page(physical, flags.into()), false)
-    }
-
-    unsafe fn unmap_page(&mut self, address: usize) -> Result<PhysicalAddress, Error> {
-        self.pop_l3_entry(address)
-    }
-
-    fn as_address_with_asid(&self) -> (u64, u64) {
-        (unsafe { self.l0.as_physical_address().into_u64() }, 0)
-    }
-}
-
-impl<TA: TableAllocator> ProcessAddressSpaceImpl<TA> {
-    // Write a single 4KiB entry
-    fn write_l3_entry(
-        &mut self,
-        virt: usize,
-        entry: PageEntry<L3>,
-        overwrite: bool,
-    ) -> Result<(), Error> {
-        let l0i = virt.page_index::<L0>();
-        let l3i = virt.page_index::<L3>();
-
-        let mut l3 = self.l0.get_mut_or_alloc::<TA>(l0i)?;
-
-        if l3[l3i].is_present() && !overwrite {
-            todo!();
-        }
-
-        l3[l3i] = entry;
-        unsafe {
-            flush_tlb_entry(virt);
-        }
-
-        Ok(())
-    }
-
-    fn pop_l3_entry(&mut self, virt: usize) -> Result<PhysicalAddress, Error> {
-        let l0i = virt.page_index::<L0>();
-        let l3i = virt.page_index::<L3>();
-
-        let mut l3 = self.l0.get_mut(l0i).ok_or(Error::DoesNotExist)?;
-        let page = l3[l3i].as_page().ok_or(Error::DoesNotExist)?;
-
-        l3[l3i] = PageEntry::INVALID;
-        unsafe {
-            flush_tlb_entry(virt);
-        }
-
-        Ok(page)
-    }
-
-    fn read_l3_entry(&self, virt: usize) -> Option<(PhysicalAddress, MapAttributes)> {
-        let l0i = virt.page_index::<L0>();
-        let l3i = virt.page_index::<L3>();
-
-        let l3 = self.l0.get(l0i)?;
-        let page = l3[l3i].as_page()?;
-
-        Some((page.add(virt & 0xFFF), l3[l3i].attributes().into()))
-    }
-}
-
-impl<TA: TableAllocator> Drop for ProcessAddressSpaceImpl<TA> {
-    fn drop(&mut self) {
-        // SAFETY: with safe usage of the ProcessAddressSpaceImpl, clearing and dropping
-        // is safe, no one refers to the memory
-        unsafe {
-            self.clear();
-            let l0_phys = self.l0.as_physical_address();
-            TA::free_page_table(l0_phys);
-        }
-    }
-}

kernel/arch/i686/src/mem/table.rs

@@ -1,256 +0,0 @@
-use core::{
-    marker::PhantomData,
-    ops::{Index, IndexMut, Range},
-};
-
-use bitflags::bitflags;
-use libk_mm_interface::{
-    address::{AsPhysicalAddress, PhysicalAddress},
-    pointer::{PhysicalRef, PhysicalRefMut},
-    table::{
-        EntryLevel, EntryLevelDrop, MapAttributes, NextPageTable, NonTerminalEntryLevel,
-        TableAllocator,
-    },
-};
-use yggdrasil_abi::error::Error;
-
-use crate::KernelTableManagerImpl;
-
-bitflags! {
-    /// Describes how each page table entry is mapped
-    pub struct PageAttributes: u32 {
-        /// When set, the mapping is considered valid and pointing somewhere
-        const PRESENT = 1 << 0;
-        /// For tables, allows writes to further translation levels, for pages/blocks, allows
-        /// writes to the region covered by the entry
-        const WRITABLE = 1 << 1;
-        /// When set for L2 entries, the mapping specifies a 2MiB page instead of a page table
-        /// reference
-        const BLOCK = 1 << 7;
-        /// For tables, allows user access to further translation levels, for pages/blocks, allows
-        /// user access to the region covered by the entry
-        const USER = 1 << 2;
-    }
-}
-// TODO stuff for PAE?
-
-#[derive(Debug, Clone, Copy)]
-pub struct L3;
-#[derive(Debug, Clone, Copy)]
-pub struct L0;
-
-#[derive(Clone, Copy, Debug)]
-pub struct PageEntry<L: EntryLevel>(u32, PhantomData<L>);
-
-#[derive(Clone, Copy, Debug)]
-#[repr(C, align(0x1000))]
-pub struct PageTable<L: EntryLevel> {
-    data: [PageEntry<L>; 1024],
-}
-
-impl EntryLevel for L3 {
-    const SHIFT: usize = 12;
-}
-
-impl EntryLevel for L0 {
-    const SHIFT: usize = 22;
-}
-
-impl NonTerminalEntryLevel for L0 {
-    type NextLevel = L3;
-}
-
-impl PageEntry<L3> {
-    pub fn page(address: PhysicalAddress, attrs: PageAttributes) -> Self {
-        Self(
-            address.try_into_u32().unwrap() | (PageAttributes::PRESENT | attrs).bits(),
-            PhantomData,
-        )
-    }
-
-    pub fn as_page(&self) -> Option<PhysicalAddress> {
-        if self.0 & PageAttributes::PRESENT.bits() != 0 {
-            Some(PhysicalAddress::from_u32(self.0 & !0xFFF))
-        } else {
-            None
-        }
-    }
-}
-
-impl PageEntry<L0> {
-    pub fn block(address: PhysicalAddress, attrs: PageAttributes) -> Self {
-        Self(
-            address.try_into_u32().unwrap()
-                | (PageAttributes::PRESENT | PageAttributes::BLOCK | attrs).bits(),
-            PhantomData,
-        )
-    }
-
-    pub fn table(address: PhysicalAddress, attrs: PageAttributes) -> Self {
-        Self(
-            address.try_into_u32().unwrap() | (PageAttributes::PRESENT | attrs).bits(),
-            PhantomData,
-        )
-    }
-
-    pub fn as_table(&self) -> Option<PhysicalAddress> {
-        if self.0 & PageAttributes::PRESENT.bits() != 0
-            && self.0 & PageAttributes::BLOCK.bits() == 0
-        {
-            Some(PhysicalAddress::from_u32(self.0 & !0xFFF))
-        } else {
-            None
-        }
-    }
-}
-
-impl<L: EntryLevel> PageEntry<L> {
-    pub const INVALID: Self = Self(0, PhantomData);
-
-    pub fn is_present(&self) -> bool {
-        self.0 & (1 << 0) != 0
-    }
-
-    pub fn attributes(&self) -> PageAttributes {
-        PageAttributes::from_bits_retain(self.0)
-    }
-}
-
-impl<L: EntryLevel> PageTable<L> {
-    pub const fn zeroed() -> Self {
-        Self {
-            data: [PageEntry::INVALID; 1024],
-        }
-    }
-
-    pub fn new_zeroed<'a, TA: TableAllocator>(
-    ) -> Result<PhysicalRefMut<'a, Self, KernelTableManagerImpl>, Error> {
-        let physical = TA::allocate_page_table()?;
-        let mut table =
-            unsafe { PhysicalRefMut::<'a, Self, KernelTableManagerImpl>::map(physical) };
-
-        for i in 0..1024 {
-            table[i] = PageEntry::INVALID;
-        }
-
-        Ok(table)
-    }
-
-    /// Recursively clears and deallocates the translation table.
-    ///
-    /// # Safety
-    ///
-    /// The caller must ensure the table is no longer in use and is not referenced anymore.
-    pub unsafe fn free<TA: TableAllocator>(this: PhysicalRefMut<Self, KernelTableManagerImpl>) {
-        let physical = this.as_physical_address();
-        TA::free_page_table(physical);
-    }
-}
-
-impl NextPageTable for PageTable<L0> {
-    type NextLevel = PageTable<L3>;
-    type TableRef = PhysicalRef<'static, Self::NextLevel, KernelTableManagerImpl>;
-    type TableRefMut = PhysicalRefMut<'static, Self::NextLevel, KernelTableManagerImpl>;
-
-    fn get(&self, index: usize) -> Option<Self::TableRef> {
-        self[index]
-            .as_table()
-            .map(|addr| unsafe { PhysicalRef::map(addr) })
-    }
-
-    fn get_mut(&mut self, index: usize) -> Option<Self::TableRefMut> {
-        self[index]
-            .as_table()
-            .map(|addr| unsafe { PhysicalRefMut::map(addr) })
-    }
-
-    fn get_mut_or_alloc<TA: TableAllocator>(
-        &mut self,
-        index: usize,
-    ) -> Result<Self::TableRefMut, Error> {
-        let entry = self[index];
-
-        if let Some(table) = entry.as_table() {
-            Ok(unsafe { PhysicalRefMut::map(table) })
-        } else {
-            let table = PageTable::new_zeroed::<TA>()?;
-            self[index] = PageEntry::<L0>::table(
-                unsafe { table.as_physical_address() },
-                PageAttributes::WRITABLE | PageAttributes::USER,
-            );
-            Ok(table)
-        }
-    }
-}
-
-impl<L: EntryLevel> Index<usize> for PageTable<L> {
-    type Output = PageEntry<L>;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self.data[index]
-    }
-}
-
-impl<L: EntryLevel> IndexMut<usize> for PageTable<L> {
-    fn index_mut(&mut self, index: usize) -> &mut Self::Output {
-        &mut self.data[index]
-    }
-}
-
-impl EntryLevelDrop for PageTable<L3> {
-    const FULL_RANGE: Range<usize> = 0..1024;
-
-    unsafe fn drop_range<TA: TableAllocator>(&mut self, _range: Range<usize>) {}
-}
-
-impl EntryLevelDrop for PageTable<L0> {
-    const FULL_RANGE: Range<usize> = 0..1024;
-
-    unsafe fn drop_range<TA: TableAllocator>(&mut self, range: Range<usize>) {
-        for index in range {
-            let entry = self[index];
-
-            if let Some(table) = entry.as_table() {
-                let mut table_ref: PhysicalRefMut<PageTable<L3>, KernelTableManagerImpl> =
-                    PhysicalRefMut::map(table);
-
-                table_ref.drop_all::<TA>();
-
-                TA::free_page_table(table);
-            } else if entry.is_present() {
-                // Memory must've been cleared beforehand, so no non-table entries must be present
-                panic!(
-                    "Expected a table containing only tables, got table[{}] = {:#x?}",
-                    index, entry.0
-                );
-            }
-
-            self[index] = PageEntry::INVALID;
-        }
-    }
-}
-
-impl From<MapAttributes> for PageAttributes {
-    fn from(value: MapAttributes) -> Self {
-        let mut res = PageAttributes::WRITABLE;
-        if value.intersects(MapAttributes::USER_READ | MapAttributes::USER_WRITE) {
-            res |= PageAttributes::USER;
-        }
-        res
-    }
-}
-
-impl From<PageAttributes> for MapAttributes {
-    fn from(value: PageAttributes) -> Self {
-        let mut res = MapAttributes::empty();
-        if value.contains(PageAttributes::USER) {
-            res |= MapAttributes::USER_READ;
-            if value.contains(PageAttributes::WRITABLE) {
-                res |= MapAttributes::USER_WRITE;
-            }
-        }
-        // TODO ???
-        res |= MapAttributes::NON_GLOBAL;
-        res
-    }
-}

kernel/arch/interface/src/lib.rs

@@ -21,8 +21,6 @@ pub mod sync;
 pub mod task;
 pub mod util;
 
-#[cfg(any(target_arch = "x86", rust_analyzer))]
-pub const KERNEL_VIRT_OFFSET: usize = 0xC0000000;
 #[cfg(any(target_arch = "aarch64", target_arch = "x86_64", rust_analyzer))]
 pub const KERNEL_VIRT_OFFSET: usize = 0xFFFFFF8000000000;
 #[cfg(any(target_arch = "riscv64", rust_analyzer))]

kernel/arch/interface/src/mem/mod.rs

@@ -2,9 +2,6 @@ use core::{fmt, marker::PhantomData, mem::size_of, ptr::NonNull};
 
 use yggdrasil_abi::error::Error;
 
-pub mod address;
-pub mod table;
-
 pub trait PhysicalMemoryAllocator {
     type Address;
 

kernel/arch/riscv64/Cargo.toml

@@ -15,11 +15,5 @@ static_assertions.workspace = true
 log.workspace = true
 cfg-if.workspace = true
 
-[features]
-default = []
-riscv64_board_virt = []
-riscv64_board_jh7110 = []
-
-
 [lints]
 workspace = true

kernel/arch/riscv64/src/context.rs

@@ -13,7 +13,7 @@ use tock_registers::{
 use yggdrasil_abi::error::Error;
 
 use crate::{
-    mem::{self, KERNEL_VIRT_OFFSET},
+    mem::{self},
     registers::SATP,
     ArchitectureImpl, PerCpuData,
 };
@@ -124,7 +124,7 @@ impl<K: KernelTableManager, PA: PhysicalMemoryAllocator<Address = PhysicalAddres
 
         // TODO stack is leaked
         let satp = InMemoryRegister::new(0);
-        let kernel_table_phys = ((&raw const mem::FIXED_L1).addr() - KERNEL_VIRT_OFFSET) as u64;
+        let kernel_table_phys = mem::fixed::table_physical_address().into_u64();
         satp.write(SATP::MODE::Sv39 + SATP::ASID.val(0) + SATP::PPN.val(kernel_table_phys >> 12));
 
         Ok(Self {

kernel/arch/riscv64/src/mem/fixed.rs

@@ -0,0 +1,32 @@
+use kernel_arch_interface::sync::IrqSafeSpinlock;
+use libk_mm_interface::{address::PhysicalAddress, table::EntryLevel};
+
+use crate::{
+    mem::{
+        auto_lower_address,
+        table::{PageEntry, PageTable, L1},
+        KERNEL_VIRT_OFFSET,
+    },
+    ArchitectureImpl,
+};
+
+pub const IDENTITY_SIZE_L1: usize = 64;
+
+pub(super) static mut KERNEL_L1: PageTable<L1> = const {
+    let mut table = PageTable::zeroed();
+
+    let mut index = 0;
+    while index < IDENTITY_SIZE_L1 {
+        let entry = PageEntry::identity_block(PhysicalAddress::from_usize(index << L1::SHIFT));
+        table.entries[index] = entry;
+        table.entries[index + ((KERNEL_VIRT_OFFSET >> L1::SHIFT) & 0x1FF)] = entry;
+        index += 1;
+    }
+
+    table
+};
+pub(super) static LOCK: IrqSafeSpinlock<ArchitectureImpl, ()> = IrqSafeSpinlock::new(());
+
+pub fn table_physical_address() -> PhysicalAddress {
+    PhysicalAddress::from_usize(auto_lower_address(&raw const KERNEL_L1))
+}

kernel/arch/riscv64/src/mem/intrinsics.rs

@@ -0,0 +1,51 @@
+use libk_mm_interface::table::{EntryLevel, EntryLevelExt};
+
+use crate::mem::table::L3;
+
+pub fn tlb_flush_global_full() {
+    tlb_flush_full();
+    // TODO send TLB shootdown IPI to other harts
+}
+
+pub fn tlb_flush_global_va(va: usize) {
+    tlb_flush_va(va);
+    // TODO send TLB shootdown IPI to other harts
+}
+
+pub fn tlb_flush_range_va(start: usize, size: usize) {
+    let end = (start + size).page_align_up::<L3>();
+    let start = start.page_align_down::<L3>();
+
+    for page in (start..end).step_by(L3::SIZE) {
+        tlb_flush_va(page);
+    }
+}
+
+pub fn tlb_flush_range_va_asid(asid: usize, start: usize, size: usize) {
+    let end = (start + size).page_align_up::<L3>();
+    let start = start.page_align_down::<L3>();
+
+    for page in (start..end).step_by(L3::SIZE) {
+        tlb_flush_va_asid(page, asid);
+    }
+}
+
+#[inline]
+pub fn tlb_flush_full() {
+    unsafe { core::arch::asm!("sfence.vma") };
+}
+
+#[inline]
+pub fn tlb_flush_va(va: usize) {
+    unsafe { core::arch::asm!("sfence.vma {0}, zero", in(reg) va) };
+}
+
+#[inline]
+pub fn tlb_flush_asid(asid: usize) {
+    unsafe { core::arch::asm!("sfence.vma zero, {0}", in(reg) asid) };
+}
+
+#[inline]
+pub fn tlb_flush_va_asid(va: usize, asid: usize) {
+    unsafe { core::arch::asm!("sfence.vma {0}, {1}", in(reg) va, in(reg) asid) };
+}

kernel/arch/riscv64/src/mem/mod.rs

@@ -5,34 +5,22 @@ use libk_mm_interface::{
     address::PhysicalAddress,
     table::{page_index, EntryLevel, EntryLevelExt},
 };
-use table::{PageEntry, PageTable, L1, L3};
 use tock_registers::interfaces::Writeable;
 use yggdrasil_abi::error::Error;
 
-use crate::registers::SATP;
+use crate::{
+    mem::table::{PageTable, L1, L3},
+    registers::SATP,
+};
 
+pub use intrinsics::*;
+
+pub mod fixed;
+pub mod intrinsics;
 pub mod process;
 pub mod table;
 
 pub const KERNEL_VIRT_OFFSET: usize = kernel_arch_interface::KERNEL_VIRT_OFFSET;
-pub const SIGN_EXTEND_MASK: usize = 0xFFFFFF80_00000000;
-
-pub const IDENTITY_SIZE: usize = 64 * L1::SIZE;
-pub const IDENTITY_L1_START: usize = page_index::<L1>(KERNEL_VIRT_OFFSET);
-
-pub static mut FIXED_L1: PageTable<L1> = const {
-    let mut table = PageTable::zeroed();
-
-    let mut i = 0;
-    while i < IDENTITY_SIZE / L1::SIZE {
-        let entry = PageEntry::identity_block(PhysicalAddress::from_usize(i * L1::SIZE));
-        table.entries[i] = entry;
-        table.entries[i + IDENTITY_L1_START] = entry;
-        i += 1;
-    }
-
-    table
-};
 
 /// Any VAs above this one are sign-extended
 pub const USER_BOUNDARY: usize = 0x40_00000000;
@@ -43,15 +31,18 @@ pub struct KernelTableManagerImpl;
 impl KernelTableManager for KernelTableManagerImpl {
     fn virtualize(address: u64) -> usize {
         let address = address as usize;
-        if address >= IDENTITY_SIZE {
-            panic!("Invalid physical address: {address:#x}");
+        if address < fixed::IDENTITY_SIZE_L1 * L1::SIZE {
+            address + KERNEL_VIRT_OFFSET
+        } else {
+            panic!("Invalid physical address: {address:#x}")
         }
-        address + KERNEL_VIRT_OFFSET
     }
 
     fn physicalize(address: usize) -> u64 {
-        if address < KERNEL_VIRT_OFFSET || address - KERNEL_VIRT_OFFSET >= IDENTITY_SIZE {
-            panic!("Invalid \"physicalized\" virtual address {address:#x}");
+        if address < KERNEL_VIRT_OFFSET
+            || address - KERNEL_VIRT_OFFSET >= fixed::IDENTITY_SIZE_L1 * L1::SIZE
+        {
+            panic!("Invalid virtualized address: {address:#x}");
         }
         (address - KERNEL_VIRT_OFFSET) as u64
     }
@@ -62,6 +53,7 @@ impl KernelTableManager for KernelTableManagerImpl {
         attrs: DeviceMemoryAttributes,
     ) -> Result<RawDeviceMemoryMapping<Self>, Error> {
         let _ = attrs;
+        let _lock = fixed::LOCK.lock();
         let base = PhysicalAddress::from_u64(base);
         let l3_aligned_base = base.page_align_down::<L3>();
         let l3_aligned_end = base.add(count).page_align_up::<L3>();
@@ -100,75 +92,14 @@ pub fn auto_lower_address<T>(x: *const T) -> usize {
 ///
 /// Only meant to be called once per each HART during their early init.
 pub unsafe fn enable_mmu() {
-    let l1_phys = auto_lower_address(&raw const FIXED_L1) as u64;
+    let l1_phys = auto_lower_address(&raw const fixed::KERNEL_L1) as u64;
     tlb_flush_full();
     SATP.write(SATP::PPN.val(l1_phys >> 12) + SATP::MODE::Sv39);
 }
 
-/// Removes the lower half translation mappings.
-///
-/// # Safety
-///
-/// Needs to be called once after secondary HARTs are initialized.
-pub unsafe fn unmap_lower_half() {
-    // for i in 0..(IDENTITY_SIZE / L1::SIZE) {
-    //     unsafe { FIXED_L1[i] = PageEntry::INVALID };
-    // }
-    // tlb_flush_full();
-}
-
-pub fn tlb_flush_global_full() {
-    tlb_flush_full();
-    // TODO send TLB shootdown IPI to other harts
-}
-
-pub fn tlb_flush_global_va(va: usize) {
-    tlb_flush_va(va);
-    // TODO send TLB shootdown IPI to other harts
-}
-
-pub fn tlb_flush_range_va(start: usize, size: usize) {
-    let end = (start + size).page_align_up::<L3>();
-    let start = start.page_align_down::<L3>();
-
-    for page in (start..end).step_by(L3::SIZE) {
-        tlb_flush_va(page);
-    }
-}
-
-pub fn tlb_flush_range_va_asid(asid: usize, start: usize, size: usize) {
-    let end = (start + size).page_align_up::<L3>();
-    let start = start.page_align_down::<L3>();
-
-    for page in (start..end).step_by(L3::SIZE) {
-        tlb_flush_va_asid(page, asid);
-    }
-}
-
-#[inline]
-pub fn tlb_flush_full() {
-    unsafe { core::arch::asm!("sfence.vma") };
-}
-
-#[inline]
-pub fn tlb_flush_va(va: usize) {
-    unsafe { core::arch::asm!("sfence.vma {0}, zero", in(reg) va) };
-}
-
-#[inline]
-pub fn tlb_flush_asid(asid: usize) {
-    unsafe { core::arch::asm!("sfence.vma zero, {0}", in(reg) asid) };
-}
-
-#[inline]
-pub fn tlb_flush_va_asid(va: usize, asid: usize) {
-    unsafe { core::arch::asm!("sfence.vma {0}, {1}", in(reg) va, in(reg) asid) };
-}
-
 pub fn clone_kernel_tables(dst: &mut PageTable<L1>) {
-    // let tables = KERNEL_TABLES.lock();
+    let _lock = fixed::LOCK.lock();
     for l1i in page_index::<L1>(USER_BOUNDARY)..512 {
-        // dst[l1i] = unsafe { PageEntry::from_raw(tables.l1.data[l1i]) };
-        dst[l1i] = unsafe { FIXED_L1[l1i] };
+        dst[l1i] = unsafe { fixed::KERNEL_L1[l1i] };
     }
 }

kernel/arch/riscv64/src/mem/process.rs

@@ -13,10 +13,13 @@ use libk_mm_interface::{
 };
 use yggdrasil_abi::error::Error;
 
-use crate::mem::{clone_kernel_tables, table::PageEntry};
+use crate::mem::{
+    clone_kernel_tables,
+    table::{PageAttributes, PageEntry},
+};
 
 use super::{
-    table::{DroppableRange, PageAttributes, PageTable, L1, L2, L3},
+    table::{DroppableRange, PageTable, L1, L2, L3},
     KernelTableManagerImpl, USER_BOUNDARY,
 };
 

kernel/arch/riscv64/src/mem/table.rs

@@ -1,4 +1,5 @@
 use core::{
+    fmt,
     marker::PhantomData,
     ops::{Index, IndexMut, Range},
 };
@@ -17,7 +18,6 @@ use yggdrasil_abi::error::Error;
 
 use super::{KernelTableManagerImpl, USER_BOUNDARY};
 
-// pub use memtables::riscv64::PageAttributes;
 bitflags! {
     #[derive(Clone, Copy, PartialEq, Eq, Debug)]
     pub struct PageAttributes: u64 {
@@ -75,10 +75,9 @@ impl EntryLevel for L1 {
     const SHIFT: usize = 30;
 }
 
-#[derive(Clone, Copy)]
 #[repr(C, align(0x1000))]
 pub struct PageTable<L: EntryLevel> {
-    pub entries: [PageEntry<L>; 512],
+    pub(crate) entries: [PageEntry<L>; 512],
 }
 
 #[derive(Clone, Copy, Debug, PartialEq)]
@@ -241,14 +240,16 @@ impl<L: NonTerminalEntryLevel + 'static> NextPageTable for PageTable<L> {
 
 impl<L: NonTerminalEntryLevel> PageEntry<L> {
     pub const fn identity_block(address: PhysicalAddress) -> Self {
-        const ATTR: u64 = PageAttributes::R.bits()
-            | PageAttributes::W.bits()
-            | PageAttributes::X.bits()
-            | PageAttributes::A.bits()
-            | PageAttributes::D.bits()
-            | PageAttributes::V.bits();
-
-        Self((address.into_u64() >> 2) | ATTR, PhantomData)
+        Self(
+            (address.into_u64() >> 2)
+                | PageAttributes::R.bits()
+                | PageAttributes::W.bits()
+                | PageAttributes::X.bits()
+                | PageAttributes::V.bits()
+                | PageAttributes::D.bits()
+                | PageAttributes::A.bits(),
+            PhantomData,
+        )
     }
 
     pub fn block(address: PhysicalAddress, attrs: PageAttributes) -> Self {
@@ -317,3 +318,26 @@ impl<L: EntryLevel> IndexMut<usize> for PageTable<L> {
         &mut self.entries[index]
     }
 }
+
+impl fmt::Display for PageAttributes {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        use fmt::Write;
+
+        macro_rules! bit {
+            ($self:ident, $field:expr, $letter:literal) => {
+                if $self.contains($field) {
+                    f.write_char($letter)
+                } else {
+                    f.write_char('-')
+                }
+            };
+        }
+
+        bit!(self, Self::R, 'r')?;
+        bit!(self, Self::W, 'w')?;
+        bit!(self, Self::X, 'x')?;
+        bit!(self, Self::U, 'u')?;
+
+        Ok(())
+    }
+}

kernel/arch/src/lib.rs

@@ -26,8 +26,6 @@ cfg_if! {
         extern crate kernel_arch_aarch64 as imp;
     } else if #[cfg(target_arch = "x86_64")] {
         extern crate kernel_arch_x86_64 as imp;
-    } else if #[cfg(target_arch = "x86")] {
-        extern crate kernel_arch_i686 as imp;
     } else if #[cfg(target_arch = "riscv64")] {
         extern crate kernel_arch_riscv64 as imp;
     } else {

kernel/arch/x86/src/gdt.rs

@@ -1,5 +1,5 @@
 #[allow(dead_code)]
-#[repr(packed)]
+#[repr(C, packed)]
 pub struct Entry {
     pub limit_lo: u16,
     pub base_lo: u16,
@@ -10,7 +10,7 @@ pub struct Entry {
 }
 
 #[allow(dead_code)]
-#[repr(packed)]
+#[repr(C, packed)]
 pub struct Pointer {
     pub limit: u16,
     pub offset: usize,
@@ -121,7 +121,7 @@ mod imp {
     use super::{Entry, Pointer};
 
     #[allow(dead_code)]
-    #[repr(packed)]
+    #[repr(C, packed)]
     pub struct Tss {
         _0: u32,
         rsp0: u64,

kernel/arch/x86_64/src/context.rs

@@ -10,7 +10,7 @@ use tock_registers::interfaces::Writeable;
 use yggdrasil_abi::{arch::SavedFrame, error::Error};
 
 use crate::{
-    mem::{auto_lower_address, FIXED_PML4},
+    mem::{auto_lower_address, fixed},
     ArchitectureImpl,
 };
 
@@ -434,7 +434,7 @@ impl<K: KernelTableManager, PA: PhysicalMemoryAllocator<Address = PhysicalAddres
     fn kernel(entry: extern "C" fn(usize) -> !, arg: usize) -> Result<Self, Error> {
         const KERNEL_TASK_PAGES: usize = 32;
 
-        let cr3 = auto_lower_address(&raw const FIXED_PML4);
+        let cr3: usize = auto_lower_address(&raw const fixed::KERNEL_PML4); // unsafe { KERNEL_TABLES.lock().as_physical_address() }.into();
 
         let stack_base_phys = PA::allocate_contiguous_pages(KERNEL_TASK_PAGES)?;
         let stack_base = stack_base_phys.raw_virtualize::<K>();

kernel/arch/x86_64/src/mem/device.rs

@@ -1,87 +0,0 @@
-use core::ops::Range;
-
-use kernel_arch_interface::mem::DeviceMemoryAttributes;
-use libk_mm_interface::{
-    address::PhysicalAddress,
-    table::{DevicePageManager, DevicePageManagerLevel},
-};
-
-use crate::mem::table::PageEntry;
-
-use super::{
-    table::{PageAttributes, PageTable, L2, L3},
-    DEVICE_MAPPING_OFFSET, DEVICE_MEMORY_L3_COUNT,
-};
-
-#[repr(transparent)]
-pub struct L2DeviceMemory(pub PageTable<L2>);
-#[repr(transparent)]
-pub struct L3DeviceMemory(pub [PageTable<L3>; DEVICE_MEMORY_L3_COUNT]);
-
-pub(super) static mut DEVICE_MEMORY: DevicePageManager<L3DeviceMemory, L2DeviceMemory> =
-    DevicePageManager::new(
-        L3DeviceMemory([PageTable::zeroed(); DEVICE_MEMORY_L3_COUNT]),
-        L2DeviceMemory(PageTable::zeroed()),
-    );
-
-impl DevicePageManagerLevel for L2DeviceMemory {
-    type Level = L2;
-    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
-    const INDEX_RANGE: Range<usize> = DEVICE_MEMORY_L3_COUNT..512;
-
-    fn map_page(
-        &mut self,
-        index: usize,
-        physical: PhysicalAddress,
-        attrs: &DeviceMemoryAttributes,
-    ) {
-        let _ = attrs;
-        self.0[index] = PageEntry::<L2>::block(physical, PageAttributes::WRITABLE);
-    }
-
-    fn unmap_page(&mut self, index: usize) {
-        self.0[index] = PageEntry::INVALID;
-    }
-
-    fn is_mapped(&self, index: usize) -> bool {
-        self.0[index].is_present()
-    }
-
-    fn flush_range(range: Range<usize>) {
-        let _ = range;
-    }
-}
-
-impl DevicePageManagerLevel for L3DeviceMemory {
-    type Level = L3;
-    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
-    const INDEX_RANGE: Range<usize> = 0..512 * DEVICE_MEMORY_L3_COUNT;
-
-    fn map_page(
-        &mut self,
-        index: usize,
-        physical: PhysicalAddress,
-        attrs: &DeviceMemoryAttributes,
-    ) {
-        let _ = attrs;
-        let l2i = index / 512;
-        let l3i = index % 512;
-        self.0[l2i][l3i] = PageEntry::page(physical, PageAttributes::WRITABLE);
-    }
-
-    fn unmap_page(&mut self, index: usize) {
-        let l2i = index / 512;
-        let l3i = index % 512;
-        self.0[l2i][l3i] = PageEntry::INVALID;
-    }
-
-    fn is_mapped(&self, index: usize) -> bool {
-        let l2i = index / 512;
-        let l3i = index % 512;
-        self.0[l2i][l3i].is_present()
-    }
-
-    fn flush_range(range: Range<usize>) {
-        let _ = range;
-    }
-}

kernel/arch/x86_64/src/mem/fixed.rs

@@ -0,0 +1,131 @@
+use core::ops::Range;
+
+use kernel_arch_interface::{mem::DeviceMemoryAttributes, sync::IrqSafeSpinlock, Architecture};
+use kernel_arch_x86::registers::CR3;
+use libk_mm_interface::{
+    address::PhysicalAddress,
+    device::{DevicePageManager, DevicePageTableLevel},
+    table::{page_index, EntryLevel},
+};
+
+use crate::{
+    mem::{
+        auto_lower_address,
+        table::{PageAttributes, PageEntry, PageTable, L0, L1, L2, L3},
+    },
+    ArchitectureImpl, KERNEL_VIRT_OFFSET,
+};
+
+pub const IDENTITY_SIZE_L1: usize = 64;
+pub const KERNEL_L0I: usize = page_index::<L0>(KERNEL_VIRT_OFFSET);
+
+pub const DEVICE_L1: usize = IDENTITY_SIZE_L1;
+pub const DEVICE_MAPPING_L3_COUNT: usize = 32;
+pub const DEVICE_MAPPING_OFFSET: usize = KERNEL_VIRT_OFFSET + (DEVICE_L1 << L1::SHIFT);
+
+pub static LOCK: IrqSafeSpinlock<ArchitectureImpl, ()> = IrqSafeSpinlock::new(());
+pub static mut KERNEL_PDPT: PageTable<L1> = PageTable::zeroed();
+pub static mut KERNEL_PML4: PageTable<L0> = PageTable::zeroed();
+
+pub(super) static mut DEVICE_MEMORY: DevicePageManager<L3DeviceMemory, L2DeviceMemory> =
+    DevicePageManager::new(
+        L3DeviceMemory([PageTable::zeroed(); DEVICE_MAPPING_L3_COUNT]),
+        L2DeviceMemory(PageTable::zeroed()),
+    );
+
+#[repr(transparent)]
+pub struct L2DeviceMemory(pub PageTable<L2>);
+#[repr(transparent)]
+pub struct L3DeviceMemory(pub [PageTable<L3>; DEVICE_MAPPING_L3_COUNT]);
+
+impl DevicePageTableLevel for L2DeviceMemory {
+    type Level = L2;
+    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
+    const INDEX_RANGE: Range<usize> = DEVICE_MAPPING_L3_COUNT..512;
+
+    fn map_page(
+        &mut self,
+        index: usize,
+        physical: PhysicalAddress,
+        attrs: &DeviceMemoryAttributes,
+    ) {
+        let _ = attrs;
+        self.0[index] = PageEntry::<L2>::block(physical, PageAttributes::WRITABLE);
+    }
+
+    fn unmap_page(&mut self, index: usize) {
+        self.0[index - DEVICE_MAPPING_L3_COUNT] = PageEntry::INVALID;
+    }
+
+    fn is_mapped(&self, index: usize) -> bool {
+        self.0[index - DEVICE_MAPPING_L3_COUNT].is_present()
+    }
+
+    fn flush_range(range: Range<usize>) {
+        let _ = range;
+    }
+}
+
+impl DevicePageTableLevel for L3DeviceMemory {
+    type Level = L3;
+    const VIRTUAL_BASE: usize = DEVICE_MAPPING_OFFSET;
+    const INDEX_RANGE: Range<usize> = 0..512 * DEVICE_MAPPING_L3_COUNT;
+
+    fn map_page(
+        &mut self,
+        index: usize,
+        physical: PhysicalAddress,
+        attrs: &DeviceMemoryAttributes,
+    ) {
+        let _ = attrs;
+        let l2i = index / 512;
+        let l3i = index % 512;
+        self.0[l2i][l3i] = PageEntry::page(physical, PageAttributes::WRITABLE);
+    }
+
+    fn unmap_page(&mut self, index: usize) {
+        let l2i = index / 512;
+        let l3i = index % 512;
+        self.0[l2i][l3i] = PageEntry::INVALID;
+    }
+
+    fn is_mapped(&self, index: usize) -> bool {
+        let l2i = index / 512;
+        let l3i = index % 512;
+        self.0[l2i][l3i].is_present()
+    }
+
+    fn flush_range(range: Range<usize>) {
+        let _ = range;
+    }
+}
+
+pub(super) unsafe fn setup(have_1gib_pages: bool) {
+    let phys = PhysicalAddress::from_usize(auto_lower_address(&raw const KERNEL_PDPT));
+    KERNEL_PML4[KERNEL_L0I] = PageEntry::table(phys, PageAttributes::WRITABLE);
+
+    if have_1gib_pages {
+        for i in 0..IDENTITY_SIZE_L1 {
+            let phys = PhysicalAddress::from_usize(i * L1::SIZE);
+            KERNEL_PDPT[i] = PageEntry::<L1>::block(phys, PageAttributes::WRITABLE);
+        }
+    } else {
+        // TODO
+        ArchitectureImpl::halt();
+    }
+
+    // DEVICE_L1 -> Device L2 table
+    //               0..DEVICE_MAPPING_L3_COUNT -> Device L3 tables -> Device L3 pages
+    //               ..512                      -> Device L2 pages
+    for i in 0..DEVICE_MAPPING_L3_COUNT {
+        let phys =
+            PhysicalAddress::from_usize(auto_lower_address(&raw const DEVICE_MEMORY.normal.0[i]));
+        DEVICE_MEMORY.large.0[i] = PageEntry::table(phys, PageAttributes::WRITABLE);
+    }
+    let phys = PhysicalAddress::from_usize(auto_lower_address(&raw const DEVICE_MEMORY.large.0));
+    KERNEL_PDPT[DEVICE_L1] = PageEntry::table(phys, PageAttributes::WRITABLE);
+}
+
+pub(super) unsafe fn load() {
+    CR3.set_address(auto_lower_address(&raw const KERNEL_PML4));
+}

kernel/arch/x86_64/src/mem/mod.rs

@@ -1,19 +1,14 @@
-use kernel_arch_interface::{
-    mem::{DeviceMemoryAttributes, KernelTableManager, RawDeviceMemoryMapping},
-    sync::IrqSafeSpinlock,
-};
-use kernel_arch_x86::registers::CR3;
-use libk_mm_interface::{
-    address::PhysicalAddress,
-    table::{EntryLevel, EntryLevelExt},
+use kernel_arch_interface::mem::{
+    DeviceMemoryAttributes, KernelTableManager, RawDeviceMemoryMapping,
 };
+use libk_mm_interface::{address::PhysicalAddress, table::EntryLevel};
 use yggdrasil_abi::error::Error;
 
-use crate::{ArchitectureImpl, KERNEL_VIRT_OFFSET};
+use crate::KERNEL_VIRT_OFFSET;
 
-use self::table::{PageAttributes, PageEntry, PageTable, L0, L1, L2};
+use self::table::{PageTable, L0, L1};
 
-pub mod device;
+pub mod fixed;
 pub mod process;
 pub mod table;
 
@@ -23,17 +18,20 @@ pub struct KernelTableManagerImpl;
 impl KernelTableManager for KernelTableManagerImpl {
     fn virtualize(address: u64) -> usize {
         let address = address as usize;
-        if address >= IDENTITY_SIZE {
-            panic!("Invalid physical address to virtualize: {address:#x}");
+        if address < fixed::IDENTITY_SIZE_L1 * L1::SIZE {
+            address + KERNEL_VIRT_OFFSET
+        } else {
+            panic!("Invalid physical address: {address:#x}");
         }
-        address + KERNEL_VIRT_OFFSET
     }
 
     fn physicalize(address: usize) -> u64 {
-        if address < KERNEL_VIRT_OFFSET || address - KERNEL_VIRT_OFFSET >= IDENTITY_SIZE {
+        if address < KERNEL_VIRT_OFFSET
+            || address - KERNEL_VIRT_OFFSET >= fixed::IDENTITY_SIZE_L1 * L1::SIZE
+        {
             panic!("Invalid virtualized address: {address:#x}");
         }
-        (address - KERNEL_VIRT_OFFSET) as _
+        (address - KERNEL_VIRT_OFFSET) as u64
     }
 
     unsafe fn map_device_pages(
@@ -41,41 +39,24 @@ impl KernelTableManager for KernelTableManagerImpl {
         count: usize,
         attrs: DeviceMemoryAttributes,
     ) -> Result<RawDeviceMemoryMapping<Self>, Error> {
-        let _guard = DEVICE_MEMORY_LOCK.lock();
+        let _lock = fixed::LOCK.lock();
         #[allow(static_mut_refs)]
-        {
-            device::DEVICE_MEMORY.map_device_pages(PhysicalAddress::from_u64(base), count, attrs)
-        }
+        fixed::DEVICE_MEMORY.map_device_pages(PhysicalAddress::from_u64(base), count, attrs)
     }
 
     unsafe fn unmap_device_pages(mapping: &RawDeviceMemoryMapping<Self>) {
-        let _guard = DEVICE_MEMORY_LOCK.lock();
+        let _lock = fixed::LOCK.lock();
         #[allow(static_mut_refs)]
-        {
-            device::DEVICE_MEMORY.unmap_device_pages(mapping);
-        }
+        fixed::DEVICE_MEMORY.unmap_device_pages(mapping);
     }
 }
 
 pub fn clone_kernel_tables(dst: &mut PageTable<L0>) {
     unsafe {
-        let kernel_l0i = KERNEL_VIRT_OFFSET.page_index::<L0>();
-        dst[kernel_l0i] = FIXED_PML4[kernel_l0i];
+        dst[fixed::KERNEL_L0I] = fixed::KERNEL_PML4[fixed::KERNEL_L0I];
     }
 }
 
-const FIXED_PD_COUNT: usize = 32;
-const IDENTITY_SIZE: usize = FIXED_PD_COUNT * L1::SIZE;
-
-const DEVICE_MAPPING_L1I: usize = FIXED_PD_COUNT;
-const DEVICE_MEMORY_L3_COUNT: usize = 16;
-const DEVICE_MAPPING_OFFSET: usize = KERNEL_VIRT_OFFSET + IDENTITY_SIZE;
-
-static DEVICE_MEMORY_LOCK: IrqSafeSpinlock<ArchitectureImpl, ()> = IrqSafeSpinlock::new(());
-static mut FIXED_PDS: [PageTable<L2>; FIXED_PD_COUNT] = [PageTable::zeroed(); FIXED_PD_COUNT];
-static mut FIXED_PDPT: PageTable<L1> = PageTable::zeroed();
-pub static mut FIXED_PML4: PageTable<L0> = PageTable::zeroed();
-
 pub fn auto_lower_address<T>(pointer: *const T) -> usize {
     let address = pointer.addr();
     if address < KERNEL_VIRT_OFFSET {
@@ -85,80 +66,30 @@ pub fn auto_lower_address<T>(pointer: *const T) -> usize {
     }
 }
 
-pub unsafe fn init_fixed_tables(have_1gib_pages: bool) {
-    if have_1gib_pages {
-        for i in 0..IDENTITY_SIZE / L1::SIZE {
-            FIXED_PDPT[i] = PageEntry::<L1>::block(
-                PhysicalAddress::from_usize(i * L1::SIZE),
-                PageAttributes::WRITABLE,
-            );
-        }
-    } else {
-        for i in 0..IDENTITY_SIZE / L1::SIZE {
-            for j in 0..512 {
-                FIXED_PDS[i][j] = PageEntry::<L2>::block(
-                    PhysicalAddress::from_usize(i * L1::SIZE + j * L2::SIZE),
-                    PageAttributes::WRITABLE,
-                );
-            }
-            let pd_physical =
-                PhysicalAddress::from_usize(auto_lower_address(&raw const FIXED_PDS[i]));
-            FIXED_PDPT[i] = PageEntry::table(pd_physical, PageAttributes::WRITABLE);
-        }
+/// Sets up the following memory map:
+/// ...: KERNEL_TABLES.l0:
+///     * 0xFFFFFF0000000000 .. 0xFFFFFFFF8000000000        : RAM_MAPPING_L1
+///     * 0xFFFFFF8000000000 .. ...                         : KERNEL_TABLES.kernel_l1:
+///         * 0xFFFFFF8000000000 .. 0xFFFFFF8040000000      : KERNEL_TABLES.kernel_l2
+///             * 0xFFFFFF8000000000 .. 0xFFFFFF8000200000  : ---
+///             * 0xFFFFFF8000200000 .. 0xFFFFFF8000400000  : EARLY_MAPPING_L3
+///             * 0xFFFFFF8000400000 .. ...                 : KERNEL_TABLES.kernel_l3s
+///         * 0xFFFFFF8040000000 .. 0xFFFFFF8080000000      : ---
+///         * 0xFFFFFF8080000000 .. 0xFFFFFF8100000000      : DEVICE_MAPPING_L2
+///             * 0xFFFFFF8080000000 .. 0xFFFFFF8080800000  : DEVICE_MAPPING_L3S
+///             * 0xFFFFFF8080800000 .. 0xFFFFFF8100000000  : ...
+///
+/// # Safety
+///
+/// Unsafe, must only be called by BSP during its early init, must already be in "higher-half"
+#[inline(never)]
+pub unsafe fn init_fixed_tables(have_1gib_pages: bool, bsp: bool) {
+    fixed::setup(have_1gib_pages);
+    if bsp {
+        fixed::load();
     }
-
-    // Device memory
-    let device_pd_physical =
-        PhysicalAddress::from_usize(auto_lower_address(&raw const device::DEVICE_MEMORY.large));
-
-    for i in 0..DEVICE_MEMORY_L3_COUNT {
-        let device_pt_physical = PhysicalAddress::from_usize(auto_lower_address(
-            &raw const device::DEVICE_MEMORY.normal.0[i],
-        ));
-        device::DEVICE_MEMORY.large.0[i] =
-            PageEntry::table(device_pt_physical, PageAttributes::WRITABLE);
-    }
-
-    FIXED_PDPT[DEVICE_MAPPING_L1I] =
-        PageEntry::<L1>::table(device_pd_physical, PageAttributes::WRITABLE);
-
-    let pdpt_physical = PhysicalAddress::from_usize(auto_lower_address(&raw const FIXED_PDPT));
-
-    FIXED_PML4[KERNEL_VIRT_OFFSET.page_index::<L0>()] =
-        PageEntry::table(pdpt_physical, PageAttributes::WRITABLE);
-
-    let pml4_physical = auto_lower_address(&raw const FIXED_PML4);
-    CR3.set_address(pml4_physical);
 }
-//     let mut tables = KERNEL_TABLES.lock();
-//
-//     // TODO this could be built in compile-time too?
-//     let early_mapping_l3_phys = auto_address(&raw const EARLY_MAPPING_L3);
-//     let device_mapping_l2_phys = auto_address(&raw const DEVICE_MAPPING_L2);
-//     let ram_mapping_l1_phys = auto_address(&raw const RAM_MAPPING_L1);
-//
-//     for i in 0..DEVICE_MAPPING_L3_COUNT {
-//         let device_mapping_l3_phys =
-//             PhysicalAddress::from_usize(auto_address(&raw const DEVICE_MAPPING_L3S[i]));
-//         DEVICE_MAPPING_L2[i] = PageEntry::table(device_mapping_l3_phys, PageAttributes::WRITABLE);
-//     }
-//
-//     assert_eq!(tables.kernel_l2.data[EARLY_MAPPING_L2I], 0);
-//     tables.kernel_l2.data[EARLY_MAPPING_L2I] = (early_mapping_l3_phys as u64)
-//         | (PageAttributes::WRITABLE | PageAttributes::PRESENT).bits();
-//
-//     assert_eq!(tables.kernel_l1.data[DEVICE_MAPPING_L1I], 0);
-//     tables.kernel_l1.data[DEVICE_MAPPING_L1I] = (device_mapping_l2_phys as u64)
-//         | (PageAttributes::WRITABLE | PageAttributes::PRESENT).bits();
-//
-//     assert_eq!(tables.l0.data[RAM_MAPPING_L0I], 0);
-//     tables.l0.data[RAM_MAPPING_L0I] =
-//         (ram_mapping_l1_phys as u64) | (PageAttributes::WRITABLE | PageAttributes::PRESENT).bits();
-//
-//     // TODO ENABLE EFER.NXE
-//     let cr3 = auto_address(&raw const tables.l0);
-// }
-//
+
 /// # Safety
 ///
 /// `address` must be page-aligned.

kernel/build.rs

@@ -15,7 +15,7 @@ fn build_x86_64() {
     const DEFAULT_8086_AS: &str = "nasm";
     const AP_BOOTSTRAP_S: &str = "src/arch/x86_64/boot/ap_boot.S";
 
-    println!("cargo:rerun-if-changed={}", AP_BOOTSTRAP_S);
+    println!("cargo:rerun-if-changed={AP_BOOTSTRAP_S}");
 
     let out_dir = env::var("OUT_DIR").unwrap();
     let assembler = env::var("AS8086").unwrap_or(DEFAULT_8086_AS.to_owned());
@@ -35,7 +35,7 @@ fn build_x86_64() {
 
     if !output.status.success() {
         io::stderr().write_all(&output.stderr).ok();
-        panic!("{}: could not assemble {}", assembler, AP_BOOTSTRAP_S);
+        panic!("{assembler}: could not assemble {AP_BOOTSTRAP_S}");
     }
 }
 
@@ -93,6 +93,6 @@ fn main() {
         "x86_64" => build_x86_64(),
         "aarch64" => (),
         "riscv64" => (),
-        _ => panic!("Unknown target arch: {:?}", arch),
+        _ => panic!("Unknown target arch: {arch:?}"),
     }
 }

kernel/driver/acpi/src/mem.rs

@@ -35,6 +35,9 @@ unsafe impl Allocator for AcpiAllocator {
 }
 
 // TODO don't map memory as device if not necessary
+/// # Safety
+///
+/// Allows direct reads from physical memory, unsafe
 pub unsafe fn read_memory<T>(address: PhysicalAddress) -> T {
     let io =
         unsafe { DeviceMemoryMapping::map(address, size_of::<T>(), Default::default()).unwrap() };
@@ -49,6 +52,9 @@ pub unsafe fn read_memory<T>(address: PhysicalAddress) -> T {
     }
 }
 
+/// # Safety
+///
+/// Allows direct writes to physical memory, unsafe
 pub unsafe fn write_memory<T>(address: PhysicalAddress, value: T) {
     let io =
         unsafe { DeviceMemoryMapping::map(address, size_of::<T>(), Default::default()).unwrap() };

kernel/driver/block/nvme/src/queue.rs

@@ -129,7 +129,7 @@ impl PrpList {
                 list: None,
             }),
             _ => {
-                let count = (size + 0xFFF) / 0x1000;
+                let count = size.div_ceil(0x1000);
                 let list =
                     DmaBuffer::new_slice_with(dma, |i| base.add((i + 1) * 0x1000), count - 1)
                         .map_err(NvmeError::MemoryError)?;

kernel/driver/block/scsi/src/lib.rs

@@ -71,10 +71,10 @@ impl ScsiEnclosure {
 
         // Probe LUNs
         for i in 0..lun_count {
-            if this.probe_lun(i as u8).await {
-                if let Ok(unit) = ScsiUnit::setup(this.clone(), i as u8).await {
-                    *this.units[i].write() = Some(unit);
-                }
+            if this.probe_lun(i as u8).await
+                && let Ok(unit) = ScsiUnit::setup(this.clone(), i as u8).await
+            {
+                *this.units[i].write() = Some(unit);
             }
         }
 
@@ -117,11 +117,7 @@ impl ScsiEnclosure {
             attempts -= 1;
         }
 
-        if attempts == 0 {
-            false
-        } else {
-            true
-        }
+        attempts != 0
     }
 
     async fn poll(self: &Arc<Self>) {

kernel/driver/block/scsi/src/transport.rs

@@ -44,7 +44,7 @@ impl ScsiTransportWrapper {
             return Err(Error::InvalidArgument);
         }
         let lba_bytes = (lba as u32).to_be_bytes();
-        let lba_count = (lba_count as u16).to_be_bytes();
+        let lba_count = lba_count.to_be_bytes();
         // Issue a READ (10) command
         let request_buffer = [
             0x28,

kernel/driver/bus/pci/src/lib.rs

@@ -1,7 +1,7 @@
 //! PCI/PCIe bus interfaces
 #![no_std]
 #![feature(let_chains, decl_macro)]
-#![allow(clippy::missing_transmute_annotations)]
+#![allow(clippy::missing_transmute_annotations, clippy::identity_op)]
 
 extern crate alloc;
 
@@ -466,7 +466,7 @@ impl PciBusManager {
         for segment in this.segments.iter_mut() {
             for device in segment.devices.iter_mut() {
                 let mut device = device.lock();
-                if !f(&mut *device)? {
+                if !f(&mut device)? {
                     return Ok(());
                 }
             }

kernel/driver/bus/pci/src/space/mod.rs

@@ -374,7 +374,7 @@ pub trait PciConfigurationSpace {
     /// Locates a capability within this configuration space
     fn capability<C: PciCapability>(&self) -> Option<C::CapabilityData<'_, Self>> {
         self.capability_iter().find_map(|(id, offset, len)| {
-            if id.map_or(false, |id| id == C::ID) && C::check(self, offset, len) {
+            if id == Some(C::ID) && C::check(self, offset, len) {
                 Some(C::data(self, offset, len))
             } else {
                 None

kernel/driver/bus/usb/src/address.rs

@@ -1,58 +0,0 @@
-use core::fmt;
-
-#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
-pub struct UsbRoute {
-    bus: u16,
-    ports: [u8; 8],
-    len: u8,
-}
-
-#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
-pub struct UsbBusAddress {
-    pub bus: u16,
-    pub device: u8,
-}
-
-#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
-pub struct UsbInterfaceAddress {
-    pub device: UsbBusAddress,
-    pub interface: u8,
-}
-
-impl UsbBusAddress {
-    pub fn with_interface(self, interface: u8) -> UsbInterfaceAddress {
-        UsbInterfaceAddress {
-            device: self,
-            interface,
-        }
-    }
-}
-
-impl fmt::Display for UsbBusAddress {
-    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-        write!(f, "<Bus {} Device {}>", self.bus, self.device)
-    }
-}
-
-impl fmt::Display for UsbInterfaceAddress {
-    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-        write!(
-            f,
-            "<Bus {} Device {} Interface {}>",
-            self.device.bus, self.device.device, self.interface
-        )
-    }
-}
-
-impl fmt::Display for UsbRoute {
-    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-        write!(f, "{}-", self.bus)?;
-        for (i, &port) in self.ports[..self.len as usize].iter().enumerate() {
-            if i != 0 {
-                write!(f, ".")?;
-            }
-            write!(f, "{port}")?;
-        }
-        Ok(())
-    }
-}

kernel/driver/bus/usb/src/bus.rs

@@ -1,56 +1,34 @@
 use core::sync::atomic::{AtomicU16, Ordering};
 
 use alloc::{collections::BTreeMap, sync::Arc};
-use libk_util::{queue::UnboundedMpmcQueue, sync::spin_rwlock::IrqSafeRwLock, OneTimeInit};
+use libk_util::{queue::UnboundedMpmcQueue, sync::spin_rwlock::IrqSafeRwLock};
 
 use crate::{
-    address::UsbBusAddress,
     class_driver,
-    device::UsbDeviceAccess,
-    sysfs::{self, UsbBusKObject},
+    device::{UsbBusAddress, UsbDeviceAccess},
     UsbHostController,
 };
 
-pub struct UsbBusWrapper {
-    pub(crate) hc: Arc<dyn UsbHostController>,
-    pub(crate) index: u16,
-    kobject: OneTimeInit<UsbBusKObject>,
-}
-
 pub struct UsbBusManager {
-    busses: IrqSafeRwLock<BTreeMap<u16, Arc<UsbBusWrapper>>>,
+    busses: IrqSafeRwLock<BTreeMap<u16, Arc<dyn UsbHostController>>>,
     devices: IrqSafeRwLock<BTreeMap<UsbBusAddress, Arc<UsbDeviceAccess>>>,
 
     last_bus_address: AtomicU16,
 }
 
-impl UsbBusWrapper {
-    pub fn kobject(&self) -> &UsbBusKObject {
-        self.kobject.get()
-    }
-}
-
 impl UsbBusManager {
-    pub fn register_bus(hc: Arc<dyn UsbHostController>) -> (u16, Arc<UsbBusWrapper>) {
+    pub fn register_bus(hc: Arc<dyn UsbHostController>) -> u16 {
         let i = BUS_MANAGER.last_bus_address.fetch_add(1, Ordering::AcqRel);
-        let wrapper = Arc::new(UsbBusWrapper {
-            hc,
-            index: i,
-            kobject: OneTimeInit::new(),
-        });
-        BUS_MANAGER.busses.write().insert(i, wrapper.clone());
-        wrapper.kobject.init(sysfs::register_bus_kobject(&wrapper));
-        (i, wrapper)
+        BUS_MANAGER.busses.write().insert(i, hc);
+        i
     }
 
     pub fn register_device(device: Arc<UsbDeviceAccess>) {
         log::info!("usb: register device {}", device.bus_address());
-
         BUS_MANAGER
             .devices
             .write()
             .insert(device.bus_address(), device.clone());
-        device.kobject.init(sysfs::register_device_kobject(&device));
 
         QUEUE.push_back(device);
     }
@@ -73,11 +51,7 @@ pub async fn bus_handler() {
             new_device.bus_address()
         );
 
-        let address = new_device.bus_address();
-        if let Err(error) = class_driver::setup_device(new_device).await {
-            log::warn!("USB device {address} setup error: {error:?}",);
-        }
-        // class_driver::spawn_driver(new_device).await.ok();
+        class_driver::spawn_driver(new_device).await.ok();
     }
 }
 

kernel/driver/bus/usb/src/class_driver/hid_keyboard.rs

@@ -4,12 +4,9 @@ use alloc::{boxed::Box, sync::Arc};
 use async_trait::async_trait;
 use yggdrasil_abi::io::{KeyboardKey, KeyboardKeyEvent};
 
-use crate::{
-    class_driver::{UsbInterfaceClass, UsbInterfaceDriver},
-    device::UsbDeviceAccess,
-    error::UsbError,
-    info::UsbInterfaceInfo,
-};
+use crate::{device::UsbDeviceAccess, error::UsbError, info::UsbDeviceClass};
+
+use super::{UsbClassInfo, UsbDriver};
 
 pub struct UsbHidKeyboardDriver;
 
@@ -128,14 +125,10 @@ impl KeyboardState {
 }
 
 #[async_trait]
-impl UsbInterfaceDriver for UsbHidKeyboardDriver {
-    async fn run(
-        self: Arc<Self>,
-        device: Arc<UsbDeviceAccess>,
-        _interface: UsbInterfaceInfo,
-    ) -> Result<(), UsbError> {
+impl UsbDriver for UsbHidKeyboardDriver {
+    async fn run(self: Arc<Self>, device: Arc<UsbDeviceAccess>) -> Result<(), UsbError> {
         // TODO not sure whether to use boot protocol (easy) or GetReport
-        let config = device.current_configuration().unwrap();
+        let config = device.select_configuration(|_| true).await?.unwrap();
 
         log::info!("Setup HID keyboard");
         let pipe = device
@@ -163,7 +156,7 @@ impl UsbInterfaceDriver for UsbHidKeyboardDriver {
 
             for &event in events {
                 log::trace!("Generic Keyboard: {:?}", event);
-                ygg_driver_input::send_keyboard_event(event);
+                ygg_driver_input::send_event(event);
             }
         }
     }
@@ -172,18 +165,12 @@ impl UsbInterfaceDriver for UsbHidKeyboardDriver {
         "USB HID Keyboard"
     }
 
-    fn probe(
-        &self,
-        device: &UsbDeviceAccess,
-        interface: &UsbInterfaceInfo,
-        class: UsbInterfaceClass,
-    ) -> bool {
-        let _ = (device, interface);
-        class
-            == UsbInterfaceClass {
-                class: 3,
-                subclass: 1,
-                protocol: 1,
-            }
+    fn probe(&self, class: &UsbClassInfo, _device: &UsbDeviceAccess) -> bool {
+        log::info!(
+            "class = {:?}, subclass = {:02x}",
+            class.class,
+            class.subclass
+        );
+        class.class == UsbDeviceClass::Hid && (class.subclass == 0x00 || class.subclass == 0x01)
     }
 }

kernel/driver/bus/usb/src/class_driver/hid_mouse.rs

@@ -1,62 +0,0 @@
-use alloc::{boxed::Box, sync::Arc};
-use async_trait::async_trait;
-use yggdrasil_abi::io::{ButtonMask, MouseEvent};
-
-use crate::{
-    class_driver::{UsbInterfaceClass, UsbInterfaceDriver},
-    device::UsbDeviceAccess,
-    error::UsbError,
-    info::UsbInterfaceInfo,
-};
-
-pub struct UsbHidMouseDriver;
-
-#[async_trait]
-impl UsbInterfaceDriver for UsbHidMouseDriver {
-    async fn run(
-        self: Arc<Self>,
-        device: Arc<UsbDeviceAccess>,
-        _interface: UsbInterfaceInfo,
-    ) -> Result<(), UsbError> {
-        let config = device.current_configuration().unwrap();
-
-        log::info!("Setup HID mouse");
-        let pipe = device
-            .open_interrupt_in_pipe(1, config.endpoints[0].max_packet_size as u16)
-            .await?;
-
-        let mut buffer = [0; 16];
-        loop {
-            let len = pipe.read(&mut buffer).await?;
-            if len < 4 {
-                continue;
-            }
-
-            let event = MouseEvent {
-                buttons: ButtonMask(buffer[0]),
-                dx: (buffer[1] as i8) as i32,
-                dy: (buffer[2] as i8) as i32,
-            };
-
-            ygg_driver_input::send_mouse_event(event);
-        }
-    }
-
-    fn name(&self) -> &'static str {
-        "USB HID Mouse"
-    }
-
-    fn probe(
-        &self,
-        _device: &UsbDeviceAccess,
-        _interface: &UsbInterfaceInfo,
-        class: UsbInterfaceClass,
-    ) -> bool {
-        class
-            == UsbInterfaceClass {
-                class: 3,
-                subclass: 1,
-                protocol: 2,
-            }
-    }
-}

kernel/driver/bus/usb/src/class_driver/mass_storage.rs

@@ -1,273 +1,273 @@
-// use core::mem::MaybeUninit;
-//
-// use alloc::{boxed::Box, sync::Arc};
-// use async_trait::async_trait;
-// use bytemuck::{Pod, Zeroable};
-// use libk::{
-//     dma::{DmaBuffer, DmaSliceMut},
-//     error::Error,
-// };
-// use ygg_driver_scsi::{transport::ScsiTransport, ScsiEnclosure};
-//
-// use crate::{
-//     communication::UsbDirection,
-//     device::{UsbDeviceAccess, UsbDeviceDetachHandler},
-//     error::UsbError,
-//     info::{UsbDeviceClass, UsbEndpointType},
-//     pipe::{
-//         control::{ControlTransferSetup, UsbClassSpecificRequest},
-//         normal::{UsbBulkInPipeAccess, UsbBulkOutPipeAccess},
-//     },
-// };
-//
-// use super::{UsbClassInfo, UsbDriver};
-//
-// pub struct UsbMassStorageDriverBulkOnly;
-//
-// #[derive(Debug, Clone, Copy, Zeroable, Pod)]
-// #[repr(C)]
-// struct Cbw {
-//     signature: u32,       // 0x00
-//     tag: u32,             // 0x04
-//     transfer_length: u32, // 0x08
-//     flags: u8,            // 0x0C
-//     lun: u8,              // 0x0D
-//     cb_length: u8,        // 0x0E
-//     cb_data: [u8; 16],    // 0x0F
-//     // Not sent
-//     _0: u8,
-// }
-//
-// #[derive(Debug, Clone, Copy, Zeroable, Pod)]
-// #[repr(C)]
-// struct Csw {
-//     signature: u32,
-//     tag: u32,
-//     data_residue: u32,
-//     status: u8,
-//     _0: [u8; 3],
-// }
-//
-// struct Bbb {
-//     #[allow(unused)]
-//     device: Arc<UsbDeviceAccess>,
-//     in_pipe: UsbBulkInPipeAccess,
-//     out_pipe: UsbBulkOutPipeAccess,
-//     last_tag: u32,
-// }
-//
-// struct DetachHandler(Arc<ScsiEnclosure>);
-//
-// impl Bbb {
-//     pub fn new(
-//         device: Arc<UsbDeviceAccess>,
-//         in_pipe: UsbBulkInPipeAccess,
-//         out_pipe: UsbBulkOutPipeAccess,
-//     ) -> Result<Self, UsbError> {
-//         Ok(Self {
-//             device,
-//             in_pipe,
-//             out_pipe,
-//             last_tag: 0,
-//         })
-//     }
-// }
-//
-// impl Bbb {
-//     async fn send_cbw(
-//         &mut self,
-//         lun: u8,
-//         host_to_dev: bool,
-//         command: &[u8],
-//         response_len: usize,
-//     ) -> Result<u32, Error> {
-//         self.last_tag = self.last_tag.wrapping_add(1);
-//
-//         let flags = if !host_to_dev { 1 << 7 } else { 0 };
-//         let tag = self.last_tag;
-//         let mut cbw_bytes = [0; 32];
-//         let cbw = bytemuck::from_bytes_mut::<Cbw>(&mut cbw_bytes);
-//
-//         cbw.signature = 0x43425355;
-//         cbw.transfer_length = response_len as u32;
-//         cbw.flags = flags;
-//         cbw.tag = tag;
-//         cbw.lun = lun;
-//         cbw.cb_length = command.len() as u8;
-//         cbw.cb_data[..command.len()].copy_from_slice(command);
-//
-//         self.out_pipe
-//             .write(&cbw_bytes[..31])
-//             .await
-//             .inspect_err(|error| log::error!("msc: CBW send error: {error:?}"))?;
-//
-//         Ok(tag)
-//     }
-//
-//     async fn read_csw(&mut self, tag: u32) -> Result<(), Error> {
-//         let mut csw_bytes = [0; 16];
-//         self.in_pipe
-//             .read_exact(&mut csw_bytes[..13])
-//             .await
-//             .inspect_err(|error| log::error!("msc: CSW receive error: {error:?}"))?;
-//         let csw = bytemuck::from_bytes::<Csw>(&csw_bytes);
-//
-//         if csw.signature != 0x53425355 {
-//             log::warn!("msc: invalid csw signature");
-//             return Err(Error::InvalidArgument);
-//         }
-//         if csw.tag != tag {
-//             let csw_tag = csw.tag;
-//             log::warn!("msc: invalid csw tag (got {}, expected {tag})", csw_tag);
-//             return Err(Error::InvalidArgument);
-//         }
-//         if csw.status != 0x00 {
-//             return Err(Error::InvalidArgument);
-//         }
-//         Ok(())
-//     }
-//
-//     async fn read_response_data(
-//         &mut self,
-//         buffer: DmaSliceMut<'_, MaybeUninit<u8>>,
-//     ) -> Result<usize, Error> {
-//         if buffer.len() == 0 {
-//             return Ok(0);
-//         }
-//         let len = self
-//             .in_pipe
-//             .read_dma(buffer)
-//             .await
-//             .inspect_err(|error| log::error!("msc: DMA read error: {error:?}"))?;
-//         Ok(len)
-//     }
-// }
-//
-// #[async_trait]
-// impl ScsiTransport for Bbb {
-//     fn allocate_buffer(&self, size: usize) -> Result<DmaBuffer<[MaybeUninit<u8>]>, Error> {
-//         Ok(self.in_pipe.allocate_dma_buffer(size)?)
-//     }
-//
-//     async fn perform_request_raw(
-//         &mut self,
-//         lun: u8,
-//         request_data: &[u8],
-//         response_buffer: DmaSliceMut<'_, MaybeUninit<u8>>,
-//     ) -> Result<usize, Error> {
-//         if request_data.len() > 16 || response_buffer.len() > self.max_bytes_per_request() {
-//             return Err(Error::InvalidArgument);
-//         }
-//
-//         let tag = self
-//             .send_cbw(lun, false, request_data, response_buffer.len())
-//             .await?;
-//         let response_len = self.read_response_data(response_buffer).await?;
-//         self.read_csw(tag).await?;
-//         Ok(response_len)
-//     }
-//
-//     fn max_bytes_per_request(&self) -> usize {
-//         32768
-//     }
-// }
-//
-// impl UsbDeviceDetachHandler for DetachHandler {
-//     fn handle_device_detach(&self) {
-//         log::info!("Mass storage detached");
-//         self.0.detach();
-//     }
-// }
-//
-// #[derive(Debug, Pod, Zeroable, Clone, Copy)]
-// #[repr(C)]
-// pub struct BulkOnlyMassStorageReset;
-//
-// #[derive(Debug, Pod, Zeroable, Clone, Copy)]
-// #[repr(C)]
-// pub struct GetMaxLun;
-//
-// impl UsbClassSpecificRequest for BulkOnlyMassStorageReset {
-//     const BM_REQUEST_TYPE: u8 = 0b00100001;
-//     const B_REQUEST: u8 = 0b11111111;
-// }
-//
-// impl UsbClassSpecificRequest for GetMaxLun {
-//     const BM_REQUEST_TYPE: u8 = 0b10100001;
-//     const B_REQUEST: u8 = 0b11111110;
-// }
-//
-// #[async_trait]
-// impl UsbDriver for UsbMassStorageDriverBulkOnly {
-//     async fn run(self: Arc<Self>, device: Arc<UsbDeviceAccess>) -> Result<(), UsbError> {
-//         // TODO filter to only accept BBB config
-//         let config = device.select_configuration(|_| true).await?.unwrap();
-//         // Bulk-in, bulk-out
-//         assert_eq!(config.endpoints.len(), 2);
-//         let control_pipe = device.control_pipe();
-//         let (in_index, in_info) = config
-//             .find_endpoint(|ep| ep.is(UsbEndpointType::Bulk, UsbDirection::In))
-//             .ok_or(UsbError::InvalidConfiguration)?;
-//         let (out_index, out_info) = config
-//             .find_endpoint(|ep| ep.is(UsbEndpointType::Bulk, UsbDirection::Out))
-//             .ok_or(UsbError::InvalidConfiguration)?;
-//         let in_pipe = device
-//             .open_bulk_in_pipe(in_index, in_info.max_packet_size as u16)
-//             .await?;
-//         let out_pipe = device
-//             .open_bulk_out_pipe(out_index, out_info.max_packet_size as u16)
-//             .await?;
-//
-//         // Perform a Bulk-Only Mass Storage Reset
-//         // TODO interface id?
-//         control_pipe
-//             .control_transfer(ControlTransferSetup {
-//                 bm_request_type: BulkOnlyMassStorageReset::BM_REQUEST_TYPE,
-//                 b_request: BulkOnlyMassStorageReset::B_REQUEST,
-//                 w_value: 0,
-//                 w_index: 0,
-//                 w_length: 0,
-//             })
-//             .await?;
-//
-//         // Get max LUN
-//         // TODO on devices which do not support multiple LUNs, this command may STALL
-//         let mut buffer = [MaybeUninit::uninit()];
-//         let len = control_pipe
-//             .control_transfer_in(
-//                 ControlTransferSetup {
-//                     bm_request_type: GetMaxLun::BM_REQUEST_TYPE,
-//                     b_request: GetMaxLun::B_REQUEST,
-//                     w_value: 0,
-//                     w_index: 0,
-//                     w_length: 1,
-//                 },
-//                 &mut buffer,
-//             )
-//             .await?;
-//         let max_lun = if len < 1 {
-//             0
-//         } else {
-//             unsafe { buffer[0].assume_init() }
-//         };
-//
-//         let bbb = Bbb::new(device.clone(), in_pipe, out_pipe)?;
-//         let scsi = ScsiEnclosure::setup(Box::new(bbb), max_lun as usize + 1)
-//             .await
-//             .inspect_err(|error| log::error!("msc: scsi error {error:?}"))
-//             .map_err(|_| UsbError::DriverError)?;
-//         let detach = DetachHandler(scsi.clone());
-//         device.set_detach_handler(Arc::new(detach));
-//
-//         Ok(())
-//     }
-//
-//     fn name(&self) -> &'static str {
-//         "USB Mass Storage"
-//     }
-//
-//     fn probe(&self, class: &UsbClassInfo, _device: &UsbDeviceAccess) -> bool {
-//         // TODO support other protocols
-//         class.class == UsbDeviceClass::MassStorage && class.interface_protocol_number == 0x50
-//     }
-// }
+use core::mem::MaybeUninit;
+
+use alloc::{boxed::Box, sync::Arc};
+use async_trait::async_trait;
+use bytemuck::{Pod, Zeroable};
+use libk::{
+    dma::{DmaBuffer, DmaSliceMut},
+    error::Error,
+};
+use ygg_driver_scsi::{transport::ScsiTransport, ScsiEnclosure};
+
+use crate::{
+    communication::UsbDirection,
+    device::{UsbDeviceAccess, UsbDeviceDetachHandler},
+    error::UsbError,
+    info::{UsbDeviceClass, UsbEndpointType},
+    pipe::{
+        control::{ControlTransferSetup, UsbClassSpecificRequest},
+        normal::{UsbBulkInPipeAccess, UsbBulkOutPipeAccess},
+    },
+};
+
+use super::{UsbClassInfo, UsbDriver};
+
+pub struct UsbMassStorageDriverBulkOnly;
+
+#[derive(Debug, Clone, Copy, Zeroable, Pod)]
+#[repr(C)]
+struct Cbw {
+    signature: u32,       // 0x00
+    tag: u32,             // 0x04
+    transfer_length: u32, // 0x08
+    flags: u8,            // 0x0C
+    lun: u8,              // 0x0D
+    cb_length: u8,        // 0x0E
+    cb_data: [u8; 16],    // 0x0F
+    // Not sent
+    _0: u8,
+}
+
+#[derive(Debug, Clone, Copy, Zeroable, Pod)]
+#[repr(C)]
+struct Csw {
+    signature: u32,
+    tag: u32,
+    data_residue: u32,
+    status: u8,
+    _0: [u8; 3],
+}
+
+struct Bbb {
+    #[allow(unused)]
+    device: Arc<UsbDeviceAccess>,
+    in_pipe: UsbBulkInPipeAccess,
+    out_pipe: UsbBulkOutPipeAccess,
+    last_tag: u32,
+}
+
+struct DetachHandler(Arc<ScsiEnclosure>);
+
+impl Bbb {
+    pub fn new(
+        device: Arc<UsbDeviceAccess>,
+        in_pipe: UsbBulkInPipeAccess,
+        out_pipe: UsbBulkOutPipeAccess,
+    ) -> Result<Self, UsbError> {
+        Ok(Self {
+            device,
+            in_pipe,
+            out_pipe,
+            last_tag: 0,
+        })
+    }
+}
+
+impl Bbb {
+    async fn send_cbw(
+        &mut self,
+        lun: u8,
+        host_to_dev: bool,
+        command: &[u8],
+        response_len: usize,
+    ) -> Result<u32, Error> {
+        self.last_tag = self.last_tag.wrapping_add(1);
+
+        let flags = if !host_to_dev { 1 << 7 } else { 0 };
+        let tag = self.last_tag;
+        let mut cbw_bytes = [0; 32];
+        let cbw = bytemuck::from_bytes_mut::<Cbw>(&mut cbw_bytes);
+
+        cbw.signature = 0x43425355;
+        cbw.transfer_length = response_len as u32;
+        cbw.flags = flags;
+        cbw.tag = tag;
+        cbw.lun = lun;
+        cbw.cb_length = command.len() as u8;
+        cbw.cb_data[..command.len()].copy_from_slice(command);
+
+        self.out_pipe
+            .write(&cbw_bytes[..31])
+            .await
+            .inspect_err(|error| log::error!("msc: CBW send error: {error:?}"))?;
+
+        Ok(tag)
+    }
+
+    async fn read_csw(&mut self, tag: u32) -> Result<(), Error> {
+        let mut csw_bytes = [0; 16];
+        self.in_pipe
+            .read_exact(&mut csw_bytes[..13])
+            .await
+            .inspect_err(|error| log::error!("msc: CSW receive error: {error:?}"))?;
+        let csw = bytemuck::from_bytes::<Csw>(&csw_bytes);
+
+        if csw.signature != 0x53425355 {
+            log::warn!("msc: invalid csw signature");
+            return Err(Error::InvalidArgument);
+        }
+        if csw.tag != tag {
+            let csw_tag = csw.tag;
+            log::warn!("msc: invalid csw tag (got {}, expected {tag})", csw_tag);
+            return Err(Error::InvalidArgument);
+        }
+        if csw.status != 0x00 {
+            return Err(Error::InvalidArgument);
+        }
+        Ok(())
+    }
+
+    async fn read_response_data(
+        &mut self,
+        buffer: DmaSliceMut<'_, MaybeUninit<u8>>,
+    ) -> Result<usize, Error> {
+        if buffer.is_empty() {
+            return Ok(0);
+        }
+        let len = self
+            .in_pipe
+            .read_dma(buffer)
+            .await
+            .inspect_err(|error| log::error!("msc: DMA read error: {error:?}"))?;
+        Ok(len)
+    }
+}
+
+#[async_trait]
+impl ScsiTransport for Bbb {
+    fn allocate_buffer(&self, size: usize) -> Result<DmaBuffer<[MaybeUninit<u8>]>, Error> {
+        Ok(self.in_pipe.allocate_dma_buffer(size)?)
+    }
+
+    async fn perform_request_raw(
+        &mut self,
+        lun: u8,
+        request_data: &[u8],
+        response_buffer: DmaSliceMut<'_, MaybeUninit<u8>>,
+    ) -> Result<usize, Error> {
+        if request_data.len() > 16 || response_buffer.len() > self.max_bytes_per_request() {
+            return Err(Error::InvalidArgument);
+        }
+
+        let tag = self
+            .send_cbw(lun, false, request_data, response_buffer.len())
+            .await?;
+        let response_len = self.read_response_data(response_buffer).await?;
+        self.read_csw(tag).await?;
+        Ok(response_len)
+    }
+
+    fn max_bytes_per_request(&self) -> usize {
+        32768
+    }
+}
+
+impl UsbDeviceDetachHandler for DetachHandler {
+    fn handle_device_detach(&self) {
+        log::info!("Mass storage detached");
+        self.0.detach();
+    }
+}
+
+#[derive(Debug, Pod, Zeroable, Clone, Copy)]
+#[repr(C)]
+pub struct BulkOnlyMassStorageReset;
+
+#[derive(Debug, Pod, Zeroable, Clone, Copy)]
+#[repr(C)]
+pub struct GetMaxLun;
+
+impl UsbClassSpecificRequest for BulkOnlyMassStorageReset {
+    const BM_REQUEST_TYPE: u8 = 0b00100001;
+    const B_REQUEST: u8 = 0b11111111;
+}
+
+impl UsbClassSpecificRequest for GetMaxLun {
+    const BM_REQUEST_TYPE: u8 = 0b10100001;
+    const B_REQUEST: u8 = 0b11111110;
+}
+
+#[async_trait]
+impl UsbDriver for UsbMassStorageDriverBulkOnly {
+    async fn run(self: Arc<Self>, device: Arc<UsbDeviceAccess>) -> Result<(), UsbError> {
+        // TODO filter to only accept BBB config
+        let config = device.select_configuration(|_| true).await?.unwrap();
+        // Bulk-in, bulk-out
+        assert_eq!(config.endpoints.len(), 2);
+        let control_pipe = device.control_pipe();
+        let (in_index, in_info) = config
+            .find_endpoint(|ep| ep.is(UsbEndpointType::Bulk, UsbDirection::In))
+            .ok_or(UsbError::InvalidConfiguration)?;
+        let (out_index, out_info) = config
+            .find_endpoint(|ep| ep.is(UsbEndpointType::Bulk, UsbDirection::Out))
+            .ok_or(UsbError::InvalidConfiguration)?;
+        let in_pipe = device
+            .open_bulk_in_pipe(in_index, in_info.max_packet_size as u16)
+            .await?;
+        let out_pipe = device
+            .open_bulk_out_pipe(out_index, out_info.max_packet_size as u16)
+            .await?;
+
+        // Perform a Bulk-Only Mass Storage Reset
+        // TODO interface id?
+        control_pipe
+            .control_transfer(ControlTransferSetup {
+                bm_request_type: BulkOnlyMassStorageReset::BM_REQUEST_TYPE,
+                b_request: BulkOnlyMassStorageReset::B_REQUEST,
+                w_value: 0,
+                w_index: 0,
+                w_length: 0,
+            })
+            .await?;
+
+        // Get max LUN
+        // TODO on devices which do not support multiple LUNs, this command may STALL
+        let mut buffer = [MaybeUninit::uninit()];
+        let len = control_pipe
+            .control_transfer_in(
+                ControlTransferSetup {
+                    bm_request_type: GetMaxLun::BM_REQUEST_TYPE,
+                    b_request: GetMaxLun::B_REQUEST,
+                    w_value: 0,
+                    w_index: 0,
+                    w_length: 1,
+                },
+                &mut buffer,
+            )
+            .await?;
+        let max_lun = if len < 1 {
+            0
+        } else {
+            unsafe { buffer[0].assume_init() }
+        };
+
+        let bbb = Bbb::new(device.clone(), in_pipe, out_pipe)?;
+        let scsi = ScsiEnclosure::setup(Box::new(bbb), max_lun as usize + 1)
+            .await
+            .inspect_err(|error| log::error!("msc: scsi error {error:?}"))
+            .map_err(|_| UsbError::DriverError)?;
+        let detach = DetachHandler(scsi.clone());
+        device.set_detach_handler(Arc::new(detach));
+
+        Ok(())
+    }
+
+    fn name(&self) -> &'static str {
+        "USB Mass Storage"
+    }
+
+    fn probe(&self, class: &UsbClassInfo, _device: &UsbDeviceAccess) -> bool {
+        // TODO support other protocols
+        class.class == UsbDeviceClass::MassStorage && class.interface_protocol_number == 0x50
+    }
+}

kernel/driver/bus/usb/src/class_driver/mod.rs

@@ -4,105 +4,114 @@ use libk::task::runtime;
 use libk_util::sync::spin_rwlock::IrqSafeRwLock;
 
 use crate::{
-    address::UsbInterfaceAddress, device::UsbDeviceAccess, error::UsbError, info::UsbInterfaceInfo,
+    device::UsbDeviceAccess,
+    error::UsbError,
+    info::{UsbDeviceClass, UsbDeviceProtocol},
 };
 
 pub mod hid_keyboard;
-pub mod hid_mouse;
-// pub mod mass_storage;
+pub mod mass_storage;
 
-#[derive(Debug, Clone, Copy, PartialEq, Eq)]
-pub struct UsbInterfaceClass {
-    pub class: u8,
+#[derive(Debug)]
+pub struct UsbClassInfo {
+    pub class: UsbDeviceClass,
     pub subclass: u8,
-    pub protocol: u8,
+    pub protocol: UsbDeviceProtocol,
+    pub device_protocol_number: u8,
+    pub interface_protocol_number: u8,
 }
 
 #[async_trait]
-pub trait UsbInterfaceDriver: Send + Sync {
-    async fn run(
-        self: Arc<Self>,
-        device: Arc<UsbDeviceAccess>,
-        interface: UsbInterfaceInfo,
-    ) -> Result<(), UsbError>;
+pub trait UsbDriver: Send + Sync {
+    async fn run(self: Arc<Self>, device: Arc<UsbDeviceAccess>) -> Result<(), UsbError>;
 
     fn name(&self) -> &'static str;
-    fn probe(
-        &self,
-        device: &UsbDeviceAccess,
-        interface: &UsbInterfaceInfo,
-        class: UsbInterfaceClass,
-    ) -> bool;
+    fn probe(&self, class: &UsbClassInfo, device: &UsbDeviceAccess) -> bool;
 }
 
-async fn setup_interface(
-    device: &Arc<UsbDeviceAccess>,
-    address: UsbInterfaceAddress,
-    interface: &UsbInterfaceInfo,
-) -> Result<(), UsbError> {
-    let class = UsbInterfaceClass {
-        class: interface.interface_class,
-        subclass: interface.interface_subclass,
-        protocol: interface.interface_protocol,
+async fn extract_class_info(device: &UsbDeviceAccess) -> Result<Option<UsbClassInfo>, UsbError> {
+    if device.info.num_configurations != 1 {
+        return Ok(None);
+    }
+    let device_info = &device.info;
+    let config_info = device.query_configuration_info(0).await?;
+
+    if !config_info.interfaces.is_empty() {
+        let if_info = &config_info.interfaces[0];
+
+        let class = if device_info.device_class == UsbDeviceClass::FromInterface {
+            if_info.interface_class
+        } else {
+            device_info.device_class
+        };
+        let subclass = if device_info.device_subclass == 0 {
+            if_info.interface_subclass
+        } else {
+            device_info.device_subclass
+        };
+        let protocol = if device_info.device_protocol == UsbDeviceProtocol::FromInterface {
+            if_info.interface_protocol
+        } else {
+            device_info.device_protocol
+        };
+
+        Ok(Some(UsbClassInfo {
+            class,
+            subclass,
+            protocol,
+            interface_protocol_number: if_info.interface_protocol_number,
+            device_protocol_number: device_info.device_protocol_number,
+        }))
+    } else {
+        Ok(None)
+    }
+}
+
+async fn pick_driver(
+    device: &UsbDeviceAccess,
+) -> Result<Option<Arc<dyn UsbDriver + 'static>>, UsbError> {
+    let Some(class) = extract_class_info(device).await? else {
+        return Ok(None);
     };
-    let drivers = USB_INTERFACE_DRIVERS.read();
-    for driver in drivers.iter() {
-        if driver.probe(device, interface, class) {
-            let driver = driver.clone();
-            let device = device.clone();
-            let interface = interface.clone();
-            runtime::spawn(async move {
-                let name = driver.name();
-                match driver.run(device, interface).await {
-                    e @ Err(UsbError::DeviceDisconnected) => {
-                        log::warn!("{address} did not exit cleanly: device disconnected ({name})");
-                        e
-                    }
-                    e => e,
+
+    for driver in USB_DEVICE_DRIVERS.read().iter() {
+        if driver.probe(&class, device) {
+            return Ok(Some(driver.clone()));
+        }
+    }
+    Ok(None)
+}
+
+pub async fn spawn_driver(device: Arc<UsbDeviceAccess>) -> Result<(), UsbError> {
+    if let Some(driver) = pick_driver(&device).await? {
+        runtime::spawn(async move {
+            let name = driver.name();
+            match driver.run(device).await {
+                e @ Err(UsbError::DeviceDisconnected) => {
+                    log::warn!(
+                        "Driver {:?} did not exit cleanly: device disconnected",
+                        name,
+                    );
+
+                    e
                 }
-            })
-            .map_err(UsbError::SystemError)?;
-            break;
-        }
+                e => e,
+            }
+        })
+        .map_err(UsbError::SystemError)?;
     }
     Ok(())
 }
 
-pub async fn setup_device(device: Arc<UsbDeviceAccess>) -> Result<(), UsbError> {
-    // If device has only one configuration available, use it
-    // TODO support devices with multiple configurations
-    let address = device.bus_address();
-    log::info!("Setup USB device @ {address}");
-
-    let Some(config_info) = device.use_default_configuration().await? else {
-        log::warn!("{address} has multiple configurations, not supported yet",);
-        return Ok(());
-    };
-
-    // Setup drivers for interfaces
-    log::info!("{address}: {config_info:#?}");
-
-    // TODO device-level drivers
-    for interface in config_info.interfaces.iter() {
-        let address = address.with_interface(interface.number);
-        if let Err(error) = setup_interface(&device, address, interface).await {
-            log::error!("{}: {:?}", address, error);
-        }
-    }
-
-    Ok(())
-}
-
-pub fn register_driver(driver: Arc<dyn UsbInterfaceDriver + 'static>) {
+pub fn register_driver(driver: Arc<dyn UsbDriver + 'static>) {
     // TODO check for duplicates
-    USB_INTERFACE_DRIVERS.write().push(driver);
+    USB_DEVICE_DRIVERS.write().push(driver);
 }
 
 pub fn register_default_class_drivers() {
     register_driver(Arc::new(hid_keyboard::UsbHidKeyboardDriver));
-    register_driver(Arc::new(hid_mouse::UsbHidMouseDriver));
-    // register_driver(Arc::new(mass_storage::UsbMassStorageDriverBulkOnly));
+    register_driver(Arc::new(mass_storage::UsbMassStorageDriverBulkOnly));
 }
 
-static USB_INTERFACE_DRIVERS: IrqSafeRwLock<Vec<Arc<dyn UsbInterfaceDriver + 'static>>> =
+static USB_DEVICE_DRIVERS: IrqSafeRwLock<Vec<Arc<dyn UsbDriver + 'static>>> =
     IrqSafeRwLock::new(Vec::new());

kernel/driver/bus/usb/src/descriptor.rs

@@ -1,7 +1,10 @@
 use bytemuck::{Pod, Zeroable};
 
 use crate::{
-    communication::UsbDirection, device::UsbSpeed, error::UsbError, info::UsbEndpointType,
+    communication::UsbDirection,
+    device::UsbSpeed,
+    error::UsbError,
+    info::{UsbDeviceClass, UsbDeviceProtocol, UsbEndpointType, UsbVersion},
 };
 
 #[derive(Clone, Copy, Debug, Default, Pod, Zeroable)]
@@ -88,15 +91,15 @@ pub struct UsbOtherSpeedConfiguration {
     pub max_power: u8,
 }
 
-// impl UsbInterfaceDescriptor {
-//     pub fn class(&self) -> UsbDeviceClass {
-//         UsbDeviceClass::try_from(self.interface_class).unwrap_or(UsbDeviceClass::Unknown)
-//     }
-//
-//     pub fn protocol(&self) -> UsbDeviceProtocol {
-//         UsbDeviceProtocol::try_from(self.interface_protocol).unwrap_or(UsbDeviceProtocol::Unknown)
-//     }
-// }
+impl UsbInterfaceDescriptor {
+    pub fn class(&self) -> UsbDeviceClass {
+        UsbDeviceClass::try_from(self.interface_class).unwrap_or(UsbDeviceClass::Unknown)
+    }
+
+    pub fn protocol(&self) -> UsbDeviceProtocol {
+        UsbDeviceProtocol::try_from(self.interface_protocol).unwrap_or(UsbDeviceProtocol::Unknown)
+    }
+}
 
 impl UsbEndpointDescriptor {
     pub fn direction(&self) -> UsbDirection {
@@ -124,16 +127,16 @@ impl UsbEndpointDescriptor {
 }
 
 impl UsbDeviceDescriptor {
-    // pub fn class(&self) -> UsbDeviceClass {
-    //     UsbDeviceClass::try_from(self.device_class).unwrap_or(UsbDeviceClass::Unknown)
-    // }
+    pub fn class(&self) -> UsbDeviceClass {
+        UsbDeviceClass::try_from(self.device_class).unwrap_or(UsbDeviceClass::Unknown)
+    }
 
-    // pub fn protocol(&self) -> UsbDeviceProtocol {
-    //     UsbDeviceProtocol::try_from(self.device_protocol).unwrap_or(UsbDeviceProtocol::Unknown)
-    // }
+    pub fn protocol(&self) -> UsbDeviceProtocol {
+        UsbDeviceProtocol::try_from(self.device_protocol).unwrap_or(UsbDeviceProtocol::Unknown)
+    }
 
-    pub fn max_packet_size(&self, version: u16, speed: UsbSpeed) -> Result<usize, UsbError> {
-        match (is_version_3(version), speed, self.max_packet_size_0) {
+    pub fn max_packet_size(&self, version: UsbVersion, speed: UsbSpeed) -> Result<usize, UsbError> {
+        match (version.is_version_3(), speed, self.max_packet_size_0) {
             (true, UsbSpeed::Super, 9) => Ok(1 << 9),
             (true, _, _) => todo!("Non-GenX speed USB3+ maxpacketsize0"),
             (false, _, 8) => Ok(8),
@@ -144,7 +147,3 @@ impl UsbDeviceDescriptor {
         }
     }
 }
-
-pub fn is_version_3(version: u16) -> bool {
-    version & 0xFF00 == 0x300
-}

kernel/driver/bus/usb/src/device.rs

@@ -1,15 +1,14 @@
-use core::ops::Deref;
+use core::{fmt, ops::Deref};
 
 use alloc::{boxed::Box, sync::Arc, vec::Vec};
 use async_trait::async_trait;
-use libk_util::{sync::spin_rwlock::IrqSafeRwLock, OneTimeInit};
+use libk_util::sync::spin_rwlock::{IrqSafeRwLock, IrqSafeRwLockReadGuard};
 
 use crate::{
-    address::UsbBusAddress,
-    bus::UsbBusWrapper,
     error::UsbError,
     info::{
         UsbConfigurationInfo, UsbDeviceInfo, UsbEndpointInfo, UsbEndpointType, UsbInterfaceInfo,
+        UsbVersion,
     },
     pipe::{
         control::{ConfigurationDescriptorEntry, UsbControlPipeAccess},
@@ -18,26 +17,21 @@ use crate::{
             UsbNormalPipeOut,
         },
     },
-    sysfs::UsbDeviceKObject,
     UsbHostController,
 };
 
 // High-level structures for info provided through descriptors
 
-// #[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Debug)]
-// pub struct UsbBusAddress {
-//     pub bus: u16,
-//     pub device: u8,
-// }
+#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Debug)]
+pub struct UsbBusAddress {
+    pub bus: u16,
+    pub device: u8,
+}
 
 pub struct UsbDeviceAccess {
     pub device: Arc<dyn UsbDevice>,
-    pub bus: Arc<UsbBusWrapper>,
     pub info: UsbDeviceInfo,
-    pub configurations: Vec<UsbConfigurationInfo>,
-    current_configuration: IrqSafeRwLock<Option<usize>>,
-
-    pub(crate) kobject: OneTimeInit<UsbDeviceKObject>,
+    pub current_configuration: IrqSafeRwLock<Option<UsbConfigurationInfo>>,
 }
 
 #[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Debug)]
@@ -75,7 +69,7 @@ pub trait UsbDevice: Send + Sync {
     fn port_number(&self) -> u8;
     fn bus_address(&self) -> UsbBusAddress;
     fn speed(&self) -> UsbSpeed;
-    fn host_controller(&self) -> Arc<dyn UsbHostController>;
+    fn controller_ref(&self) -> &dyn UsbHostController;
 
     fn set_detach_handler(&self, handler: Arc<dyn UsbDeviceDetachHandler>);
     fn handle_detach(&self);
@@ -90,43 +84,47 @@ impl UsbDeviceAccess {
     /// * Device is not yet configured
     /// * Control pipe for the device has been properly set up
     /// * Device has been assigned a bus address
-    pub async fn setup(bus: Arc<UsbBusWrapper>, raw: Arc<dyn UsbDevice>) -> Result<Self, UsbError> {
+    pub async fn setup(raw: Arc<dyn UsbDevice>) -> Result<Self, UsbError> {
         let control = raw.control_pipe();
 
         let device_desc = control.query_device_descriptor().await?;
 
+        let bcd_usb = device_desc.bcd_usb;
+        let usb_version = UsbVersion::from_bcd_usb(device_desc.bcd_usb)
+            .ok_or(UsbError::InvalidDescriptorField)
+            .inspect_err(|_| {
+                log::error!(
+                    "{}: unsupported/invalid USB version: {:#x}",
+                    raw.bus_address(),
+                    bcd_usb
+                )
+            })?;
+
         let manufacturer = control.query_string(device_desc.manufacturer_str).await?;
         let product = control.query_string(device_desc.product_str).await?;
 
-        // Query device
         let info = UsbDeviceInfo {
             manufacturer,
             product,
-            usb_version: device_desc.bcd_usb,
+            usb_version,
 
             id_vendor: device_desc.id_vendor,
             id_product: device_desc.id_product,
 
-            device_class: device_desc.device_class,
+            device_class: device_desc.class(),
             device_subclass: device_desc.device_subclass,
-            device_protocol: device_desc.device_protocol,
+            device_protocol: device_desc.protocol(),
+            device_protocol_number: device_desc.device_protocol,
 
             num_configurations: device_desc.num_configurations,
 
-            max_packet_size: device_desc.max_packet_size(device_desc.bcd_usb, raw.speed())?,
+            max_packet_size: device_desc.max_packet_size(usb_version, raw.speed())?,
         };
 
-        let configurations =
-            Self::query_configurations(control, device_desc.num_configurations).await?;
-
         Ok(Self {
             device: raw,
-            bus,
             info,
             current_configuration: IrqSafeRwLock::new(None),
-            configurations,
-
-            kobject: OneTimeInit::new(),
         })
     }
 
@@ -166,54 +164,45 @@ impl UsbDeviceAccess {
         Ok(UsbBulkOutPipeAccess(pipe))
     }
 
-    pub fn current_configuration(&self) -> Option<&UsbConfigurationInfo> {
-        let index = (*self.current_configuration.read())?;
-        Some(&self.configurations[index])
-    }
-
-    pub async fn use_default_configuration(
+    pub fn read_current_configuration(
         &self,
+    ) -> IrqSafeRwLockReadGuard<'_, Option<UsbConfigurationInfo>> {
+        self.current_configuration.read()
+    }
+
+    pub async fn select_configuration<F: Fn(&UsbConfigurationInfo) -> bool>(
+        &self,
+        predicate: F,
     ) -> Result<Option<UsbConfigurationInfo>, UsbError> {
-        if self.configurations.len() != 1 {
-            return Ok(None);
-        }
-
-        self.set_configuration(0).await.map(Some)
-    }
-
-    pub async fn set_configuration(&self, index: usize) -> Result<UsbConfigurationInfo, UsbError> {
-        if index >= self.configurations.len() {
-            return Err(UsbError::InvalidConfiguration);
-        }
-
-        let mut current = self.current_configuration.write();
+        let mut current_config = self.current_configuration.write();
         let control_pipe = self.control_pipe();
-        let info = self.configurations[index].clone();
 
-        control_pipe
-            .set_configuration(info.config_value as _)
-            .await?;
-        *current = Some(index);
+        for i in 0..self.info.num_configurations {
+            let info = self.query_configuration_info(i).await?;
 
-        Ok(info)
-    }
+            if predicate(&info) {
+                log::debug!("Selected configuration: {:#?}", info);
+                let config = current_config.insert(info);
 
-    async fn query_configurations(
-        control_pipe: &UsbControlPipeAccess,
-        num_configurations: u8,
-    ) -> Result<Vec<UsbConfigurationInfo>, UsbError> {
-        let mut configurations = Vec::new();
-        for i in 0..num_configurations {
-            let configuration = Self::query_configuration(control_pipe, i).await?;
-            configurations.push(configuration);
+                control_pipe
+                    .set_configuration(config.config_value as _)
+                    .await?;
+
+                return Ok(Some(config.clone()));
+            }
         }
-        Ok(configurations)
+
+        Ok(None)
     }
 
-    async fn query_configuration(
-        control_pipe: &UsbControlPipeAccess,
+    pub async fn query_configuration_info(
+        &self,
         index: u8,
     ) -> Result<UsbConfigurationInfo, UsbError> {
+        if index >= self.info.num_configurations {
+            return Err(UsbError::InvalidConfiguration);
+        }
+        let control_pipe = self.control_pipe();
         let query = control_pipe.query_configuration_descriptor(index).await?;
 
         let configuration_name = control_pipe
@@ -239,9 +228,10 @@ impl UsbDeviceAccess {
                         name,
                         number: iface.interface_number,
 
-                        interface_class: iface.interface_class,
+                        interface_class: iface.class(),
                         interface_subclass: iface.interface_subclass,
-                        interface_protocol: iface.interface_protocol,
+                        interface_protocol: iface.protocol(),
+                        interface_protocol_number: iface.interface_protocol,
                     });
                 }
                 _ => (),
@@ -258,13 +248,6 @@ impl UsbDeviceAccess {
         Ok(info)
     }
 
-    // pub async fn query_configuration_info(
-    //     &self,
-    //     index: u8,
-    // ) -> Result<UsbConfigurationInfo, UsbError> {
-    //     let control_pipe = self.control_pipe();
-    // }
-
     pub fn set_detach_handler(&self, handler: Arc<dyn UsbDeviceDetachHandler>) {
         self.device.set_detach_handler(handler);
     }
@@ -277,3 +260,9 @@ impl Deref for UsbDeviceAccess {
         &*self.device
     }
 }
+
+impl fmt::Display for UsbBusAddress {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        write!(f, "{}:{}", self.bus, self.device)
+    }
+}

kernel/driver/bus/usb/src/info.rs

@@ -1,4 +1,7 @@
+use core::fmt;
+
 use alloc::{string::String, vec::Vec};
+use yggdrasil_abi::primitive_enum;
 
 use crate::communication::UsbDirection;
 
@@ -26,18 +29,41 @@ pub enum UsbUsageType {
     Reserved,
 }
 
-pub const CLASS_FROM_INTERFACE: u8 = 0x00;
-pub const CLASS_HID: u8 = 0x03;
-pub const CLASS_MASS_STORAGE: u8 = 0x08;
+#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Debug)]
+pub enum UsbVersion {
+    Usb11,
+    Usb20,
+    Usb21,
+    Usb30,
+    Usb31,
+    Usb32,
+}
+
+primitive_enum! {
+    pub enum UsbDeviceClass: u8 {
+        FromInterface = 0x00,
+        Hid = 0x03,
+        MassStorage = 0x08,
+        Unknown = 0xFF,
+    }
+}
+
+primitive_enum! {
+    pub enum UsbDeviceProtocol: u8 {
+        FromInterface = 0x00,
+        Unknown = 0xFF,
+    }
+}
 
 #[derive(Debug, Clone)]
 pub struct UsbInterfaceInfo {
     pub name: String,
     pub number: u8,
 
-    pub interface_class: u8,
+    pub interface_class: UsbDeviceClass,
     pub interface_subclass: u8,
-    pub interface_protocol: u8,
+    pub interface_protocol: UsbDeviceProtocol,
+    pub interface_protocol_number: u8,
 }
 
 #[derive(Debug, Clone)]
@@ -61,14 +87,15 @@ pub struct UsbDeviceInfo {
     pub manufacturer: String,
     pub product: String,
 
-    pub usb_version: u16,
+    pub usb_version: UsbVersion,
 
     pub id_vendor: u16,
     pub id_product: u16,
 
-    pub device_class: u8,
+    pub device_class: UsbDeviceClass,
     pub device_subclass: u8,
-    pub device_protocol: u8,
+    pub device_protocol: UsbDeviceProtocol,
+    pub device_protocol_number: u8,
 
     /// Max packet size for endpoint zero
     pub max_packet_size: usize,
@@ -76,6 +103,38 @@ pub struct UsbDeviceInfo {
     pub num_configurations: u8,
 }
 
+impl UsbVersion {
+    pub fn is_version_3(&self) -> bool {
+        matches!(self, Self::Usb30 | Self::Usb31 | Self::Usb32)
+    }
+
+    pub fn from_bcd_usb(value: u16) -> Option<Self> {
+        match value {
+            0x110 => Some(UsbVersion::Usb11),
+            0x200..=0x20F => Some(UsbVersion::Usb20),
+            0x210..=0x21F => Some(UsbVersion::Usb21),
+            0x300 => Some(UsbVersion::Usb30),
+            0x310 => Some(UsbVersion::Usb31),
+            0x320 => Some(UsbVersion::Usb32),
+            _ => None,
+        }
+    }
+}
+
+impl fmt::Display for UsbVersion {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let string = match self {
+            Self::Usb11 => "USB1.1",
+            Self::Usb20 => "USB2.0",
+            Self::Usb21 => "USB2.1",
+            Self::Usb30 => "USB3.0",
+            Self::Usb31 => "USB3.1",
+            Self::Usb32 => "USB3.2",
+        };
+        f.write_str(string)
+    }
+}
+
 impl UsbEndpointInfo {
     pub fn is(&self, ty: UsbEndpointType, dir: UsbDirection) -> bool {
         self.ty == ty && self.direction == dir

kernel/driver/bus/usb/src/interface.rs

@@ -1 +0,0 @@
-pub struct UsbInterface {}

kernel/driver/bus/usb/src/lib.rs

@@ -8,20 +8,15 @@
     maybe_uninit_fill
 )]
 
-use crate::sysfs::UsbBusKObject;
-
 extern crate alloc;
 
-pub mod address;
 pub mod bus;
 pub mod communication;
 pub mod descriptor;
 pub mod device;
 pub mod error;
 pub mod info;
-pub mod interface;
 pub mod pipe;
-pub mod sysfs;
 pub mod util;
 
 pub mod class_driver;
@@ -30,8 +25,4 @@ pub mod class_driver;
 
 pub trait UsbEndpoint: Sync {}
 
-pub trait UsbHostController: Sync + Send {
-    fn register_sysfs_properties(&self, kobject: &UsbBusKObject) {
-        let _ = kobject;
-    }
-}
+pub trait UsbHostController: Sync + Send {}

kernel/driver/bus/usb/src/pipe/control.rs

@@ -37,7 +37,6 @@ pub trait UsbDeviceRequest: Sized + Pod {
 pub trait UsbClassSpecificRequest: Sized + Pod {
     const BM_REQUEST_TYPE: u8;
     const B_REQUEST: u8;
-    const W_VALUE: u16 = 0;
 }
 
 pub trait UsbDescriptorRequest: UsbDeviceRequest {

kernel/driver/bus/usb/src/sysfs.rs

@@ -1,129 +0,0 @@
-use alloc::{format, sync::Arc};
-use libk::{
-    error::Error,
-    fs::sysfs::{
-        self,
-        attribute::{IntegerAttribute, IntegerAttributeFormat, IntegerAttributeOps},
-        object::KObject,
-    },
-};
-use libk_util::OneTimeInit;
-
-use crate::{bus::UsbBusWrapper, device::UsbDeviceAccess};
-
-pub type UsbBusKObject = Arc<KObject<Arc<UsbBusWrapper>>>;
-pub type UsbDeviceKObject = Arc<KObject<Arc<UsbDeviceAccess>>>;
-
-pub(crate) fn register_bus_kobject(bus: &Arc<UsbBusWrapper>) -> UsbBusKObject {
-    let root = sysfs_usb_root();
-    let bus_kobject = KObject::new(bus.clone());
-    bus.hc.register_sysfs_properties(&bus_kobject);
-    root.add_object(format!("{}", bus.index), bus_kobject.clone())
-        .ok();
-    bus_kobject
-}
-
-pub(crate) fn register_device_kobject(device: &Arc<UsbDeviceAccess>) -> UsbDeviceKObject {
-    struct Class;
-    struct Subclass;
-    struct Protocol;
-    struct Version;
-    struct IdVendor;
-    struct IdProduct;
-
-    impl IntegerAttributeOps<u8> for Class {
-        type Data = Arc<UsbDeviceAccess>;
-        const NAME: &'static str = "class";
-        const FORMAT: IntegerAttributeFormat = IntegerAttributeFormat::Hex;
-
-        fn read(state: &Self::Data) -> Result<u8, Error> {
-            Ok(state.info.device_class)
-        }
-    }
-    impl IntegerAttributeOps<u8> for Subclass {
-        type Data = Arc<UsbDeviceAccess>;
-        const NAME: &'static str = "subclass";
-        const FORMAT: IntegerAttributeFormat = IntegerAttributeFormat::Hex;
-
-        fn read(state: &Self::Data) -> Result<u8, Error> {
-            Ok(state.info.device_subclass)
-        }
-    }
-    impl IntegerAttributeOps<u8> for Protocol {
-        type Data = Arc<UsbDeviceAccess>;
-        const NAME: &'static str = "protocol";
-        const FORMAT: IntegerAttributeFormat = IntegerAttributeFormat::Hex;
-
-        fn read(state: &Self::Data) -> Result<u8, Error> {
-            Ok(state.info.device_protocol)
-        }
-    }
-    impl IntegerAttributeOps<u16> for Version {
-        type Data = Arc<UsbDeviceAccess>;
-        const NAME: &'static str = "version";
-        const FORMAT: IntegerAttributeFormat = IntegerAttributeFormat::Hex;
-
-        fn read(state: &Self::Data) -> Result<u16, Error> {
-            Ok(state.info.usb_version)
-        }
-    }
-    impl IntegerAttributeOps<u16> for IdVendor {
-        type Data = Arc<UsbDeviceAccess>;
-        const NAME: &'static str = "vendor";
-        const FORMAT: IntegerAttributeFormat = IntegerAttributeFormat::Hex;
-
-        fn read(state: &Self::Data) -> Result<u16, Error> {
-            Ok(state.info.id_vendor)
-        }
-    }
-    impl IntegerAttributeOps<u16> for IdProduct {
-        type Data = Arc<UsbDeviceAccess>;
-        const NAME: &'static str = "product";
-        const FORMAT: IntegerAttributeFormat = IntegerAttributeFormat::Hex;
-
-        fn read(state: &Self::Data) -> Result<u16, Error> {
-            Ok(state.info.id_product)
-        }
-    }
-
-    let bus_kobject = device.bus.kobject();
-    let device_kobject = KObject::new(device.clone());
-
-    device_kobject
-        .add_attribute(IntegerAttribute::from(Class))
-        .ok();
-    device_kobject
-        .add_attribute(IntegerAttribute::from(Subclass))
-        .ok();
-    device_kobject
-        .add_attribute(IntegerAttribute::from(Protocol))
-        .ok();
-    device_kobject
-        .add_attribute(IntegerAttribute::from(Version))
-        .ok();
-    device_kobject
-        .add_attribute(IntegerAttribute::from(IdVendor))
-        .ok();
-    device_kobject
-        .add_attribute(IntegerAttribute::from(IdProduct))
-        .ok();
-
-    let address = device.bus_address();
-
-    bus_kobject
-        .add_object(format!("{}", address.device), device_kobject.clone())
-        .ok();
-
-    device_kobject
-}
-
-fn sysfs_usb_root() -> &'static Arc<KObject<()>> {
-    static USB_ROOT: OneTimeInit<Arc<KObject<()>>> = OneTimeInit::new();
-
-    USB_ROOT.or_init_with(|| {
-        let bus_object = sysfs::bus().expect("bus object");
-        let usb_object = KObject::new(());
-        bus_object.add_object("usb", usb_object.clone()).ok();
-        usb_object
-    })
-}

kernel/driver/fs/ext2/src/lib.rs

@@ -1,6 +1,6 @@
-#![feature(if_let_guard, async_drop, impl_trait_in_assoc_type)]
+#![feature(if_let_guard, impl_trait_in_assoc_type)]
 #![cfg_attr(not(test), no_std)]
-#![allow(clippy::new_ret_no_self, incomplete_features)]
+#![allow(clippy::new_ret_no_self)]
 
 extern crate alloc;
 

kernel/driver/fs/fat32/src/data.rs

@@ -160,8 +160,7 @@ impl Fat32FsInfo {
         let signature0 = &self.bytes[0..4];
         let signature1 = &self.bytes[484..488];
 
-        signature0 == &Self::SIGNATURE0.to_le_bytes()
-            && signature1 == &Self::SIGNATURE1.to_le_bytes()
+        signature0 == Self::SIGNATURE0.to_le_bytes() && signature1 == Self::SIGNATURE1.to_le_bytes()
     }
 }
 

kernel/driver/fs/fat32/src/directory.rs

@@ -303,7 +303,7 @@ impl CommonImpl for DirectoryNode {
     }
 
     fn metadata(&self, _node: &NodeRef) -> Result<Metadata, Error> {
-        Ok(self.metadata.clone())
+        Ok(self.metadata)
     }
 
     fn set_metadata(&self, _node: &NodeRef, _metadata: &Metadata) -> Result<(), Error> {
@@ -357,7 +357,7 @@ impl DirectoryImpl for DirectoryNode {
     }
 
     fn len(&self, _node: &NodeRef) -> Result<usize, Error> {
-        Ok((self.size_bytes.unwrap_or(0) as u32 / DIRENT_SIZE as u32) as usize)
+        Ok((self.size_bytes.unwrap_or(0) / DIRENT_SIZE as u32) as usize)
     }
 }
 

kernel/driver/fs/fat32/src/lib.rs

@@ -54,6 +54,7 @@ impl Fat32Fs {
     ) -> Result<NodeRef, Error> {
         let mut cached = true;
         for option in options {
+            #[allow(clippy::single_match)]
             match option {
                 FilesystemMountOption::Sync => cached = false,
                 _ => (),

kernel/driver/fs/memfs/src/tar.rs

@@ -16,7 +16,7 @@ pub(crate) struct TarIterator<'a> {
     zero_blocks: usize,
 }
 
-#[repr(packed)]
+#[repr(C, packed)]
 pub(crate) struct TarEntry {
     pub name: TarString<100>,
     pub mode: OctalField<8>,

kernel/driver/input/src/lib.rs

@@ -9,20 +9,14 @@ use async_trait::async_trait;
 use device_api::device::Device;
 use libk::{device::char::CharDevice, vfs::FileReadiness};
 use libk_util::{ring::LossyRingQueue, OneTimeInit};
-use yggdrasil_abi::{
-    abi_serde::wire,
-    error::Error,
-    io::{KeyboardKeyEvent, MouseEvent},
-};
+use yggdrasil_abi::{error::Error, io::KeyboardKeyEvent};
 
 #[derive(Clone, Copy)]
 pub struct KeyboardDevice;
-#[derive(Clone, Copy)]
-pub struct MouseDevice;
 
 impl FileReadiness for KeyboardDevice {
     fn poll_read(&self, cx: &mut Context<'_>) -> Poll<Result<(), Error>> {
-        KEYBOARD_INPUT_QUEUE.poll_readable(cx).map(Ok)
+        INPUT_QUEUE.poll_readable(cx).map(Ok)
     }
 }
 
@@ -39,7 +33,7 @@ impl CharDevice for KeyboardDevice {
             return Ok(0);
         }
 
-        let ev = KEYBOARD_INPUT_QUEUE.read().await;
+        let ev = INPUT_QUEUE.read().await;
 
         buf[..4].copy_from_slice(&ev.as_bytes());
 
@@ -51,7 +45,7 @@ impl CharDevice for KeyboardDevice {
             return Ok(0);
         }
 
-        let ev = KEYBOARD_INPUT_QUEUE.try_read().ok_or(Error::WouldBlock)?;
+        let ev = INPUT_QUEUE.try_read().ok_or(Error::WouldBlock)?;
 
         buf[..4].copy_from_slice(&ev.as_bytes());
 
@@ -74,68 +68,15 @@ impl CharDevice for KeyboardDevice {
     }
 }
 
-impl FileReadiness for MouseDevice {
-    fn poll_read(&self, cx: &mut Context<'_>) -> Poll<Result<(), Error>> {
-        MOUSE_INPUT_QUEUE.poll_readable(cx).map(Ok)
-    }
-}
-
-impl Device for MouseDevice {
-    fn display_name(&self) -> &str {
-        "Mouse input pseudo-device"
-    }
-}
-
-#[async_trait]
-impl CharDevice for MouseDevice {
-    async fn read(&self, buf: &mut [u8]) -> Result<usize, Error> {
-        let ev = MOUSE_INPUT_QUEUE.read().await;
-        let len = wire::to_slice(&ev, buf)?;
-        Ok(len)
-    }
-
-    fn read_nonblocking(&self, buf: &mut [u8]) -> Result<usize, Error> {
-        let ev = MOUSE_INPUT_QUEUE.try_read().ok_or(Error::WouldBlock)?;
-        let len = wire::to_slice(&ev, buf)?;
-        Ok(len)
-    }
-
-    fn is_writeable(&self) -> bool {
-        false
-    }
-
-    fn device_request(&self, option: u32, buffer: &mut [u8], len: usize) -> Result<usize, Error> {
-        let _ = option;
-        let _ = buffer;
-        let _ = len;
-        Err(Error::InvalidOperation)
-    }
-
-    fn is_terminal(&self) -> bool {
-        false
-    }
-}
-
-static KEYBOARD_INPUT_QUEUE: LossyRingQueue<KeyboardKeyEvent> = LossyRingQueue::with_capacity(32);
+static INPUT_QUEUE: LossyRingQueue<KeyboardKeyEvent> = LossyRingQueue::with_capacity(32);
 static KEYBOARD_DEVICE: OneTimeInit<Arc<KeyboardDevice>> = OneTimeInit::new();
 
-static MOUSE_INPUT_QUEUE: LossyRingQueue<MouseEvent> = LossyRingQueue::with_capacity(32);
-static MOUSE_DEVICE: OneTimeInit<Arc<MouseDevice>> = OneTimeInit::new();
-
-pub fn setup_keyboard() -> Arc<KeyboardDevice> {
+pub fn setup() -> Arc<KeyboardDevice> {
     KEYBOARD_DEVICE
         .or_init_with(|| Arc::new(KeyboardDevice))
         .clone()
 }
 
-pub fn setup_mouse() -> Arc<MouseDevice> {
-    MOUSE_DEVICE.or_init_with(|| Arc::new(MouseDevice)).clone()
-}
-
-pub fn send_keyboard_event(ev: KeyboardKeyEvent) {
-    KEYBOARD_INPUT_QUEUE.write(ev);
-}
-
-pub fn send_mouse_event(ev: MouseEvent) {
-    MOUSE_INPUT_QUEUE.write(ev);
+pub fn send_event(ev: KeyboardKeyEvent) {
+    INPUT_QUEUE.write(ev);
 }

kernel/driver/net/core/src/interface.rs

@@ -127,7 +127,7 @@ pub fn register_interface(
         NetworkInterfaceType::Ethernet => {
             static LAST_ETHERNET_ID: AtomicUsize = AtomicUsize::new(0);
             let eth_id = LAST_ETHERNET_ID.fetch_add(1, Ordering::SeqCst);
-            format!("eth{}", eth_id).into_boxed_str()
+            format!("eth{eth_id}").into_boxed_str()
         }
         NetworkInterfaceType::Loopback => "lo".into(),
     };

kernel/driver/net/core/src/l3/mod.rs

@@ -133,7 +133,7 @@ impl Route {
 
     pub fn insert(route: Self) -> Result<(), Error> {
         // TODO check for conflicts
-        log::debug!("Add route: {}", route);
+        log::debug!("Add route: {route}");
         ROUTES.write().push(route);
         Ok(())
     }
@@ -143,7 +143,7 @@ impl fmt::Display for Route {
     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         write!(f, "{} ", self.subnet)?;
         if let Some(gw) = self.gateway {
-            write!(f, " via {}", gw)?;
+            write!(f, " via {gw}")?;
         }
         Ok(())
     }

kernel/driver/net/core/src/socket/config.rs

@@ -262,7 +262,7 @@ fn describe_route(route: &Route) -> RouteInfo {
         interface_name: interface.name.clone(),
         interface_id: route.interface,
         subnet: route.subnet,
-        gateway: route.gateway.map(Into::into),
+        gateway: route.gateway,
     }
 }
 

kernel/driver/net/core/src/socket/local/packet.rs

@@ -110,9 +110,9 @@ impl LocalPacketSocket {
     ///
     /// 1. If this socket is bound to a name, the name will be used
     /// 2. Otherwise:
-    ///      2.1. If `remote` is "known" by this socket, the address in the table will be used
-    ///      2.2. Otherwise, this socket is "paired" with the remote by generating a new anonymous
-    ///        address unique to that socket
+    ///    2.1. If `remote` is "known" by this socket, the address in the table will be used
+    ///    2.2. Otherwise, this socket is "paired" with the remote by generating a new anonymous
+    ///    address unique to that socket
     fn get_send_info(
         self: &Arc<Self>,
         remote: &OwnedAddress,

kernel/driver/net/core/src/socket/raw.rs

@@ -81,7 +81,7 @@ impl RawSocket {
             };
 
             for id in ids {
-                if except.map_or(false, |i| i == *id) {
+                if except == Some(*id) {
                     continue;
                 }
 
@@ -210,7 +210,7 @@ impl Socket for RawSocket {
         if message.payload.len() > 1024 {
             return Err(Error::InvalidArgument);
         }
-        let mut builder = TxPacketBuilder::new(&*interface, message.payload.len())?;
+        let mut builder = TxPacketBuilder::new(&interface, message.payload.len())?;
         builder.push_bytes(message.payload)?;
         // false to prevent loopback
         builder.transmit(Some(self.id))?;

kernel/driver/net/rtl81xx/src/rtl8139.rs

@@ -320,14 +320,14 @@ impl InterruptHandler for Rtl8139 {
                 let rx_len_1 = unsafe { rx.buffer[rx_pos + 3].assume_init() };
                 let rx_len = u16::from_le_bytes([rx_len_0, rx_len_1]) as usize;
 
-                if rx_len >= 16 {
-                    if let Ok(mut packet_buf) = DmaBuffer::new_uninit_slice(&*self.dma, rx_len) {
-                        packet_buf.copy_from_slice(&rx.buffer[rx_pos + 4..rx_pos + rx_len + 4]);
-                        let packet_buf = unsafe { DmaBuffer::assume_init_slice(packet_buf) };
-                        // let packet_buf = unsafe { packet_buf.assume_init_slice() };
-                        let packet = RxPacket::new(packet_buf, 0, nic);
-                        ygg_driver_net_core::receive_packet(packet).ok();
-                    }
+                if rx_len >= 16
+                    && let Ok(mut packet_buf) = DmaBuffer::new_uninit_slice(&*self.dma, rx_len)
+                {
+                    packet_buf.copy_from_slice(&rx.buffer[rx_pos + 4..rx_pos + rx_len + 4]);
+                    let packet_buf = unsafe { DmaBuffer::assume_init_slice(packet_buf) };
+                    // let packet_buf = unsafe { packet_buf.assume_init_slice() };
+                    let packet = RxPacket::new(packet_buf, 0, nic);
+                    ygg_driver_net_core::receive_packet(packet).ok();
                 }
 
                 // rx_len + 4, aligned to 4 bytes

kernel/driver/net/stmmac/src/ring.rs

@@ -197,7 +197,7 @@ impl RxRing {
             let index = self.rd % self.entries.len();
             let entry = &mut self.entries[index];
 
-            if let Some(_) = entry.rx_completed() {
+            if entry.rx_completed().is_some() {
                 // Grab the current buffer (the one just written to by the DMA), replace it
                 // with the newly allocated one, and mark the descriptor as DMA-owned again
                 let new_buffer = DmaBuffer::new_uninit_slice(dma, 4096)?;

kernel/driver/usb/xhci/src/controller.rs

@@ -25,11 +25,10 @@ use tock_registers::{
 };
 use ygg_driver_pci::{device::PciDeviceInfo, PciConfigurationSpace};
 use ygg_driver_usb::{
-    address::UsbBusAddress,
-    bus::{UsbBusManager, UsbBusWrapper},
-    descriptor,
-    device::{UsbDeviceAccess, UsbSpeed},
+    bus::UsbBusManager,
+    device::{UsbBusAddress, UsbDeviceAccess, UsbSpeed},
     error::UsbError,
+    info::UsbVersion,
     pipe::control::UsbControlPipeAccess,
     UsbHostController,
 };
@@ -68,7 +67,7 @@ struct ScratchpadArray {
 }
 
 struct RootHubPort {
-    version: u16,
+    version: UsbVersion,
     slot_type: u8,
 }
 
@@ -91,7 +90,6 @@ pub struct Xhci {
     pub(crate) slots: Vec<IrqSafeRwLock<Option<Arc<XhciBusDevice>>>>,
     pub(crate) port_slot_map: Vec<AtomicU8>,
     bus_index: OneTimeInit<u16>,
-    bus: OneTimeInit<Arc<UsbBusWrapper>>,
     port_event_map: EventBitmap,
 }
 
@@ -148,7 +146,9 @@ impl Xhci {
         for cap in regs.extended_capabilities.iter() {
             match cap {
                 ExtendedCapability::ProtocolSupport(support) => {
-                    let version = support.usb_revision();
+                    let Some(version) = support.usb_revision() else {
+                        continue;
+                    };
 
                     for port in support.port_range() {
                         log::info!("* Port {port}: {version}");
@@ -195,7 +195,6 @@ impl Xhci {
 
             root_hub_ports,
             bus_index: OneTimeInit::new(),
-            bus: OneTimeInit::new(),
             endpoints: IrqSafeRwLock::new(BTreeMap::new()),
             slots,
             port_slot_map,
@@ -283,7 +282,7 @@ impl Xhci {
             .as_ref()
             .ok_or(UsbError::PortInitFailed)?;
 
-        let need_reset = !descriptor::is_version_3(root_hub_port.version);
+        let need_reset = !root_hub_port.version.is_version_3();
 
         if need_reset {
             self.reset_port(regs).await?;
@@ -342,8 +341,7 @@ impl Xhci {
             device: bus_address,
         });
 
-        let bus = self.bus.get();
-        let device = UsbDeviceAccess::setup(bus.clone(), slot).await?;
+        let device = UsbDeviceAccess::setup(slot).await?;
         UsbBusManager::register_device(device.into());
 
         Ok(())
@@ -525,9 +523,8 @@ impl Device for Xhci {
 
         op.wait_usbsts_bit(USBSTS::CNR::CLEAR, 100000000)?;
 
-        let (bus_index, bus) = UsbBusManager::register_bus(self.clone());
-        self.bus_index.init(bus_index);
-        self.bus.init(bus);
+        let bus = UsbBusManager::register_bus(self.clone());
+        self.bus_index.init(bus);
 
         runtime::spawn(self.clone().port_handler_task()).ok();
 

kernel/driver/usb/xhci/src/device.rs

@@ -6,9 +6,8 @@ use libk_util::{
 };
 use xhci_lib::context;
 use ygg_driver_usb::{
-    address::UsbBusAddress,
     communication::UsbDirection,
-    device::{UsbDevice, UsbDeviceDetachHandler, UsbSpeed},
+    device::{UsbBusAddress, UsbDevice, UsbDeviceDetachHandler, UsbSpeed},
     error::UsbError,
     info::UsbEndpointType,
     pipe::{
@@ -64,8 +63,8 @@ impl UsbDevice for XhciBusDevice {
         *self.detach_handler.lock() = Some(handler);
     }
 
-    fn host_controller(&self) -> Arc<dyn UsbHostController> {
-        self.xhci.clone()
+    fn controller_ref(&self) -> &dyn UsbHostController {
+        self.xhci.as_ref()
     }
 
     fn debug(&self) {}

kernel/driver/usb/xhci/src/pipe.rs

@@ -143,14 +143,14 @@ impl UsbControlPipe for ControlPipe {
         setup: ControlTransferSetup,
         buffer: &[u8],
     ) -> Result<usize, UsbError> {
-        let mut dma_buffer =
+        let dma_buffer =
             DmaBuffer::from_slice(&*self.xhci.dma, buffer).map_err(UsbError::MemoryError)?;
 
         self.ring
             .control_transfer(
                 self.xhci.as_ref(),
                 setup,
-                ControlDataStage::Out(&mut dma_buffer),
+                ControlDataStage::Out(&dma_buffer),
             )
             .await
     }

kernel/driver/usb/xhci/src/regs/extended.rs

@@ -7,7 +7,7 @@ use alloc::vec::Vec;
 use libk::error::Error;
 use libk_mm::{address::PhysicalAddress, device::DeviceMemoryIo};
 use libk_util::sync::spin_rwlock::IrqSafeRwLock;
-use ygg_driver_usb::error::UsbError;
+use ygg_driver_usb::{error::UsbError, info::UsbVersion};
 
 pub struct ProtocolSupport {
     words: [u32; 4],
@@ -69,8 +69,8 @@ impl ExtendedCapability {
 }
 
 impl ProtocolSupport {
-    pub fn usb_revision(&self) -> u16 {
-        (self.words[0] >> 16) as u16
+    pub fn usb_revision(&self) -> Option<UsbVersion> {
+        UsbVersion::from_bcd_usb((self.words[0] >> 16) as u16)
     }
 
     pub fn slot_type(&self) -> u8 {

kernel/driver/usb/xhci/src/regs/mod.rs

@@ -161,9 +161,9 @@ pub fn portsc_to_neutral(
     portsc.bitand(RO_MASK | RWS_MASK)
 }
 
-impl Into<u8> for PortNumber {
-    fn into(self) -> u8 {
-        self.0
+impl From<PortNumber> for u8 {
+    fn from(value: PortNumber) -> Self {
+        value.0
     }
 }
 

kernel/driver/virtio/core/src/lib.rs

@@ -1,3 +1,4 @@
+#![allow(clippy::new_without_default)]
 #![no_std]
 
 extern crate alloc;

kernel/driver/virtio/core/src/transport/mod.rs

@@ -20,7 +20,7 @@ pub trait Transport: Send {
     fn notify_cfg(&self) -> &[WriteOnly<u16>];
     fn notify_off_mul(&self) -> usize;
     fn supports_msix(&self) -> bool;
-    fn device_cfg(&self) -> Option<&DeviceMemoryIo<[u8]>>;
+    fn device_cfg(&self) -> Option<&DeviceMemoryIo<'_, [u8]>>;
     fn read_interrupt_status(&self) -> (bool, bool);
 
     fn read_device_features(&mut self) -> u64 {

kernel/lib/device-api/src/bus.rs

@@ -1,7 +1,10 @@
 //! Bus device interfaces
 use core::ops::Range;
 
-use crate::device::Device;
+use alloc::sync::Arc;
+use yggdrasil_abi::error::Error;
+
+use crate::{device::Device, dma::DmaAllocator};
 
 /// Bus device which provides an interconnect between two or more address spaces.
 ///
@@ -11,4 +14,9 @@ pub trait Bus: Device {
     ///
     /// NOTE: nested busses with bus1 -> bus0 -> host translation schemes are not yet supported.
     fn map_range(&self, bus_range: Range<u64>) -> Option<Range<u64>>;
+
+    /// TODO: document
+    fn create_dma_allocator(self: Arc<Self>) -> Result<Arc<dyn DmaAllocator>, Error> {
+        Err(Error::NotImplemented)
+    }
 }

kernel/lib/device-api/src/clock/freq.rs

@@ -0,0 +1,86 @@
+use core::{
+    fmt,
+    ops::{Div, Mul},
+};
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
+pub struct Hertz(pub u64);
+
+const KILO: u64 = 1_000;
+const MEGA: u64 = 1_000_000;
+const GIGA: u64 = 1_000_000_000;
+
+pub trait IntoHertz {
+    fn hz(&self) -> Hertz;
+    #[inline]
+    fn khz(&self) -> Hertz {
+        self.hz() * KILO
+    }
+    #[inline]
+    fn mhz(&self) -> Hertz {
+        self.hz() * MEGA
+    }
+    #[inline]
+    fn ghz(&self) -> Hertz {
+        self.hz() * GIGA
+    }
+}
+
+impl Mul<u32> for Hertz {
+    type Output = Hertz;
+
+    fn mul(self, rhs: u32) -> Self::Output {
+        Self(self.0 * rhs as u64)
+    }
+}
+
+impl Mul<u64> for Hertz {
+    type Output = Hertz;
+
+    fn mul(self, rhs: u64) -> Self::Output {
+        Self(self.0 * rhs)
+    }
+}
+
+impl Div<u32> for Hertz {
+    type Output = Hertz;
+
+    fn div(self, rhs: u32) -> Self::Output {
+        Self(self.0 / rhs as u64)
+    }
+}
+
+impl fmt::Display for Hertz {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let (scale, suffix) = match self.0 {
+            x if x >= GIGA => (GIGA, "GHz"),
+            x if x >= MEGA => (MEGA, "MHz"),
+            x if x >= KILO => (KILO, "kHz"),
+            x => return write!(f, "{x}Hz"),
+        };
+
+        let int = self.0 / scale;
+        let frac = (self.0 / (scale / 1000)) % 1000;
+
+        if frac == 0 {
+            write!(f, "{int}{suffix}")
+        } else {
+            write!(f, "{int}.{frac:03}{suffix}")
+        }
+    }
+}
+
+macro_rules! impl_into_hertz {
+    ($($ty:ty),+ $(,)?) => {
+        $(
+            impl IntoHertz for $ty {
+                #[inline(always)]
+                fn hz(&self) -> Hertz {
+                    Hertz(*self as u64)
+                }
+            }
+        )+
+    };
+}
+
+impl_into_hertz!(u8, u16, u32, u64);

kernel/lib/device-api/src/clock/mod.rs

@@ -3,7 +3,9 @@ use yggdrasil_abi::error::Error;
 
 use crate::device::Device;
 
-// TODO refine `clock` parameter types somehow
+pub use freq::{Hertz, IntoHertz};
+
+mod freq;
 
 pub struct ClockHandle {
     pub parent: Arc<dyn ClockController>,
@@ -19,11 +21,11 @@ pub trait ClockController: Device {
     fn enable_clock(&self, clock: Option<u32>) -> Result<(), Error>;
     fn disable_clock(&self, clock: Option<u32>) -> Result<(), Error>;
 
-    fn clock_rate(&self, clock: Option<u32>) -> Result<u64, Error> {
+    fn clock_rate(&self, clock: Option<u32>) -> Result<Hertz, Error> {
         let _ = clock;
         Err(Error::NotImplemented)
     }
-    fn set_clock_rate(&self, clock: Option<u32>, rate: u64) -> Result<u64, Error> {
+    fn set_clock_rate(&self, clock: Option<u32>, rate: Hertz) -> Result<Hertz, Error> {
         let _ = clock;
         let _ = rate;
         Err(Error::NotImplemented)
@@ -44,11 +46,11 @@ impl ClockHandle {
         self.parent.disable_clock(self.clock)
     }
 
-    pub fn rate(&self) -> Result<u64, Error> {
+    pub fn rate(&self) -> Result<Hertz, Error> {
         self.parent.clock_rate(self.clock)
     }
 
-    pub fn set_rate(&self, rate: u64) -> Result<u64, Error> {
+    pub fn set_rate(&self, rate: Hertz) -> Result<Hertz, Error> {
         self.parent.set_clock_rate(self.clock, rate)
     }
 }

kernel/lib/device-api/src/gpio.rs

@@ -0,0 +1,96 @@
+use alloc::{boxed::Box, sync::Arc};
+use yggdrasil_abi::error::Error;
+
+use crate::device::Device;
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum InputPinBias {
+    PullUp,
+    PullDown,
+    Floating,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum OutputPinBias {
+    PushPull,
+    OpenDrain,
+    HighZ,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum GpioPinLevel {
+    High,
+    Low,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum SinglePinDirection {
+    Output,
+    Input,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum GpioInterruptMode {
+    RisingEdge,
+    FallingEdge,
+    BothEdges,
+    HighLevel,
+    LowLevel,
+}
+
+pub struct GpioInterruptEvent {
+    pub mode: GpioInterruptMode,
+    pub event: u64,
+}
+
+pub struct GpioInterrupt {
+    pub mode: GpioInterruptMode,
+    pub handler: Box<dyn Fn() + Send>,
+}
+
+pub struct GpioPinConfig {
+    pub input: bool,
+    pub output: bool,
+    pub input_bias: Option<InputPinBias>,
+    pub output_bias: Option<OutputPinBias>,
+    pub active_level: GpioPinLevel,
+    pub initial_level: GpioPinLevel,
+}
+
+pub struct PinHandle {
+    pub index: u32,
+    pub config: GpioPinConfig,
+    pub parent: Arc<dyn GpioController>,
+}
+
+pub trait GpioController: Device {
+    fn write_gpio(&self, pin: &PinHandle, value: bool) -> Result<(), Error>;
+    fn read_gpio(&self, pin: &PinHandle) -> Result<bool, Error>;
+
+    fn setup_gpio(&self, pin: &PinHandle, event: Option<GpioInterruptEvent>) -> Result<(), Error>;
+}
+
+pub trait GpioOutput: Sync + Send {
+    fn write(&self, value: bool) -> Result<(), Error>;
+}
+
+impl PinHandle {
+    pub fn configure(&self) -> Result<(), Error> {
+        self.parent.setup_gpio(self, None)
+    }
+
+    pub fn write(&self, value: bool) -> Result<(), Error> {
+        self.parent.write_gpio(self, value)
+    }
+}
+
+impl GpioPinConfig {
+    pub fn force_single_direction(&self) -> Option<SinglePinDirection> {
+        match (self.input, self.output) {
+            (true, false) => Some(SinglePinDirection::Input),
+            (false, true) => Some(SinglePinDirection::Output),
+            (false, false) => None,
+            (true, true) => None,
+        }
+    }
+}

kernel/lib/device-api/src/lib.rs

@@ -7,6 +7,7 @@ extern crate alloc;
 pub mod bus;
 pub mod clock;
 pub mod device;
+pub mod gpio;
 pub mod interrupt;
 pub mod serial;
 pub mod timer;

kernel/lib/device-tree/src/driver/controller.rs

@@ -2,11 +2,12 @@
 use alloc::sync::Arc;
 use device_api::{
     clock::{ClockHandle, ResetHandle},
+    gpio::PinHandle,
     interrupt::FullIrq,
 };
 use fdt_rs::spec::Phandle;
 
-use crate::{DeviceTreePropertyRead, TProp};
+use crate::{driver::DeviceTreeGpioPins, DeviceTreePropertyRead, TProp};
 
 use super::{lookup_phandle, Node};
 
@@ -20,6 +21,12 @@ pub(crate) struct ResetIter<'dt> {
     pub(crate) offset: usize,
 }
 
+pub(crate) struct GpioIter<'o, 'dt> {
+    pub(crate) options: &'o DeviceTreeGpioPins,
+    pub(crate) gpios: TProp<'dt>,
+    pub(crate) offset: usize,
+}
+
 impl Iterator for ClockIter<'_> {
     type Item = ClockHandle;
 
@@ -52,6 +59,22 @@ impl Iterator for ResetIter<'_> {
     }
 }
 
+impl Iterator for GpioIter<'_, '_> {
+    type Item = PinHandle;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        if self.offset >= self.gpios.len() {
+            return None;
+        }
+        let phandle = self.gpios.read_cell(self.offset, 1)? as Phandle;
+        let gpioc = lookup_phandle(phandle, true)?;
+        let gpioc = gpioc.as_pin_controller()?;
+        let (pin, len) = gpioc.map_gpio(&self.gpios, self.offset + 1, self.options)?;
+        self.offset += len + 1;
+        Some(pin)
+    }
+}
+
 // Interrupt controller handling
 
 /// Reads interrupt information, as interpreted by `interrupt_controller`, from `property` at a

kernel/lib/device-tree/src/driver/mod.rs

@@ -1,11 +1,13 @@
 //! Device tree-based driver definitions
 
 use alloc::sync::Arc;
+use device_api::gpio::GpioPinLevel;
 use yggdrasil_abi::error::Error;
 
 mod controller;
 mod macros;
 mod registry;
+mod syscon;
 mod traits;
 mod tree;
 
@@ -14,12 +16,23 @@ pub mod util;
 pub use controller::{map_interrupt, map_interrupt_at};
 pub use macros::device_tree_driver;
 pub use registry::{lookup_phandle, register_driver};
+pub use syscon::DeviceTreeSyscon;
 pub use traits::{
-    DeviceTreeClockController, DeviceTreeInterruptController, DeviceTreeResetController, Driver,
-    ProbeContext,
+    DeviceTreeClockController, DeviceTreeInterruptController, DeviceTreePinController,
+    DeviceTreeResetController, Driver, ProbeContext,
 };
 pub use tree::{find_node, unflatten_device_tree, walk_device_tree, Node};
 
+/// Contextual information about a GPIO pin being configured
+pub struct DeviceTreeGpioPins {
+    /// Whether to enable input on the pin
+    pub input: bool,
+    /// Whether to enable output on the pin
+    pub output: bool,
+    /// Initial level to configure the GPIO with
+    pub initial_level: GpioPinLevel,
+}
+
 /// Specifies initialization sequence requirement for a driver
 #[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord)]
 pub enum InitSequence {