578 lines
14 KiB
Devicetree
578 lines
14 KiB
Devicetree
/dts-v1/;
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/ {
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000", "sifive,fu740";
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model = "SiFive HiFive Unmatched";
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aliases {
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serial0 = "/soc/serial@10010000";
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serial1 = "/soc/serial@10011000";
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ethernet0 = "/soc/ethernet@10090000";
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};
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chosen {
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stdout-path = "serial0";
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};
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cpus {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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timebase-frequency = <0xf4240>;
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cpu@0 {
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compatible = "sifive,bullet0", "riscv";
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device_type = "cpu";
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i-cache-block-size = <0x40>;
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i-cache-sets = <0x80>;
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i-cache-size = <0x4000>;
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next-level-cache = <0x01>;
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reg = <0x00>;
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riscv,isa = "rv64imac";
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status = "disabled";
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interrupt-controller {
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#interrupt-cells = <0x01>;
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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phandle = <0x02>;
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};
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};
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cpu@1 {
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compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <0x40>;
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d-cache-sets = <0x40>;
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d-cache-size = <0x8000>;
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d-tlb-sets = <0x01>;
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d-tlb-size = <0x28>;
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device_type = "cpu";
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i-cache-block-size = <0x40>;
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i-cache-sets = <0x80>;
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i-cache-size = <0x8000>;
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i-tlb-sets = <0x01>;
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i-tlb-size = <0x28>;
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mmu-type = "riscv,sv39";
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next-level-cache = <0x01>;
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reg = <0x01>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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interrupt-controller {
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#interrupt-cells = <0x01>;
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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phandle = <0x03>;
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};
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};
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cpu@2 {
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compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <0x40>;
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d-cache-sets = <0x40>;
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d-cache-size = <0x8000>;
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d-tlb-sets = <0x01>;
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d-tlb-size = <0x28>;
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device_type = "cpu";
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i-cache-block-size = <0x40>;
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i-cache-sets = <0x80>;
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i-cache-size = <0x8000>;
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i-tlb-sets = <0x01>;
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i-tlb-size = <0x28>;
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mmu-type = "riscv,sv39";
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next-level-cache = <0x01>;
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reg = <0x02>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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interrupt-controller {
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#interrupt-cells = <0x01>;
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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phandle = <0x04>;
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};
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};
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cpu@3 {
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compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <0x40>;
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d-cache-sets = <0x40>;
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d-cache-size = <0x8000>;
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d-tlb-sets = <0x01>;
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d-tlb-size = <0x28>;
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device_type = "cpu";
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i-cache-block-size = <0x40>;
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i-cache-sets = <0x80>;
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i-cache-size = <0x8000>;
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i-tlb-sets = <0x01>;
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i-tlb-size = <0x28>;
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mmu-type = "riscv,sv39";
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next-level-cache = <0x01>;
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reg = <0x03>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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interrupt-controller {
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#interrupt-cells = <0x01>;
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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phandle = <0x05>;
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};
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};
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cpu@4 {
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compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <0x40>;
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d-cache-sets = <0x40>;
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d-cache-size = <0x8000>;
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d-tlb-sets = <0x01>;
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d-tlb-size = <0x28>;
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device_type = "cpu";
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i-cache-block-size = <0x40>;
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i-cache-sets = <0x80>;
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i-cache-size = <0x8000>;
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i-tlb-sets = <0x01>;
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i-tlb-size = <0x28>;
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mmu-type = "riscv,sv39";
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next-level-cache = <0x01>;
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reg = <0x04>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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interrupt-controller {
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#interrupt-cells = <0x01>;
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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phandle = <0x06>;
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};
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};
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};
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soc {
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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compatible = "simple-bus";
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ranges;
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interrupt-controller@c000000 {
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#interrupt-cells = <0x01>;
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#address-cells = <0x00>;
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compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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reg = <0x00 0xc000000 0x00 0x4000000>;
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riscv,ndev = <0x45>;
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interrupt-controller;
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interrupts-extended = <0x02 0xffffffff 0x03 0xffffffff 0x03 0x09 0x04 0xffffffff 0x04 0x09 0x05 0xffffffff 0x05 0x09 0x06 0xffffffff 0x06 0x09>;
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phandle = <0x09>;
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};
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prci: clock-controller@10000000 {
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compatible = "sifive,fu740-c000-prci";
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reg = <0x00 0x10000000 0x00 0x1000>;
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clocks = <&clk_hfclk>, <&clk_rtcclk>;
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#clock-cells = <0x01>;
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#reset-cells = <0x01>;
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};
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serial@10010000 {
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compatible = "sifive,fu740-c000-uart", "sifive,uart0";
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reg = <0x00 0x10010000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x27>;
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clocks = <&prci 0x07>;
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status = "okay";
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};
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serial@10011000 {
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compatible = "sifive,fu740-c000-uart", "sifive,uart0";
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reg = <0x00 0x10011000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x28>;
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clocks = <&prci 0x07>;
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status = "okay";
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};
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i2c@10030000 {
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compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
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reg = <0x00 0x10030000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x34>;
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clocks = <&prci 0x07>;
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reg-shift = <0x02>;
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reg-io-width = <0x01>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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status = "okay";
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temperature-sensor@4c {
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compatible = "ti,tmp451";
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reg = <0x4c>;
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interrupt-parent = <0x0b>;
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interrupts = <0x06 0x08>;
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};
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pmic@58 {
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compatible = "dlg,da9063";
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reg = <0x58>;
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interrupt-parent = <0x0b>;
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interrupts = <0x01 0x08>;
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interrupt-controller;
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regulators {
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bcore1 {
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regulator-min-microvolt = <0x100590>;
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regulator-max-microvolt = <0x100590>;
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regulator-min-microamp = <0x4c4b40>;
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regulator-max-microamp = <0x4c4b40>;
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regulator-always-on;
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};
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bcore2 {
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regulator-min-microvolt = <0x100590>;
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regulator-max-microvolt = <0x100590>;
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regulator-min-microamp = <0x4c4b40>;
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regulator-max-microamp = <0x4c4b40>;
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regulator-always-on;
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};
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bpro {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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regulator-min-microamp = <0x2625a0>;
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regulator-max-microamp = <0x2625a0>;
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regulator-always-on;
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};
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bperi {
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regulator-min-microvolt = <0x100590>;
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regulator-max-microvolt = <0x100590>;
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regulator-min-microamp = <0x16e360>;
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regulator-max-microamp = <0x16e360>;
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regulator-always-on;
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};
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bmem {
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regulator-min-microvolt = <0x124f80>;
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regulator-max-microvolt = <0x124f80>;
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regulator-min-microamp = <0x2dc6c0>;
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regulator-max-microamp = <0x2dc6c0>;
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regulator-always-on;
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};
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bio {
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regulator-min-microvolt = <0x124f80>;
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regulator-max-microvolt = <0x124f80>;
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regulator-min-microamp = <0x2dc6c0>;
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regulator-max-microamp = <0x2dc6c0>;
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regulator-always-on;
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};
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ldo1 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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regulator-min-microamp = <0x186a0>;
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regulator-max-microamp = <0x186a0>;
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regulator-always-on;
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};
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ldo2 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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regulator-always-on;
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};
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ldo3 {
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regulator-min-microvolt = <0x325aa0>;
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regulator-max-microvolt = <0x325aa0>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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regulator-always-on;
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};
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ldo4 {
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regulator-min-microvolt = <0x2625a0>;
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regulator-max-microvolt = <0x2625a0>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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regulator-always-on;
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};
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ldo5 {
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regulator-min-microvolt = <0x325aa0>;
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regulator-max-microvolt = <0x325aa0>;
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regulator-min-microamp = <0x186a0>;
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regulator-max-microamp = <0x186a0>;
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regulator-always-on;
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};
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ldo6 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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regulator-always-on;
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};
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ldo7 {
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regulator-min-microvolt = <0x325aa0>;
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regulator-max-microvolt = <0x325aa0>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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regulator-always-on;
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};
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ldo8 {
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regulator-min-microvolt = <0x325aa0>;
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regulator-max-microvolt = <0x325aa0>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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regulator-always-on;
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};
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ldo9 {
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regulator-min-microvolt = <0x100590>;
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regulator-max-microvolt = <0x100590>;
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regulator-min-microamp = <0x30d40>;
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regulator-max-microamp = <0x30d40>;
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};
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ldo10 {
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regulator-min-microvolt = <0xf4240>;
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regulator-max-microvolt = <0xf4240>;
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regulator-min-microamp = <0x493e0>;
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regulator-max-microamp = <0x493e0>;
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};
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ldo11 {
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regulator-min-microvolt = <0x2625a0>;
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regulator-max-microvolt = <0x2625a0>;
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regulator-min-microamp = <0x493e0>;
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regulator-max-microamp = <0x493e0>;
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regulator-always-on;
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};
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};
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};
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};
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i2c@10031000 {
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compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
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reg = <0x00 0x10031000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x35>;
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clocks = <&prci 0x07>;
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reg-shift = <0x02>;
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reg-io-width = <0x01>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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status = "disabled";
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};
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spi@10040000 {
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compatible = "sifive,fu740-c000-spi", "sifive,spi0";
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reg = <0x00 0x10040000 0x00 0x1000 0x00 0x20000000 0x00 0x10000000>;
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interrupt-parent = <0x09>;
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interrupts = <0x29>;
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clocks = <&prci 0x07>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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status = "okay";
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flash@0 {
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compatible = "issi,is25wp256", "jedec,spi-nor";
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reg = <0x00>;
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spi-max-frequency = <0x2faf080>;
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m25p,fast-read;
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spi-tx-bus-width = <0x04>;
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spi-rx-bus-width = <0x04>;
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};
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};
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spi@10041000 {
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compatible = "sifive,fu740-c000-spi", "sifive,spi0";
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reg = <0x00 0x10041000 0x00 0x1000 0x00 0x30000000 0x00 0x10000000>;
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interrupt-parent = <0x09>;
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interrupts = <0x2a>;
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clocks = <&prci 0x07>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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status = "disabled";
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};
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spi@10050000 {
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compatible = "sifive,fu740-c000-spi", "sifive,spi0";
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reg = <0x00 0x10050000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x2b>;
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clocks = <&prci 0x07>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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status = "okay";
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mmc@0 {
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compatible = "mmc-spi-slot";
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reg = <0x00>;
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spi-max-frequency = <0x1312d00>;
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voltage-ranges = <0xce4 0xce4>;
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disable-wp;
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};
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};
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macb: ethernet@10090000 {
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compatible = "sifive,fu540-c000-gem";
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interrupt-parent = <0x09>;
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interrupts = <0x37>;
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reg = <0x00 0x10090000 0x00 0x2000 0x00 0x100a0000 0x00 0x1000>;
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local-mac-address = [00 00 00 00 00 00];
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clock-names = "pclk", "hclk";
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clocks = <&prci 0x02 &prci 0x02>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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status = "okay";
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phy-mode = "gmii";
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phy-handle = <0x0c>;
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ethernet-phy@0 {
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reg = <0x00>;
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phandle = <0x0c>;
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};
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};
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pwm@10020000 {
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compatible = "sifive,fu740-c000-pwm", "sifive,pwm0";
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reg = <0x00 0x10020000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x2c 0x2d 0x2e 0x2f>;
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clocks = <&prci 0x07>;
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#pwm-cells = <0x03>;
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status = "okay";
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phandle = <0x0d>;
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};
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pwm@10021000 {
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compatible = "sifive,fu740-c000-pwm", "sifive,pwm0";
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reg = <0x00 0x10021000 0x00 0x1000>;
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interrupt-parent = <0x09>;
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interrupts = <0x30 0x31 0x32 0x33>;
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clocks = <&prci 0x07>;
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#pwm-cells = <0x03>;
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status = "okay";
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};
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cache-controller@2010000 {
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compatible = "sifive,fu740-c000-ccache", "cache";
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cache-block-size = <0x40>;
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cache-level = <0x02>;
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cache-sets = <0x800>;
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cache-size = <0x200000>;
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cache-unified;
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interrupt-parent = <0x09>;
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interrupts = <0x13 0x15 0x16 0x14>;
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reg = <0x00 0x2010000 0x00 0x1000>;
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phandle = <0x01>;
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};
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gpio@10060000 {
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compatible = "sifive,fu740-c000-gpio", "sifive,gpio0";
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interrupt-parent = <0x09>;
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interrupts = <0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26>;
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reg = <0x00 0x10060000 0x00 0x1000>;
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gpio-controller;
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#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <&prci 0x07>;
|
|
status = "okay";
|
|
phandle = <0x0b>;
|
|
};
|
|
|
|
pcie@e00000000 {
|
|
#address-cells = <0x03>;
|
|
#interrupt-cells = <0x01>;
|
|
#num-lanes = <0x08>;
|
|
#size-cells = <0x02>;
|
|
compatible = "sifive,fu740-pcie";
|
|
reg = <0x0e 0x00 0x01 0x00 0x0d 0xf0000000 0x00 0x10000000 0x00 0x100d0000 0x00 0x1000>;
|
|
reg-names = "dbi", "config", "mgmt";
|
|
device_type = "pci";
|
|
dma-coherent;
|
|
bus-range = <0x00 0xff>;
|
|
ranges = <0x81000000 0x00 0x60080000 0x00 0x60080000 0x00 0x10000 0x82000000 0x00 0x60090000 0x00 0x60090000 0x00 0xff70000 0x82000000 0x00 0x70000000 0x00 0x70000000 0x00 0x1000000 0xc3000000 0x20 0x00 0x20 0x00 0x20 0x00>;
|
|
num-lanes = <0x08>;
|
|
interrupts = <0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40>;
|
|
interrupt-names = "msi", "inta", "intb", "intc", "intd";
|
|
interrupt-parent = <0x09>;
|
|
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
|
|
interrupt-map = <0x00 0x00 0x00 0x01 0x09 0x39 0x00 0x00 0x00 0x02 0x09 0x3a 0x00 0x00 0x00 0x03 0x09 0x3b 0x00 0x00 0x00 0x04 0x09 0x3c>;
|
|
clock-names = "pcie_aux";
|
|
clocks = <&prci 0x08>;
|
|
pwren-gpios = <0x0b 0x05 0x00>;
|
|
perstn-gpios = <0x0b 0x08 0x00>;
|
|
resets = <&prci 0x04>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x00 0x80000000 0x04 0x00>;
|
|
};
|
|
|
|
pwmleds {
|
|
compatible = "pwm-leds";
|
|
|
|
green-d12 {
|
|
label = "green:d12";
|
|
pwms = <0x0d 0x00 0x773594 0x01>;
|
|
active-low = <0x01>;
|
|
max-brightness = <0xff>;
|
|
linux,default-trigger = "none";
|
|
};
|
|
|
|
green-d2 {
|
|
label = "green:d2";
|
|
pwms = <0x0d 0x01 0x773594 0x01>;
|
|
active-low = <0x01>;
|
|
max-brightness = <0xff>;
|
|
linux,default-trigger = "none";
|
|
};
|
|
|
|
red-d2 {
|
|
label = "red:d2";
|
|
pwms = <0x0d 0x02 0x773594 0x01>;
|
|
active-low = <0x01>;
|
|
max-brightness = <0xff>;
|
|
linux,default-trigger = "none";
|
|
};
|
|
|
|
blue-d2 {
|
|
label = "blue:d2";
|
|
pwms = <0x0d 0x03 0x773594 0x01>;
|
|
active-low = <0x01>;
|
|
max-brightness = <0xff>;
|
|
linux,default-trigger = "none";
|
|
};
|
|
};
|
|
|
|
clk_hfclk: hfclk {
|
|
#clock-cells = <0x00>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <26000000>;
|
|
clock-output-names = "hfclk";
|
|
};
|
|
|
|
clk_rtcclk: rtcclk {
|
|
#clock-cells = <0x00>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <1000000>;
|
|
clock-output-names = "rtcclk";
|
|
};
|
|
|
|
gpio-poweroff {
|
|
compatible = "gpio-poweroff";
|
|
gpios = <0x0b 0x02 0x01>;
|
|
};
|
|
};
|