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Rename makeRegister to Register

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This commit is contained in:
Eugene Rossokha
2025-03-17 23:49:41 +02:00
parent 64eae5052e
commit dc7968f92f
2 changed files with 21 additions and 16 deletions
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src/arch/aarch64/regs.zig
+5 -5
View File
@@ -1,4 +1,4 @@
fn makeRegister(comptime name: []const u8, comptime bits: type) type { fn Register(comptime name: []const u8, comptime bits: type) type {
const repr = switch (@typeInfo(bits)) { const repr = switch (@typeInfo(bits)) {
.@"struct" => |s| s.backing_integer.?, .@"struct" => |s| s.backing_integer.?,
else => bits, else => bits,
@@ -27,8 +27,8 @@ fn makeRegister(comptime name: []const u8, comptime bits: type) type {
}; };
} }
pub const TTBR0_EL1 = makeRegister("ttbr0_el1", u64); pub const TTBR0_EL1 = Register("ttbr0_el1", u64);
pub const TTBR1_EL1 = makeRegister("ttbr1_el1", u64); pub const TTBR1_EL1 = Register("ttbr1_el1", u64);
pub const Cacheability = enum(u2) { pub const Cacheability = enum(u2) {
non_cacheable = 0, non_cacheable = 0,
@@ -51,7 +51,7 @@ pub const TranslationGranule = enum(u2) {
_ _
}; };
pub const TCR_EL1 = makeRegister("tcr_el1", packed struct(u64) { pub const TCR_EL1 = Register("tcr_el1", packed struct(u64) {
// 0..6 // 0..6
T0SZ: u6 = 0, T0SZ: u6 = 0,
// 6 // 6
@@ -104,7 +104,7 @@ pub const TCR_EL1 = makeRegister("tcr_el1", packed struct(u64) {
_2: u25 = 0, _2: u25 = 0,
}); });
pub const SCTLR_EL1 = makeRegister("sctlr_el1", packed struct (u64) { pub const SCTLR_EL1 = Register("sctlr_el1", packed struct (u64) {
// 0 // 0
M: bool = false, M: bool = false,
// 1 // 1
src/arch/riscv64/regs.zig
+16 -11
View File
@@ -1,15 +1,20 @@
fn makeRegister(comptime name: []const u8, comptime bits: type) type { fn Register(comptime name: []const u8, comptime bits: type) type {
const repr = switch (@typeInfo(bits)) { const repr = switch (@typeInfo(bits)) {
.@"struct" => |s| s.backing_integer.?, .@"struct" => |s| s.backing_integer.?,
else => bits, else => bits,
}; };
return enum(repr) { return enum(repr) {
pub fn set(value: repr) void { pub fn set(value: repr) void {
asm volatile ("csrw " ++ name ++ ", %[value]"::[value]"r"(value)); asm volatile ("csrw " ++ name ++ ", %[value]"
:
: [value] "r" (value),
);
} }
pub fn get() repr { pub fn get() repr {
return asm volatile ("csrr %[value], " ++ name:[value]"=r"(-> repr)); return asm volatile ("csrr %[value], " ++ name
: [value] "=r" (-> repr),
);
} }
pub fn write(value: bits) void { pub fn write(value: bits) void {
@@ -27,7 +32,7 @@ fn makeRegister(comptime name: []const u8, comptime bits: type) type {
}; };
} }
pub const SATP = makeRegister("satp", packed struct(u64) { pub const SATP = Register("satp", packed struct(u64) {
// 0..44 // 0..44
PPN: u44 = 0, PPN: u44 = 0,
// 44..60 // 44..60
@@ -37,10 +42,10 @@ pub const SATP = makeRegister("satp", packed struct(u64) {
bare = 0, bare = 0,
sv39 = 8, sv39 = 8,
_, _,
} = .bare } = .bare,
}); });
pub const SSTATUS = makeRegister("sstatus", packed struct(u64) { pub const SSTATUS = Register("sstatus", packed struct(u64) {
// 0 // 0
_0: u1 = 0, _0: u1 = 0,
// 1 // 1
@@ -57,7 +62,7 @@ pub const SSTATUS = makeRegister("sstatus", packed struct(u64) {
_3: u45 = 0, _3: u45 = 0,
}); });
pub const STVEC = makeRegister("stvec", packed struct(u64) { pub const STVEC = Register("stvec", packed struct(u64) {
MODE: enum(u2) { MODE: enum(u2) {
direct = 0, direct = 0,
vectored = 1, vectored = 1,
@@ -65,10 +70,10 @@ pub const STVEC = makeRegister("stvec", packed struct(u64) {
BASE: u62 = 0, BASE: u62 = 0,
}); });
pub const SCAUSE = makeRegister("scause", packed struct(u64) { pub const SCAUSE = Register("scause", packed struct(u64) {
CODE: u63 = 0, CODE: u63 = 0,
INTERRUPT: bool = false INTERRUPT: bool = false,
}); });
pub const STVAL = makeRegister("stval", u64); pub const STVAL = Register("stval", u64);
pub const SEPC = makeRegister("sepc", u64); pub const SEPC = Register("sepc", u64);