testsuite: Use standard_output_file
gdb/testsuite/ChangeLog 2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com> * gdb.arch/powerpc-prologue.exp: Use standard_output_file. * gdb.arch/ppc64-symtab-cordic.exp: Likewise. * gdb.arch/vsx-regs.exp: Likewise.
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@ -1,3 +1,9 @@
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2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
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* gdb.arch/powerpc-prologue.exp: Use standard_output_file
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* gdb.arch/ppc64-symtab-cordic.exp: Likewise.
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* gdb.arch/vsx-regs.exp: Likewise.
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2016-10-07 Yao Qi <yao.qi@linaro.org>
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* gdb.xml/tdesc-regs.exp: Set regdir to "arm/".
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@ -24,7 +24,7 @@ if {[istarget *-*-aix*] || ![istarget "powerpc-*-*"]} then {
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set testfile "powerpc-prologue"
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set srcfile ${testfile}.c
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set binfile ${objdir}/${subdir}/${testfile}
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set binfile [standard_output_file ${testfile}]
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# Don't use "debug", so that we don't have line information for the assembly
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# fragments.
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@ -21,9 +21,9 @@ if {![istarget "powerpc*"] || ![is_lp64_target]} {
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standard_testfile
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set kobz2file ${srcdir}/${subdir}/cordic.ko.bz2
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set kofile ${objdir}/${subdir}/cordic.ko
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set kofile [standard_output_file cordic.ko]
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set kodebugbz2file ${srcdir}/${subdir}/cordic.ko.debug.bz2
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set kodebugfile ${objdir}/${subdir}/cordic.ko.debug
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set kodebugfile [standard_output_file cordic.ko.debug]
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if {[catch "system \"bzip2 -dc ${kobz2file} >${kofile}\""] != 0} {
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untested "failed bzip2 for ${kobz2file}"
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@ -152,7 +152,7 @@ for {set i 0} {$i < 32} {incr i 1} {
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# later when loading the core file (i.e., different register values for different
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# vector register banks).
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set corefile "${objdir}/${subdir}/vsx-core.test"
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set corefile [standard_output_file vsx-core.test]
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set core_supported [gdb_gcore_cmd "$corefile" "Save a VSX-enabled corefile"]
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# Now run the F32~F63/VR0~VR31 tests.
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