Support Intel SM4

gas/ChangeLog:

	* NEWS: Support Intel SM4.
	* config/tc-i386.c: Add sm4.
	* doc/c-i386.texi: Document .sm4.
	* testsuite/gas/i386/i386.exp: Run SM4 tests.
	* testsuite/gas/i386/x86-64.exp: Ditto.
	* testsuite/gas/i386/sm4-intel.d: Add SM4 tests.
	* testsuite/gas/i386/sm4.d: Ditto.
	* testsuite/gas/i386/sm4.s: Ditto.
	* testsuite/gas/i386/x86-64-sm4-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-sm4.d: Ditto.
	* testsuite/gas/i386/x86-64-sm4.s: Ditto.

opcodes/ChangeLog:

	* i386-dis.c (prefix_table): Add SM4 instructions.
	* i386-gen.c (isa_dependencies): Add SM4.
	(cpu_flags): Ditto.
	* i386-init.h: Regenerated.
	* i386-mnem.h: Ditto.
	* i386-opc.h (CpuSM4): New.
	(i386_cpu_flags): Add cpusm4.
	* i386-opc.tbl: Add SM4 instructions.
	* i386-tbl.h: Regenerated.
This commit is contained in:
Haochen Jiang 2023-07-24 11:09:57 +08:00
parent c55ba32b7a
commit 2bced1684b
18 changed files with 7069 additions and 6795 deletions

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@ -1,5 +1,7 @@
-*- text -*-
* Add support for Intel SM4 instructions.
* Add support for Intel SM3 instructions.
* Add support for Intel SHA512 instructions.

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@ -1154,6 +1154,7 @@ static const arch_entry cpu_arch[] =
SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false),
SUBARCH (sha512, SHA512, ANY_SHA512, false),
SUBARCH (sm3, SM3, ANY_SM3, false),
SUBARCH (sm4, SM4, ANY_SM4, false),
};
#undef SUBARCH

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@ -210,6 +210,7 @@ accept various extension mnemonics. For example,
@code{avx_vnni_int16},
@code{sha512},
@code{sm3},
@code{sm4},
@code{amx_int8},
@code{amx_bf16},
@code{amx_fp16},
@ -1639,7 +1640,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
@item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
@item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3}
@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}

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@ -503,6 +503,8 @@ if [gas_32_check] then {
run_list_test "sha512-inval"
run_dump_test "sm3"
run_dump_test "sm3-intel"
run_dump_test "sm4"
run_dump_test "sm4-intel"
run_list_test "sg"
run_dump_test "clzero"
run_dump_test "invlpgb"

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@ -0,0 +1,33 @@
#objdump: -dw -Mintel
#name: i386 SM4 insns (Intel disassembly)
#source: sm4.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 ymm6,ymm5,ymm4
\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 xmm6,xmm5,xmm4
\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 ymm6,ymm5,ymm4
\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 xmm6,xmm5,xmm4
\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 ymm6,ymm5,ymm4
\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 xmm6,xmm5,xmm4
\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 ymm6,ymm5,ymm4
\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 xmm6,xmm5,xmm4
\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[ecx\]
\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[ecx\]

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@ -0,0 +1,33 @@
#objdump: -dw
#name: i386 SM4 insns
#source: sm4.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 %ymm4,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 %xmm4,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 \(%ecx\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 \(%ecx\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 %ymm4,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 %xmm4,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 \(%ecx\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 \(%ecx\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 %ymm4,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 %xmm4,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 \(%ecx\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 \(%ecx\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 %ymm4,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 %xmm4,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 \(%ecx\),%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 \(%ecx\),%xmm5,%xmm6

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@ -0,0 +1,30 @@
# Check 32bit SM4 instructions
.text
_start:
vsm4key4 %ymm4, %ymm5, %ymm6
vsm4key4 %xmm4, %xmm5, %xmm6
vsm4key4 0x10000000(%esp, %esi, 8), %ymm5, %ymm6
vsm4key4 (%ecx), %ymm5, %ymm6
vsm4key4 0x10000000(%esp, %esi, 8), %xmm5, %xmm6
vsm4key4 (%ecx), %xmm5, %xmm6
vsm4rnds4 %ymm4, %ymm5, %ymm6
vsm4rnds4 %xmm4, %xmm5, %xmm6
vsm4rnds4 0x10000000(%esp, %esi, 8), %ymm5, %ymm6
vsm4rnds4 (%ecx), %ymm5, %ymm6
vsm4rnds4 0x10000000(%esp, %esi, 8), %xmm5, %xmm6
vsm4rnds4 (%ecx), %xmm5, %xmm6
.intel_syntax noprefix
vsm4key4 ymm6, ymm5, ymm4
vsm4key4 xmm6, xmm5, xmm4
vsm4key4 ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
vsm4key4 ymm6, ymm5, YMMWORD PTR [ecx]
vsm4key4 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
vsm4key4 xmm6, xmm5, XMMWORD PTR [ecx]
vsm4rnds4 ymm6, ymm5, ymm4
vsm4rnds4 xmm6, xmm5, xmm4
vsm4rnds4 ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
vsm4rnds4 ymm6, ymm5, YMMWORD PTR [ecx]
vsm4rnds4 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
vsm4rnds4 xmm6, xmm5, XMMWORD PTR [ecx]

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@ -0,0 +1,33 @@
#objdump: -dw -Mintel
#name: x86_64 SM4 insns (Intel disassembly)
#source: x86-64-sm4.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
\s*[a-f0-9]+:\s*c4 c2 56 da f6\s+vsm4key4 ymm6,ymm5,ymm14
\s*[a-f0-9]+:\s*c4 c2 52 da f6\s+vsm4key4 xmm6,xmm5,xmm14
\s*[a-f0-9]+:\s*c4 a2 06 da b4 f5 00 00 00 10\s+vsm4key4 ymm6,ymm15,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 06 da 31\s+vsm4key4 ymm6,ymm15,YMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 a2 02 da b4 f5 00 00 00 10\s+vsm4key4 xmm6,xmm15,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 02 da 31\s+vsm4key4 xmm6,xmm15,XMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 c2 57 da f6\s+vsm4rnds4 ymm6,ymm5,ymm14
\s*[a-f0-9]+:\s*c4 c2 53 da f6\s+vsm4rnds4 xmm6,xmm5,xmm14
\s*[a-f0-9]+:\s*c4 a2 07 da b4 f5 00 00 00 10\s+vsm4rnds4 ymm6,ymm15,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 07 da 31\s+vsm4rnds4 ymm6,ymm15,YMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 a2 03 da b4 f5 00 00 00 10\s+vsm4rnds4 xmm6,xmm15,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 03 da 31\s+vsm4rnds4 xmm6,xmm15,XMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 c2 56 da f6\s+vsm4key4 ymm6,ymm5,ymm14
\s*[a-f0-9]+:\s*c4 c2 52 da f6\s+vsm4key4 xmm6,xmm5,xmm14
\s*[a-f0-9]+:\s*c4 a2 06 da b4 f5 00 00 00 10\s+vsm4key4 ymm6,ymm15,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 06 da 31\s+vsm4key4 ymm6,ymm15,YMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 a2 02 da b4 f5 00 00 00 10\s+vsm4key4 xmm6,xmm15,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 02 da 31\s+vsm4key4 xmm6,xmm15,XMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 c2 57 da f6\s+vsm4rnds4 ymm6,ymm5,ymm14
\s*[a-f0-9]+:\s*c4 c2 53 da f6\s+vsm4rnds4 xmm6,xmm5,xmm14
\s*[a-f0-9]+:\s*c4 a2 07 da b4 f5 00 00 00 10\s+vsm4rnds4 ymm6,ymm15,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 07 da 31\s+vsm4rnds4 ymm6,ymm15,YMMWORD PTR \[r9\]
\s*[a-f0-9]+:\s*c4 a2 03 da b4 f5 00 00 00 10\s+vsm4rnds4 xmm6,xmm15,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
\s*[a-f0-9]+:\s*c4 c2 03 da 31\s+vsm4rnds4 xmm6,xmm15,XMMWORD PTR \[r9\]

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@ -0,0 +1,33 @@
#objdump: -dw
#name: x86_64 SM4 insns
#source: x86-64-sm4.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
\s*[a-f0-9]+:\s*c4 c2 56 da f6\s+vsm4key4 %ymm14,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 c2 52 da f6\s+vsm4key4 %xmm14,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 a2 06 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 c2 06 da 31\s+vsm4key4 \(%r9\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 a2 02 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 02 da 31\s+vsm4key4 \(%r9\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 57 da f6\s+vsm4rnds4 %ymm14,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 c2 53 da f6\s+vsm4rnds4 %xmm14,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 a2 07 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 c2 07 da 31\s+vsm4rnds4 \(%r9\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 a2 03 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 03 da 31\s+vsm4rnds4 \(%r9\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 56 da f6\s+vsm4key4 %ymm14,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 c2 52 da f6\s+vsm4key4 %xmm14,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 a2 06 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 c2 06 da 31\s+vsm4key4 \(%r9\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 a2 02 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 02 da 31\s+vsm4key4 \(%r9\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 57 da f6\s+vsm4rnds4 %ymm14,%ymm5,%ymm6
\s*[a-f0-9]+:\s*c4 c2 53 da f6\s+vsm4rnds4 %xmm14,%xmm5,%xmm6
\s*[a-f0-9]+:\s*c4 a2 07 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 c2 07 da 31\s+vsm4rnds4 \(%r9\),%ymm15,%ymm6
\s*[a-f0-9]+:\s*c4 a2 03 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%xmm15,%xmm6
\s*[a-f0-9]+:\s*c4 c2 03 da 31\s+vsm4rnds4 \(%r9\),%xmm15,%xmm6

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@ -0,0 +1,30 @@
# Check 64bit SM4 instructions
.text
_start:
vsm4key4 %ymm14, %ymm5, %ymm6
vsm4key4 %xmm14, %xmm5, %xmm6
vsm4key4 0x10000000(%rbp, %r14, 8), %ymm15, %ymm6
vsm4key4 (%r9), %ymm15, %ymm6
vsm4key4 0x10000000(%rbp, %r14, 8), %xmm15, %xmm6
vsm4key4 (%r9), %xmm15, %xmm6
vsm4rnds4 %ymm14, %ymm5, %ymm6
vsm4rnds4 %xmm14, %xmm5, %xmm6
vsm4rnds4 0x10000000(%rbp, %r14, 8), %ymm15, %ymm6
vsm4rnds4 (%r9), %ymm15, %ymm6
vsm4rnds4 0x10000000(%rbp, %r14, 8), %xmm15, %xmm6
vsm4rnds4 (%r9), %xmm15, %xmm6
.intel_syntax noprefix
vsm4key4 ymm6, ymm5, ymm14
vsm4key4 xmm6, xmm5, xmm14
vsm4key4 ymm6, ymm15, YMMWORD PTR [rbp+r14*8+0x10000000]
vsm4key4 ymm6, ymm15, YMMWORD PTR [r9]
vsm4key4 xmm6, xmm15, XMMWORD PTR [rbp+r14*8+0x10000000]
vsm4key4 xmm6, xmm15, XMMWORD PTR [r9]
vsm4rnds4 ymm6, ymm5, ymm14
vsm4rnds4 xmm6, xmm5, xmm14
vsm4rnds4 ymm6, ymm15, YMMWORD PTR [rbp+r14*8+0x10000000]
vsm4rnds4 ymm6, ymm15, YMMWORD PTR [r9]
vsm4rnds4 xmm6, xmm15, XMMWORD PTR [rbp+r14*8+0x10000000]
vsm4rnds4 xmm6, xmm15, XMMWORD PTR [r9]

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@ -446,6 +446,8 @@ run_dump_test "x86-64-sha512-intel"
run_list_test "x86-64-sha512-inval"
run_dump_test "x86-64-sm3"
run_dump_test "x86-64-sm3-intel"
run_dump_test "x86-64-sm4"
run_dump_test "x86-64-sm4-intel"
run_dump_test "x86-64-clzero"
run_dump_test "x86-64-mwaitx-bdver4"
run_list_test "x86-64-mwaitx-reg"

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@ -3970,8 +3970,9 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0F38DA_W_0 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_0) },
{ Bad_Opcode },
{ "vsm4key4", { XM, Vex, EXx }, 0 },
{ VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_2) },
{ "vsm4rnds4", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F38F5_L_0 */

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@ -218,6 +218,8 @@ static const dependency isa_dependencies[] =
"AVX2" },
{ "SM3",
"AVX" },
{ "SM4",
"AVX2" },
{ "XSAVES",
"XSAVEC" },
{ "XSAVEC",
@ -344,6 +346,7 @@ static bitfield cpu_flags[] =
BITFIELD (SHA),
BITFIELD (SHA512),
BITFIELD (SM3),
BITFIELD (SM4),
BITFIELD (ClflushOpt),
BITFIELD (XSAVES),
BITFIELD (XSAVEC),

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -179,6 +179,8 @@ enum
CpuSHA512,
/* SM3 instructions required. */
CpuSM3,
/* SM4 instructions required. */
CpuSM4,
/* CLFLUSHOPT instruction required */
CpuClflushOpt,
/* XSAVES/XRSTORS instruction required */
@ -409,6 +411,7 @@ typedef union i386_cpu_flags
unsigned int cpusha:1;
unsigned int cpusha512:1;
unsigned int cpusm3:1;
unsigned int cpusm4:1;
unsigned int cpuclflushopt:1;
unsigned int cpuxsaves:1;
unsigned int cpuxsavec:1;

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@ -2058,6 +2058,13 @@ vsm3msg2, 0x66da, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unsp
// SM3 instructions end.
// SM4 instructions.
vsm4key4, 0xf3da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
vsm4rnds4, 0xf2da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
// SM4 instructions end.
// VPCLMULQDQ instructions
vpclmulqdq, 0x6644, VPCLMULQDQ, Modrm|Vex256|Space0F3A|VexWIG|VexVVVV|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegYMM, RegYMM, RegYMM }

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