LoongArch gas support
2021-10-22 Chenghua Xu <xuchenghua@loongson.cn> Zhensong Liu <liuzhensong@loongson.cn> Weinan Liu <liuweinan@loongson.cn> Xiaolin Tang <tangxiaolin@loongson.cn> gas/ * Makefile.am: Add LoongArch. * NEWS: Mention LoongArch support. * config/loongarch-lex-wrapper.c: New. * config/loongarch-lex.h: New. * config/loongarch-lex.l: New. * config/loongarch-parse.y: New. * config/tc-loongarch.c: New. * config/tc-loongarch.h: New. * configure.ac: Add LoongArch. * configure.tgt: Likewise. * doc/as.texi: Likewise. * doc/c-loongarch.texi: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/all/gas.exp: Add LoongArch. * gas/elf/elf.exp: Likewise. * gas/loongarch/4opt_op.d: New. * gas/loongarch/4opt_op.s: Likewise. * gas/loongarch/fix_op.d: Likewise. * gas/loongarch/fix_op.s: Likewise. * gas/loongarch/float_op.d: Likewise. * gas/loongarch/float_op.s: Likewise. * gas/loongarch/imm_op.d: Likewise. * gas/loongarch/imm_op.s: Likewise. * gas/loongarch/jmp_op.d: Likewise. * gas/loongarch/jmp_op.s: Likewise. * gas/loongarch/load_store_op.d: Likewise. * gas/loongarch/load_store_op.s: Likewise. * gas/loongarch/loongarch.exp: Likewise. * gas/loongarch/macro_op.d: Likewise. * gas/loongarch/macro_op.s: Likewise. * gas/loongarch/nop.d: Likewise. * gas/loongarch/nop.s: Likewise. * gas/loongarch/privilege_op.d: Likewise. * gas/loongarch/privilege_op.s: Likewise. * gas/loongarch/syscall.d: Likewise. * gas/loongarch/syscall.s: Likewise. * lib/gas-defs.exp: Add LoongArch.
This commit is contained in:
liuzhensong
Alan Modra
+16
-1
@@ -154,6 +154,7 @@ TARGET_CPU_CFILES = \
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config/tc-ip2k.c \
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config/tc-iq2000.c \
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config/tc-lm32.c \
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config/tc-loongarch.c \
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config/tc-m32c.c \
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config/tc-m32r.c \
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config/tc-m68hc11.c \
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@@ -374,7 +375,8 @@ EXTRA_SCRIPTS = .gdbinit
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EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \
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config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \
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config/rl78-parse.c config/rl78-parse.h \
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config/rx-parse.c config/rx-parse.h
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config/rx-parse.c config/rx-parse.h \
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config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c
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diststuff: $(EXTRA_DIST) info
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@@ -471,6 +473,19 @@ config/rx-parse.c: $(srcdir)/config/rx-parse.y
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config/rx-parse.h: config/rx-parse.c
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@true
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# The LoongArch lexical analyzer and parser.
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EXTRA_as_new_SOURCES += config/loongarch-parse.y
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config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y
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$(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ;
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config/loongarch-parse.h: config/loongarch-parse.c
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@true
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EXTRA_as_new_SOURCES += config/loongarch-lex.l
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config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l
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$(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE)
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config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h
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# The mips instruction table specification lexical analyzer and parser.
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itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h
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+26
-2
@@ -544,6 +544,7 @@ TARGET_CPU_CFILES = \
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config/tc-ip2k.c \
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config/tc-iq2000.c \
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config/tc-lm32.c \
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config/tc-loongarch.c \
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config/tc-m32c.c \
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config/tc-m32r.c \
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config/tc-m68hc11.c \
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@@ -757,7 +758,8 @@ EXTRA_SCRIPTS = .gdbinit
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EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \
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config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \
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config/rl78-parse.c config/rl78-parse.h \
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config/rx-parse.c config/rx-parse.h
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config/rx-parse.c config/rx-parse.h \
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config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c
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DISTCLEANFILES = targ-cpu.h obj-format.h targ-env.h itbl-cpu.h cgen-desc.h
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@@ -789,12 +791,15 @@ as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \
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as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \
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$(extra_objects) $(GASLIBS) $(LIBINTL_DEP)
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# The LoongArch lexical analyzer and parser.
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EXTRA_as_new_SOURCES = $(CFILES) $(HFILES) $(TARGET_CPU_CFILES) \
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$(TARGET_CPU_HFILES) $(TARGET_EXTRA_FILES) $(TARG_ENV_CFILES) \
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$(OBJ_FORMAT_CFILES) $(OBJ_FORMAT_HFILES) \
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$(CONFIG_ATOF_CFILES) $(MULTI_CFILES) config/m68k-parse.y \
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config/bfin-parse.y config/bfin-lex.l config/rl78-parse.y \
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config/rx-parse.y
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config/rx-parse.y config/loongarch-parse.y \
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config/loongarch-lex.l
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EXPECT = expect
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RUNTEST = runtest
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RUNTESTFLAGS =
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@@ -939,6 +944,8 @@ config/tc-iq2000.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/tc-lm32.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/tc-loongarch.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/tc-m32c.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/tc-m32r.$(OBJEXT): config/$(am__dirstamp) \
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@@ -1085,6 +1092,10 @@ config/rl78-parse.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/rx-parse.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/loongarch-parse.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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config/loongarch-lex.$(OBJEXT): config/$(am__dirstamp) \
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config/$(DEPDIR)/$(am__dirstamp)
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as-new$(EXEEXT): $(as_new_OBJECTS) $(as_new_DEPENDENCIES) $(EXTRA_as_new_DEPENDENCIES)
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@rm -f as-new$(EXEEXT)
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@@ -1146,6 +1157,8 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386coff.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386elf.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-mipself.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/loongarch-lex.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/loongarch-parse.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/m68k-parse.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-aout.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-coff.Po@am__quote@
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@@ -1183,6 +1196,7 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-ip2k.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-iq2000.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-lm32.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-loongarch.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32c.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32r.Po@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m68hc11.Po@am__quote@
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@@ -1452,6 +1466,8 @@ maintainer-clean-generic:
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@echo "it deletes files that may require special tools to rebuild."
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-rm -f config/bfin-lex.c
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-rm -f config/bfin-parse.c
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-rm -f config/loongarch-lex.c
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-rm -f config/loongarch-parse.c
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-rm -f config/m68k-parse.c
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-rm -f config/rl78-parse.c
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-rm -f config/rx-parse.c
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@@ -1601,6 +1617,14 @@ config/rx-parse.c: $(srcdir)/config/rx-parse.y
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$(SHELL) $(YLWRAP) $(srcdir)/config/rx-parse.y y.tab.c $@ y.tab.h config/rx-parse.h -- $(YACCCOMPILE) -d ;
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config/rx-parse.h: config/rx-parse.c
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@true
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config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y
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$(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ;
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config/loongarch-parse.h: config/loongarch-parse.c
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@true
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config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l
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$(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE)
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config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h
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# The mips instruction table specification lexical analyzer and parser.
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@@ -1,5 +1,7 @@
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-*- text -*-
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* Add support for the LoongArch instruction set.
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* Add a command-line option, -muse-unaligned-vector-move, for x86 target
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to encode aligned vector move as unaligned vector move.
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@@ -0,0 +1,20 @@
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/* Copyright (C) 2021 Free Software Foundation, Inc.
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|
||||
This file is part of GAS, the GNU Assembler.
|
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|
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GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; see the file COPYING3. If not,
|
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "config/loongarch-lex.c"
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@@ -0,0 +1,34 @@
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/*
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Copyright (C) 2021 Free Software Foundation, Inc.
|
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|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; see the file COPYING3. If not,
|
||||
see <http://www.gnu.org/licenses/>. */
|
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|
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struct yy_buffer_state;
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struct yy_buffer_state *yy_scan_string (const char *);
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void yy_delete_buffer (struct yy_buffer_state *b);
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void get_internal_label (expressionS *label_expr,
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unsigned long label,
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int augend);
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int
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loongarch_parse_expr (const char *expr,
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struct reloc_info *reloc_stack_top,
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size_t max_reloc_num,
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size_t *reloc_num,
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offsetT *imm);
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@@ -0,0 +1,61 @@
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%option noyywrap
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/*
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Copyright (C) 2021 Free Software Foundation, Inc.
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|
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This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; see the file COPYING3. If not,
|
||||
see <http://www.gnu.org/licenses/>. */
|
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%{
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#include "as.h"
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#include "loongarch-parse.h"
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/* Flex generates static functions "input" & "unput" which are not used. */
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#define YY_NO_INPUT
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#define YY_NO_UNPUT
|
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%}
|
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|
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D [0-9]
|
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/* We consider anything greater than \x7f to be a "letter" for UTF-8
|
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support. See the lex_type array in ../read.c. */
|
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L [a-zA-Z_\.\$\x80-\xff]
|
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H [0-9A-Fa-f]
|
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|
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hex 0[xX]{H}+
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oct 0[0-7]+
|
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bin 0[bB][01]+
|
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dec ([1-9]{D}*)|0
|
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id ({D}+[fb])|({L}({D}|{L})*)|(:{dec}[bf])
|
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ws [ \t\v\f]+
|
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|
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%%
|
||||
|
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{dec} { yylval.imm = strtoull (yytext, 0, 0); return INTEGER; }
|
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{hex} { yylval.imm = strtoull (yytext + 2, 0, 16); return INTEGER; }
|
||||
{bin} { yylval.imm = strtoull (yytext + 2, 0, 2); return INTEGER; }
|
||||
{oct} { yylval.imm = strtoull (yytext + 1, 0, 8); return INTEGER; }
|
||||
{id} { yylval.c_str = strdup (yytext);return IDENTIFIER; }
|
||||
{ws} { }
|
||||
|
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">>" { return RIGHT_OP; }
|
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"<<" { return LEFT_OP; }
|
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"&&" { return AND_OP; }
|
||||
"||" { return OR_OP; }
|
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"<=" { return LE_OP; }
|
||||
">=" { return GE_OP; }
|
||||
"==" { return EQ_OP; }
|
||||
"!=" { return NE_OP; }
|
||||
. { return yytext[0];}
|
||||
|
||||
%%
|
||||
@@ -0,0 +1,441 @@
|
||||
/*
|
||||
Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; see the file COPYING3. If not,
|
||||
see <http://www.gnu.org/licenses/>. */
|
||||
%{
|
||||
#include "as.h"
|
||||
#include "loongarch-lex.h"
|
||||
#include "loongarch-parse.h"
|
||||
static void yyerror (const char *s ATTRIBUTE_UNUSED)
|
||||
{
|
||||
};
|
||||
int yylex (void);
|
||||
|
||||
|
||||
static struct reloc_info *top, *end;
|
||||
|
||||
static expressionS const_0 =
|
||||
{
|
||||
.X_op = O_constant,
|
||||
.X_add_number = 0
|
||||
};
|
||||
|
||||
static int
|
||||
is_const (struct reloc_info *info)
|
||||
{
|
||||
return (info->type == BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE
|
||||
&& info->value.X_op == O_constant);
|
||||
}
|
||||
|
||||
int
|
||||
loongarch_parse_expr (const char *expr,
|
||||
struct reloc_info *reloc_stack_top,
|
||||
size_t max_reloc_num,
|
||||
size_t *reloc_num,
|
||||
offsetT *imm)
|
||||
{
|
||||
int ret;
|
||||
struct yy_buffer_state *buffstate;
|
||||
top = reloc_stack_top;
|
||||
end = top + max_reloc_num;
|
||||
buffstate = yy_scan_string (expr);
|
||||
ret = yyparse ();
|
||||
|
||||
if (ret == 0)
|
||||
{
|
||||
if (is_const (top - 1))
|
||||
*imm = (--top)->value.X_add_number;
|
||||
else
|
||||
*imm = 0;
|
||||
*reloc_num = top - reloc_stack_top;
|
||||
}
|
||||
yy_delete_buffer (buffstate);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
emit_const (offsetT imm)
|
||||
{
|
||||
if (end <= top)
|
||||
as_fatal (_("expr too huge"));
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE;
|
||||
top->value.X_op = O_constant;
|
||||
top->value.X_add_number = imm;
|
||||
top++;
|
||||
}
|
||||
|
||||
static const char *
|
||||
my_getExpression (expressionS *ep, const char *str)
|
||||
{
|
||||
char *save_in, *ret;
|
||||
if (*str == ':')
|
||||
{
|
||||
unsigned long j;
|
||||
char *str_1 = (char *) str;
|
||||
str_1++;
|
||||
j = strtol (str_1, &str_1, 10);
|
||||
get_internal_label (ep, j, *str_1 == 'f');
|
||||
return NULL;
|
||||
}
|
||||
save_in = input_line_pointer;
|
||||
input_line_pointer = (char *)str;
|
||||
expression (ep);
|
||||
ret = input_line_pointer;
|
||||
input_line_pointer = save_in;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
reloc (const char *op_c_str, const char *id_c_str, offsetT addend)
|
||||
{
|
||||
expressionS id_sym_expr;
|
||||
|
||||
if (end <= top)
|
||||
as_fatal (_("expr too huge"));
|
||||
|
||||
if (id_c_str)
|
||||
{
|
||||
my_getExpression (&id_sym_expr, id_c_str);
|
||||
id_sym_expr.X_add_number += addend;
|
||||
}
|
||||
else
|
||||
{
|
||||
id_sym_expr.X_op = O_constant;
|
||||
id_sym_expr.X_add_number = addend;
|
||||
}
|
||||
|
||||
if (strcmp (op_c_str, "abs") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE;
|
||||
top++;
|
||||
}
|
||||
else if (strcmp (op_c_str, "pcrel") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_PCREL;
|
||||
top++;
|
||||
}
|
||||
else if (strcmp (op_c_str, "gprel") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_GPREL;
|
||||
top++;
|
||||
}
|
||||
else if (strcmp (op_c_str, "tprel") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL;
|
||||
top++;
|
||||
}
|
||||
else if (strcmp (op_c_str, "tlsgot") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT;
|
||||
top++;
|
||||
}
|
||||
else if (strcmp (op_c_str, "tlsgd") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_TLS_GD;
|
||||
top++;
|
||||
}
|
||||
else if (strcmp (op_c_str, "plt") == 0)
|
||||
{
|
||||
top->value = id_sym_expr;
|
||||
top->type = BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL;
|
||||
top++;
|
||||
}
|
||||
else
|
||||
as_fatal (_("unknown reloc hint: %s"), op_c_str);
|
||||
}
|
||||
|
||||
static void
|
||||
emit_unary (char op)
|
||||
{
|
||||
struct reloc_info *s_top = top - 1;
|
||||
if (is_const (s_top))
|
||||
{
|
||||
offsetT opr = s_top->value.X_add_number;
|
||||
switch (op)
|
||||
{
|
||||
case '+':
|
||||
break;
|
||||
case '-':
|
||||
opr = -opr;
|
||||
break;
|
||||
case '~':
|
||||
opr = ~opr;
|
||||
break;
|
||||
case '!':
|
||||
opr = !opr;
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
s_top->value.X_add_number = opr;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (end <= top)
|
||||
as_fatal (_("expr too huge"));
|
||||
switch (op)
|
||||
{
|
||||
case '!':
|
||||
top->type = BFD_RELOC_LARCH_SOP_NOT;
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
top->value = const_0;
|
||||
top++;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
emit_bin (int op)
|
||||
{
|
||||
struct reloc_info *last_1st = top - 1, *last_2nd = top - 2;
|
||||
if (is_const (last_1st) && is_const (last_2nd))
|
||||
{
|
||||
offsetT opr1 = last_2nd->value.X_add_number;
|
||||
offsetT opr2 = last_1st->value.X_add_number;
|
||||
switch (op)
|
||||
{
|
||||
case '*':
|
||||
opr1 = opr1 * opr2;
|
||||
break;
|
||||
case '/':
|
||||
opr1 = opr1 / opr2;
|
||||
break;
|
||||
case '%':
|
||||
opr1 = opr1 % opr2;
|
||||
break;
|
||||
case '+':
|
||||
opr1 = opr1 + opr2;
|
||||
break;
|
||||
case '-':
|
||||
opr1 = opr1 - opr2;
|
||||
break;
|
||||
case LEFT_OP:
|
||||
opr1 = opr1 << opr2;
|
||||
break;
|
||||
case RIGHT_OP:
|
||||
/* Algorithm right shift. */
|
||||
opr1 = (offsetT)opr1 >> (offsetT)opr2;
|
||||
break;
|
||||
case '<':
|
||||
opr1 = opr1 < opr2;
|
||||
break;
|
||||
case '>':
|
||||
opr1 = opr1 > opr2;
|
||||
break;
|
||||
case LE_OP:
|
||||
opr1 = opr1 <= opr2;
|
||||
break;
|
||||
case GE_OP:
|
||||
opr1 = opr1 >= opr2;
|
||||
break;
|
||||
case EQ_OP:
|
||||
opr1 = opr1 == opr2;
|
||||
break;
|
||||
case NE_OP:
|
||||
opr1 = opr1 != opr2;
|
||||
break;
|
||||
case '&':
|
||||
opr1 = opr1 & opr2;
|
||||
break;
|
||||
case '^':
|
||||
opr1 = opr1 ^ opr2;
|
||||
break;
|
||||
case '|':
|
||||
opr1 = opr1 | opr2;
|
||||
break;
|
||||
case AND_OP:
|
||||
opr1 = opr1 && opr2;
|
||||
break;
|
||||
case OR_OP:
|
||||
opr1 = opr1 || opr2;
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
last_2nd->value.X_add_number = opr1;
|
||||
last_1st->type = 0;
|
||||
top--;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (end <= top)
|
||||
as_fatal (_("expr too huge"));
|
||||
switch (op)
|
||||
{
|
||||
case '+':
|
||||
top->type = BFD_RELOC_LARCH_SOP_ADD;
|
||||
break;
|
||||
case '-':
|
||||
top->type = BFD_RELOC_LARCH_SOP_SUB;
|
||||
break;
|
||||
case LEFT_OP:
|
||||
top->type = BFD_RELOC_LARCH_SOP_SL;
|
||||
break;
|
||||
case RIGHT_OP:
|
||||
top->type = BFD_RELOC_LARCH_SOP_SR;
|
||||
break;
|
||||
case '&':
|
||||
top->type = BFD_RELOC_LARCH_SOP_AND;
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
top->value = const_0;
|
||||
top++;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
emit_if_else (void)
|
||||
{
|
||||
struct reloc_info *last_1st = top - 1;
|
||||
struct reloc_info *last_2nd = top - 2;
|
||||
struct reloc_info *last_3rd = top - 3;
|
||||
if (is_const (last_1st) && is_const (last_2nd) && is_const (last_3rd))
|
||||
{
|
||||
offsetT opr1 = last_3rd->value.X_add_number;
|
||||
offsetT opr2 = last_2nd->value.X_add_number;
|
||||
offsetT opr3 = last_1st->value.X_add_number;
|
||||
opr1 = opr1 ? opr2 : opr3;
|
||||
last_3rd->value.X_add_number = opr1;
|
||||
last_2nd->type = 0;
|
||||
last_1st->type = 0;
|
||||
top -= 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (end <= top)
|
||||
as_fatal (_("expr too huge"));
|
||||
top->type = BFD_RELOC_LARCH_SOP_IF_ELSE;
|
||||
top->value = const_0;
|
||||
top++;
|
||||
}
|
||||
}
|
||||
|
||||
%}
|
||||
|
||||
%union {
|
||||
char *c_str;
|
||||
offsetT imm;
|
||||
}
|
||||
|
||||
%token <imm> INTEGER
|
||||
%token <c_str> IDENTIFIER
|
||||
%type <imm> addend
|
||||
|
||||
%token LEFT_OP RIGHT_OP LE_OP GE_OP EQ_OP NE_OP AND_OP OR_OP
|
||||
%start expression
|
||||
%%
|
||||
|
||||
primary_expression
|
||||
: INTEGER {emit_const ($1);}
|
||||
| '(' expression ')'
|
||||
| '%' IDENTIFIER '(' IDENTIFIER addend ')' {reloc ($2, $4, $5); free ($2); free ($4);}
|
||||
| '%' IDENTIFIER '(' INTEGER addend ')' {reloc ($2, NULL, $4 + $5); free ($2);}
|
||||
;
|
||||
|
||||
addend
|
||||
: addend '-' INTEGER {$$ -= $3;}
|
||||
| addend '+' INTEGER {$$ += $3;}
|
||||
| {$$ = 0;}
|
||||
;
|
||||
|
||||
unary_expression
|
||||
: primary_expression
|
||||
| '+' unary_expression {emit_unary ('+');}
|
||||
| '-' unary_expression {emit_unary ('-');}
|
||||
| '~' unary_expression {emit_unary ('~');}
|
||||
| '!' unary_expression {emit_unary ('!');}
|
||||
;
|
||||
|
||||
multiplicative_expression
|
||||
: unary_expression
|
||||
| multiplicative_expression '*' unary_expression {emit_bin ('*');}
|
||||
| multiplicative_expression '/' unary_expression {emit_bin ('/');}
|
||||
| multiplicative_expression '%' unary_expression {emit_bin ('%');}
|
||||
;
|
||||
|
||||
additive_expression
|
||||
: multiplicative_expression
|
||||
| additive_expression '+' multiplicative_expression {emit_bin ('+');}
|
||||
| additive_expression '-' multiplicative_expression {emit_bin ('-');}
|
||||
;
|
||||
|
||||
shift_expression
|
||||
: additive_expression
|
||||
| shift_expression LEFT_OP additive_expression {emit_bin (LEFT_OP);}
|
||||
| shift_expression RIGHT_OP additive_expression {emit_bin (RIGHT_OP);}
|
||||
;
|
||||
|
||||
relational_expression
|
||||
: shift_expression
|
||||
| relational_expression '<' shift_expression {emit_bin ('<');}
|
||||
| relational_expression '>' shift_expression {emit_bin ('>');}
|
||||
| relational_expression LE_OP shift_expression {emit_bin (LE_OP);}
|
||||
| relational_expression GE_OP shift_expression {emit_bin (GE_OP);}
|
||||
;
|
||||
|
||||
equality_expression
|
||||
: relational_expression
|
||||
| equality_expression EQ_OP relational_expression {emit_bin (EQ_OP);}
|
||||
| equality_expression NE_OP relational_expression {emit_bin (NE_OP);}
|
||||
;
|
||||
|
||||
and_expression
|
||||
: equality_expression
|
||||
| and_expression '&' equality_expression {emit_bin ('&');}
|
||||
;
|
||||
|
||||
exclusive_or_expression
|
||||
: and_expression
|
||||
| exclusive_or_expression '^' and_expression {emit_bin ('^');}
|
||||
;
|
||||
|
||||
inclusive_or_expression
|
||||
: exclusive_or_expression
|
||||
| inclusive_or_expression '|' exclusive_or_expression {emit_bin ('|');}
|
||||
;
|
||||
|
||||
logical_and_expression
|
||||
: inclusive_or_expression
|
||||
| logical_and_expression AND_OP inclusive_or_expression {emit_bin (AND_OP);}
|
||||
;
|
||||
|
||||
logical_or_expression
|
||||
: logical_and_expression
|
||||
| logical_or_expression OR_OP logical_and_expression {emit_bin (OR_OP);}
|
||||
;
|
||||
|
||||
conditional_expression
|
||||
: logical_or_expression
|
||||
| logical_or_expression '?' expression ':' conditional_expression {emit_if_else ();}
|
||||
;
|
||||
|
||||
expression
|
||||
: conditional_expression
|
||||
;
|
||||
%%
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,91 @@
|
||||
/* tc-loongarch.h -- Header file for tc-loongarch.c.
|
||||
Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
Contributed by Loongson Ltd.
|
||||
|
||||
This file is part of GAS.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the license, or
|
||||
(at your option) any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; see the file COPYING3. If not,
|
||||
see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef TC_LOONGARCH
|
||||
#define TC_LOONGARCH
|
||||
|
||||
#define TARGET_BYTES_BIG_ENDIAN 0
|
||||
#define TARGET_ARCH bfd_arch_loongarch
|
||||
|
||||
#define WORKING_DOT_WORD 1
|
||||
#define REPEAT_CONS_EXPRESSIONS
|
||||
|
||||
/* Early than md_begin. */
|
||||
#define md_after_parse_args loongarch_after_parse_args
|
||||
extern void loongarch_after_parse_args (void);
|
||||
|
||||
extern void loongarch_pop_insert (void);
|
||||
#define md_pop_insert() loongarch_pop_insert ()
|
||||
|
||||
#define TARGET_FORMAT loongarch_target_format ()
|
||||
extern const char *loongarch_target_format (void);
|
||||
|
||||
#define md_relax_frag(segment, fragp, stretch) \
|
||||
loongarch_relax_frag (segment, fragp, stretch)
|
||||
extern int loongarch_relax_frag (asection *, struct frag *, long);
|
||||
#define md_section_align(seg, size) (size)
|
||||
#define md_undefined_symbol(name) (0)
|
||||
#define md_operand(x)
|
||||
|
||||
/* This is called to see whether a reloc against a defined symbol
|
||||
should be converted into a reloc against a section. */
|
||||
#define tc_fix_adjustable(fixp) 0
|
||||
|
||||
/* Values passed to md_apply_fix don't include symbol values. */
|
||||
#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1
|
||||
#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1
|
||||
#define DIFF_EXPR_OK 1
|
||||
|
||||
#define TARGET_USE_CFIPOP 1
|
||||
#define DWARF2_DEFAULT_RETURN_COLUMN 1 /* $ra. */
|
||||
#define DWARF2_CIE_DATA_ALIGNMENT -4
|
||||
extern int loongarch_dwarf2_addr_size (void);
|
||||
#define DWARF2_FDE_RELOC_SIZE loongarch_dwarf2_addr_size ()
|
||||
#define DWARF2_ADDR_SIZE(bfd) loongarch_dwarf2_addr_size ()
|
||||
#define CFI_DIFF_EXPR_OK 0
|
||||
|
||||
#define tc_cfi_frame_initial_instructions \
|
||||
loongarch_cfi_frame_initial_instructions
|
||||
extern void loongarch_cfi_frame_initial_instructions (void);
|
||||
|
||||
#define tc_parse_to_dw2regnum tc_loongarch_parse_to_dw2regnum
|
||||
extern void tc_loongarch_parse_to_dw2regnum (expressionS *);
|
||||
|
||||
/* A enumerated values to specific how to deal with align in '.text'.
|
||||
Now we want to fill 'andi $r0,$r0,0x0'.
|
||||
Here is the type 0, will fill andi insn later. */
|
||||
#define NOP_OPCODE (0x00)
|
||||
|
||||
#define HANDLE_ALIGN(fragp) loongarch_handle_align (fragp)
|
||||
extern void loongarch_handle_align (struct frag *);
|
||||
#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
|
||||
|
||||
#define elf_tc_final_processing loongarch_elf_final_processing
|
||||
extern void loongarch_elf_final_processing (void);
|
||||
|
||||
#define MAX_RELOC_NUMBER_A_INSN 20
|
||||
|
||||
struct reloc_info
|
||||
{
|
||||
bfd_reloc_code_real_type type;
|
||||
expressionS value;
|
||||
};
|
||||
|
||||
#endif
|
||||
Vendored
+17
@@ -12207,6 +12207,23 @@ _ACEOF
|
||||
using_cgen=yes
|
||||
;;
|
||||
|
||||
loongarch)
|
||||
for f in config/loongarch-parse.o config/loongarch-lex-wrapper.o; do
|
||||
case " $extra_objects " in
|
||||
*" $f "*) ;;
|
||||
*) extra_objects="$extra_objects $f" ;;
|
||||
esac
|
||||
done
|
||||
# --target=loongarch[32|64]-*-*. */
|
||||
if test $this_target = $target ; then
|
||||
|
||||
cat >>confdefs.h <<_ACEOF
|
||||
#define DEFAULT_ARCH "${arch}"
|
||||
_ACEOF
|
||||
|
||||
fi
|
||||
;;
|
||||
|
||||
m32c)
|
||||
using_cgen=yes
|
||||
;;
|
||||
|
||||
@@ -446,6 +446,19 @@ changequote([,])dnl
|
||||
using_cgen=yes
|
||||
;;
|
||||
|
||||
loongarch)
|
||||
for f in config/loongarch-parse.o config/loongarch-lex-wrapper.o; do
|
||||
case " $extra_objects " in
|
||||
*" $f "*) ;;
|
||||
*) extra_objects="$extra_objects $f" ;;
|
||||
esac
|
||||
done
|
||||
# --target=loongarch[32|64]-*-*. */
|
||||
if test $this_target = $target ; then
|
||||
AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
|
||||
fi
|
||||
;;
|
||||
|
||||
m32c)
|
||||
using_cgen=yes
|
||||
;;
|
||||
|
||||
+5
-1
@@ -67,6 +67,8 @@ case ${cpu} in
|
||||
ip2k) cpu_type=ip2k endian=big ;;
|
||||
iq2000) cpu_type=iq2000 endian=big ;;
|
||||
lm32) cpu_type=lm32 ;;
|
||||
loongarch32) cpu_type=loongarch arch=loongarch32;;
|
||||
loongarch64) cpu_type=loongarch arch=loongarch64;;
|
||||
m32c) cpu_type=m32c endian=little ;;
|
||||
m32r) cpu_type=m32r endian=big ;;
|
||||
m32rle) cpu_type=m32r endian=little ;;
|
||||
@@ -277,6 +279,8 @@ case ${generic_target} in
|
||||
|
||||
lm32-*-*) fmt=elf ;;
|
||||
|
||||
loongarch*) fmt=elf ;;
|
||||
|
||||
m32c-*-elf) fmt=elf ;;
|
||||
|
||||
m32r-*-elf*) fmt=elf ;;
|
||||
@@ -443,7 +447,7 @@ esac
|
||||
|
||||
case ${cpu_type} in
|
||||
aarch64 | alpha | arm | csky | i386 | ia64 | microblaze | mips | ns32k | \
|
||||
or1k | or1knd | pdp11 | ppc | riscv | sh | sparc | z80 | z8k)
|
||||
or1k | or1knd | pdp11 | ppc | riscv | sh | sparc | z80 | z8k | loongarch)
|
||||
bfd_gas=yes
|
||||
;;
|
||||
esac
|
||||
|
||||
@@ -379,6 +379,11 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
|
||||
@emph{Target IP2K options:}
|
||||
[@b{-mip2022}|@b{-mip2022ext}]
|
||||
@end ifset
|
||||
@ifset LOONGARCH
|
||||
|
||||
@emph{Target LOONGARCH options:}
|
||||
[@b{-fpic}|@b{-fPIC}|@b{-fno-pic}]
|
||||
@end ifset
|
||||
@ifset M32C
|
||||
|
||||
@emph{Target M32C options:}
|
||||
@@ -1756,6 +1761,25 @@ Assemble for a little endian target.
|
||||
@end ifset
|
||||
@c man end
|
||||
|
||||
@ifset LOONGARCH
|
||||
|
||||
@ifclear man
|
||||
@xref{LoongArch-Options}, for the options available when @value{AS} is configured
|
||||
for a LoongArch processor.
|
||||
@end ifclear
|
||||
|
||||
@ifset man
|
||||
@c man begin OPTIONS
|
||||
The following options are available when @value{AS} is configured for a
|
||||
LoongArch processor.
|
||||
@c man end
|
||||
@c man begin INCLUDE
|
||||
@include c-loongarch.texi
|
||||
@c ended inside the included file
|
||||
@end ifset
|
||||
|
||||
@end ifset
|
||||
|
||||
@ifset METAG
|
||||
|
||||
@ifclear man
|
||||
@@ -7837,6 +7861,9 @@ subject, see the hardware manufacturer's manual.
|
||||
@ifset IP2K
|
||||
* IP2K-Dependent:: IP2K Dependent Features
|
||||
@end ifset
|
||||
@ifset LOONGARCH
|
||||
* LoongArch-Dependent:: LoongArch Dependent Features
|
||||
@end ifset
|
||||
@ifset LM32
|
||||
* LM32-Dependent:: LM32 Dependent Features
|
||||
@end ifset
|
||||
@@ -8061,6 +8088,10 @@ family.
|
||||
@include c-lm32.texi
|
||||
@end ifset
|
||||
|
||||
@ifset LOONGARCH
|
||||
@include c-loongarch.texi
|
||||
@end ifset
|
||||
|
||||
@ifset M32C
|
||||
@include c-m32c.texi
|
||||
@end ifset
|
||||
|
||||
@@ -0,0 +1,39 @@
|
||||
@c Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
@c This is part of the GAS anual.
|
||||
@c For copying conditions, see the file as.texinfo
|
||||
@c man end
|
||||
|
||||
@ifset GENERIC
|
||||
@page
|
||||
@node LoongArch-Dependent
|
||||
@chapter LoongArch Dependent Features
|
||||
@end ifset
|
||||
@ifclear GENERIC
|
||||
@node Machine Dependencies
|
||||
@chapter LoongArch Dependent Features
|
||||
@end ifclear
|
||||
|
||||
@cindex LoongArch support
|
||||
@menu
|
||||
* LoongArch-Options:: LoongArch Options
|
||||
@end menu
|
||||
|
||||
@node LoongArch-Options
|
||||
@section LoongArch Options
|
||||
|
||||
The following table lists all available LoongArch specific options.
|
||||
|
||||
@c man begin OPTIONS
|
||||
@table @gcctabopt
|
||||
|
||||
@cindex @samp{-fpic} option, LoongArch
|
||||
@item -fpic
|
||||
@itemx -fPIC
|
||||
Generate position-independent code
|
||||
|
||||
@cindex @samp{-fno-pic} option, LoongArch
|
||||
@item -fno-pic
|
||||
Don't generate position-independent code (default)
|
||||
|
||||
@end table
|
||||
@c man end
|
||||
@@ -87,6 +87,7 @@ config/tc-iq2000.c
|
||||
config/tc-iq2000.h
|
||||
config/tc-lm32.c
|
||||
config/tc-lm32.h
|
||||
config/tc-loongarch.c
|
||||
config/tc-m32c.c
|
||||
config/tc-m32c.h
|
||||
config/tc-m32r.c
|
||||
|
||||
@@ -73,7 +73,8 @@ if { ![istarget alpha*-*-*vms*]
|
||||
&& ![istarget riscv*-*-*]
|
||||
&& ![istarget rl78-*-*]
|
||||
&& ![istarget rs6000*-*-aix*]
|
||||
&& ![istarget rx-*-*] } then {
|
||||
&& ![istarget rx-*-*]
|
||||
&& ![istarget loongarch*-*-*] } then {
|
||||
gas_test_error "diff1.s" "" "difference of two undefined symbols"
|
||||
}
|
||||
|
||||
@@ -165,9 +166,11 @@ switch -glob $target_triplet {
|
||||
# symbols on relocs.
|
||||
setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*"
|
||||
setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*"
|
||||
setup_xfail "loongarch*-*-*"
|
||||
run_dump_test redef2
|
||||
setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*"
|
||||
setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*"
|
||||
setup_xfail "loongarch*-*-*"
|
||||
# rs6000-aix disallows redefinition via .comm.
|
||||
if [is_xcoff_format] {
|
||||
setup_xfail *-*-*
|
||||
|
||||
@@ -178,6 +178,7 @@ if { [is_elf_format] } then {
|
||||
rl78-*-* { }
|
||||
riscv*-*-* { }
|
||||
rx-*-* { }
|
||||
loongarch*-*-* { }
|
||||
default {
|
||||
# The next test can fail if the target does not convert fixups
|
||||
# against ordinary symbols into relocations against section symbols.
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
#as-new:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+08118820 [ ]+fmadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+4:[ ]+08218820 [ ]+fmadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+8:[ ]+08518820 [ ]+fmsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+c:[ ]+08618820 [ ]+fmsub.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+10:[ ]+08918820 [ ]+fnmadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+14:[ ]+08a18820 [ ]+fnmadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+18:[ ]+08d18820 [ ]+fnmsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+1c:[ ]+08e18820 [ ]+fnmsub.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3
|
||||
[ ]+20:[ ]+0c100820 [ ]+fcmp.caf.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+24:[ ]+0c108820 [ ]+fcmp.saf.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+28:[ ]+0c110820 [ ]+fcmp.clt.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+2c:[ ]+0c118820 [ ]+fcmp.slt.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+30:[ ]+0c118820 [ ]+fcmp.slt.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+34:[ ]+0c120820 [ ]+fcmp.ceq.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+38:[ ]+0c128820 [ ]+fcmp.seq.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+3c:[ ]+0c130820 [ ]+fcmp.cle.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+40:[ ]+0c138820 [ ]+fcmp.sle.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+44:[ ]+0c138820 [ ]+fcmp.sle.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+48:[ ]+0c140820 [ ]+fcmp.cun.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+4c:[ ]+0c148820 [ ]+fcmp.sun.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+50:[ ]+0c150820 [ ]+fcmp.cult.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+54:[ ]+0c150820 [ ]+fcmp.cult.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+58:[ ]+0c158820 [ ]+fcmp.sult.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+5c:[ ]+0c160820 [ ]+fcmp.cueq.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+60:[ ]+0c168820 [ ]+fcmp.sueq.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+64:[ ]+0c170820 [ ]+fcmp.cule.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+68:[ ]+0c170820 [ ]+fcmp.cule.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+6c:[ ]+0c178820 [ ]+fcmp.sule.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+70:[ ]+0c180820 [ ]+fcmp.cne.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+74:[ ]+0c188820 [ ]+fcmp.sne.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+78:[ ]+0c1a0820 [ ]+fcmp.cor.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+7c:[ ]+0c1a8820 [ ]+fcmp.sor.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+80:[ ]+0c1c0820 [ ]+fcmp.cune.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+84:[ ]+0c1c8820 [ ]+fcmp.sune.s [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+88:[ ]+0c200820 [ ]+fcmp.caf.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+8c:[ ]+0c208820 [ ]+fcmp.saf.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+90:[ ]+0c210820 [ ]+fcmp.clt.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+94:[ ]+0c218820 [ ]+fcmp.slt.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+98:[ ]+0c218820 [ ]+fcmp.slt.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+9c:[ ]+0c220820 [ ]+fcmp.ceq.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+a0:[ ]+0c228820 [ ]+fcmp.seq.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+a4:[ ]+0c230820 [ ]+fcmp.cle.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+a8:[ ]+0c238820 [ ]+fcmp.sle.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+ac:[ ]+0c238820 [ ]+fcmp.sle.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+b0:[ ]+0c240820 [ ]+fcmp.cun.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+b4:[ ]+0c248820 [ ]+fcmp.sun.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+b8:[ ]+0c250820 [ ]+fcmp.cult.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+bc:[ ]+0c250820 [ ]+fcmp.cult.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+c0:[ ]+0c258820 [ ]+fcmp.sult.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+c4:[ ]+0c260820 [ ]+fcmp.cueq.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+c8:[ ]+0c268820 [ ]+fcmp.sueq.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+cc:[ ]+0c270820 [ ]+fcmp.cule.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+d0:[ ]+0c270820 [ ]+fcmp.cule.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+d4:[ ]+0c278820 [ ]+fcmp.sule.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+d8:[ ]+0c280820 [ ]+fcmp.cne.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+dc:[ ]+0c288820 [ ]+fcmp.sne.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+e0:[ ]+0c2a0820 [ ]+fcmp.cor.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+e4:[ ]+0c2a8820 [ ]+fcmp.sor.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+e8:[ ]+0c2c0820 [ ]+fcmp.cune.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+ec:[ ]+0c2c8820 [ ]+fcmp.sune.d [ ]+\$fcc0, \$fa1, \$fa2
|
||||
[ ]+f0:[ ]+0d000820 [ ]+fsel[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fcc0
|
||||
@@ -0,0 +1,61 @@
|
||||
fmadd.s $f0,$f1,$f2,$f3
|
||||
fmadd.d $f0,$f1,$f2,$f3
|
||||
fmsub.s $f0,$f1,$f2,$f3
|
||||
fmsub.d $f0,$f1,$f2,$f3
|
||||
fnmadd.s $f0,$f1,$f2,$f3
|
||||
fnmadd.d $f0,$f1,$f2,$f3
|
||||
fnmsub.s $f0,$f1,$f2,$f3
|
||||
fnmsub.d $f0,$f1,$f2,$f3
|
||||
fcmp.caf.s $fcc0,$f1,$f2
|
||||
fcmp.saf.s $fcc0,$f1,$f2
|
||||
fcmp.clt.s $fcc0,$f1,$f2
|
||||
fcmp.slt.s $fcc0,$f1,$f2
|
||||
fcmp.sgt.s $fcc0,$f2,$f1
|
||||
fcmp.ceq.s $fcc0,$f1,$f2
|
||||
fcmp.seq.s $fcc0,$f1,$f2
|
||||
fcmp.cle.s $fcc0,$f1,$f2
|
||||
fcmp.sle.s $fcc0,$f1,$f2
|
||||
fcmp.sge.s $fcc0,$f2,$f1
|
||||
fcmp.cun.s $fcc0,$f1,$f2
|
||||
fcmp.sun.s $fcc0,$f1,$f2
|
||||
fcmp.cult.s $fcc0,$f1,$f2
|
||||
fcmp.cugt.s $fcc0,$f2,$f1
|
||||
fcmp.sult.s $fcc0,$f1,$f2
|
||||
fcmp.cueq.s $fcc0,$f1,$f2
|
||||
fcmp.sueq.s $fcc0,$f1,$f2
|
||||
fcmp.cule.s $fcc0,$f1,$f2
|
||||
fcmp.cuge.s $fcc0,$f2,$f1
|
||||
fcmp.sule.s $fcc0,$f1,$f2
|
||||
fcmp.cne.s $fcc0,$f1,$f2
|
||||
fcmp.sne.s $fcc0,$f1,$f2
|
||||
fcmp.cor.s $fcc0,$f1,$f2
|
||||
fcmp.sor.s $fcc0,$f1,$f2
|
||||
fcmp.cune.s $fcc0,$f1,$f2
|
||||
fcmp.sune.s $fcc0,$f1,$f2
|
||||
fcmp.caf.d $fcc0,$f1,$f2
|
||||
fcmp.saf.d $fcc0,$f1,$f2
|
||||
fcmp.clt.d $fcc0,$f1,$f2
|
||||
fcmp.slt.d $fcc0,$f1,$f2
|
||||
fcmp.sgt.d $fcc0,$f2,$f1
|
||||
fcmp.ceq.d $fcc0,$f1,$f2
|
||||
fcmp.seq.d $fcc0,$f1,$f2
|
||||
fcmp.cle.d $fcc0,$f1,$f2
|
||||
fcmp.sle.d $fcc0,$f1,$f2
|
||||
fcmp.sge.d $fcc0,$f2,$f1
|
||||
fcmp.cun.d $fcc0,$f1,$f2
|
||||
fcmp.sun.d $fcc0,$f1,$f2
|
||||
fcmp.cult.d $fcc0,$f1,$f2
|
||||
fcmp.cugt.d $fcc0,$f2,$f1
|
||||
fcmp.sult.d $fcc0,$f1,$f2
|
||||
fcmp.cueq.d $fcc0,$f1,$f2
|
||||
fcmp.sueq.d $fcc0,$f1,$f2
|
||||
fcmp.cule.d $fcc0,$f1,$f2
|
||||
fcmp.cuge.d $fcc0,$f2,$f1
|
||||
fcmp.sule.d $fcc0,$f1,$f2
|
||||
fcmp.cne.d $fcc0,$f1,$f2
|
||||
fcmp.sne.d $fcc0,$f1,$f2
|
||||
fcmp.cor.d $fcc0,$f1,$f2
|
||||
fcmp.sor.d $fcc0,$f1,$f2
|
||||
fcmp.cune.d $fcc0,$f1,$f2
|
||||
fcmp.sune.d $fcc0,$f1,$f2
|
||||
fsel $f0,$f1,$f2,$fcc0
|
||||
@@ -0,0 +1,134 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+000010a4 [ ]+clo.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+4:[ ]+000014a4 [ ]+clz.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+8:[ ]+000018a4 [ ]+cto.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+c:[ ]+00001ca4 [ ]+ctz.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+10:[ ]+000020a4 [ ]+clo.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+14:[ ]+000024a4 [ ]+clz.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+18:[ ]+000028a4 [ ]+cto.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+1c:[ ]+00002ca4 [ ]+ctz.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+20:[ ]+000030a4 [ ]+revb.2h[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+24:[ ]+000034a4 [ ]+revb.4h[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+28:[ ]+000038a4 [ ]+revb.2w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+2c:[ ]+00003ca4 [ ]+revb.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+30:[ ]+000040a4 [ ]+revh.2w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+34:[ ]+000044a4 [ ]+revh.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+38:[ ]+000048a4 [ ]+bitrev.4b[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+3c:[ ]+00004ca4 [ ]+bitrev.8b[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+40:[ ]+000050a4 [ ]+bitrev.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+44:[ ]+000054a4 [ ]+bitrev.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+48:[ ]+000058a4 [ ]+ext.w.h[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+4c:[ ]+00005ca4 [ ]+ext.w.b[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+50:[ ]+001500a4 [ ]+move[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+54:[ ]+000060a4 [ ]+rdtimel.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+58:[ ]+000064a4 [ ]+rdtimeh.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+5c:[ ]+000068a4 [ ]+rdtime.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+60:[ ]+00006ca4 [ ]+cpucfg[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+64:[ ]+000118a0 [ ]+asrtle.d[ ]+[ ]+\$a1, \$a2
|
||||
[ ]+68:[ ]+000198a0 [ ]+asrtgt.d[ ]+[ ]+\$a1, \$a2
|
||||
[ ]+6c:[ ]+000418a4 [ ]+alsl.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x1
|
||||
[ ]+70:[ ]+000598a4 [ ]+alsl.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x4
|
||||
[ ]+74:[ ]+000618a4 [ ]+alsl.wu[ ]+[ ]+\$a0, \$a1, \$a2, 0x1
|
||||
[ ]+78:[ ]+000798a4 [ ]+alsl.wu[ ]+[ ]+\$a0, \$a1, \$a2, 0x4
|
||||
[ ]+7c:[ ]+000818a4 [ ]+bytepick.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x0
|
||||
[ ]+80:[ ]+000998a4 [ ]+bytepick.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x3
|
||||
[ ]+84:[ ]+000c18a4 [ ]+bytepick.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x0
|
||||
[ ]+88:[ ]+000f98a4 [ ]+bytepick.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x7
|
||||
[ ]+8c:[ ]+001018a4 [ ]+add.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+90:[ ]+001098a4 [ ]+add.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+94:[ ]+001118a4 [ ]+sub.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+98:[ ]+001198a4 [ ]+sub.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+9c:[ ]+001218a4 [ ]+slt[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+a0:[ ]+001298a4 [ ]+sltu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+a4:[ ]+001318a4 [ ]+maskeqz[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+a8:[ ]+001398a4 [ ]+masknez[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+ac:[ ]+001418a4 [ ]+nor[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+b0:[ ]+001498a4 [ ]+and[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+b4:[ ]+001518a4 [ ]+or[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+b8:[ ]+001598a4 [ ]+xor[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+bc:[ ]+001618a4 [ ]+orn[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+c0:[ ]+001698a4 [ ]+andn[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+c4:[ ]+001718a4 [ ]+sll.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+c8:[ ]+001798a4 [ ]+srl.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+cc:[ ]+001818a4 [ ]+sra.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+d0:[ ]+001898a4 [ ]+sll.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+d4:[ ]+001918a4 [ ]+srl.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+d8:[ ]+001998a4 [ ]+sra.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+dc:[ ]+001b18a4 [ ]+rotr.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+e0:[ ]+001b98a4 [ ]+rotr.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+e4:[ ]+001c18a4 [ ]+mul.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+e8:[ ]+001c98a4 [ ]+mulh.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+ec:[ ]+001d18a4 [ ]+mulh.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+f0:[ ]+001d98a4 [ ]+mul.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+f4:[ ]+001e18a4 [ ]+mulh.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+f8:[ ]+001e98a4 [ ]+mulh.du[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+fc:[ ]+001f18a4 [ ]+mulw.d.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+100:[ ]+001f98a4 [ ]+mulw.d.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+104:[ ]+002018a4 [ ]+div.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+108:[ ]+002098a4 [ ]+mod.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+10c:[ ]+002118a4 [ ]+div.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+110:[ ]+002198a4 [ ]+mod.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+114:[ ]+002218a4 [ ]+div.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+118:[ ]+002298a4 [ ]+mod.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+11c:[ ]+002318a4 [ ]+div.du[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+120:[ ]+002398a4 [ ]+mod.du[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+124:[ ]+002418a4 [ ]+crc.w.b.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+128:[ ]+002498a4 [ ]+crc.w.h.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+12c:[ ]+002518a4 [ ]+crc.w.w.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+130:[ ]+002598a4 [ ]+crc.w.d.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+134:[ ]+002618a4 [ ]+crcc.w.b.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+138:[ ]+002698a4 [ ]+crcc.w.h.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+13c:[ ]+002718a4 [ ]+crcc.w.w.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+140:[ ]+002798a4 [ ]+crcc.w.d.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
[ ]+144:[ ]+002a0000 [ ]+break[ ]+[ ]+0x0
|
||||
[ ]+148:[ ]+002a7fff [ ]+break[ ]+[ ]+0x7fff
|
||||
[ ]+14c:[ ]+002a8000 [ ]+dbcl[ ]+[ ]+0x0
|
||||
[ ]+150:[ ]+002affff [ ]+dbcl[ ]+[ ]+0x7fff
|
||||
[ ]+154:[ ]+002c18a4 [ ]+alsl.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x1
|
||||
[ ]+158:[ ]+002d98a4 [ ]+alsl.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x4
|
||||
[ ]+15c:[ ]+004080a4 [ ]+slli.w[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+160:[ ]+004084a4 [ ]+slli.w[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+164:[ ]+0040fca4 [ ]+slli.w[ ]+[ ]+\$a0, \$a1, 0x1f
|
||||
[ ]+168:[ ]+004100a4 [ ]+slli.d[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+16c:[ ]+004104a4 [ ]+slli.d[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+170:[ ]+0041fca4 [ ]+slli.d[ ]+[ ]+\$a0, \$a1, 0x3f
|
||||
[ ]+174:[ ]+004480a4 [ ]+srli.w[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+178:[ ]+004484a4 [ ]+srli.w[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+17c:[ ]+0044fca4 [ ]+srli.w[ ]+[ ]+\$a0, \$a1, 0x1f
|
||||
[ ]+180:[ ]+004500a4 [ ]+srli.d[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+184:[ ]+004504a4 [ ]+srli.d[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+188:[ ]+0045fca4 [ ]+srli.d[ ]+[ ]+\$a0, \$a1, 0x3f
|
||||
[ ]+18c:[ ]+004880a4 [ ]+srai.w[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+190:[ ]+004884a4 [ ]+srai.w[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+194:[ ]+0048fca4 [ ]+srai.w[ ]+[ ]+\$a0, \$a1, 0x1f
|
||||
[ ]+198:[ ]+004900a4 [ ]+srai.d[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+19c:[ ]+004904a4 [ ]+srai.d[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+1a0:[ ]+0049fca4 [ ]+srai.d[ ]+[ ]+\$a0, \$a1, 0x3f
|
||||
[ ]+1a4:[ ]+004c80a4 [ ]+rotri.w[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+1a8:[ ]+004c84a4 [ ]+rotri.w[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+1ac:[ ]+004cfca4 [ ]+rotri.w[ ]+[ ]+\$a0, \$a1, 0x1f
|
||||
[ ]+1b0:[ ]+004d00a4 [ ]+rotri.d[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+1b4:[ ]+004d04a4 [ ]+rotri.d[ ]+[ ]+\$a0, \$a1, 0x1
|
||||
[ ]+1b8:[ ]+004dfca4 [ ]+rotri.d[ ]+[ ]+\$a0, \$a1, 0x3f
|
||||
[ ]+1bc:[ ]+006000a4 [ ]+bstrins.w[ ]+[ ]+\$a0, \$a1, 0x0, 0x0
|
||||
[ ]+1c0:[ ]+006204a4 [ ]+bstrins.w[ ]+[ ]+\$a0, \$a1, 0x2, 0x1
|
||||
[ ]+1c4:[ ]+007f00a4 [ ]+bstrins.w[ ]+[ ]+\$a0, \$a1, 0x1f, 0x0
|
||||
[ ]+1c8:[ ]+006080a4 [ ]+bstrpick.w[ ]+[ ]+\$a0, \$a1, 0x0, 0x0
|
||||
[ ]+1cc:[ ]+006284a4 [ ]+bstrpick.w[ ]+[ ]+\$a0, \$a1, 0x2, 0x1
|
||||
[ ]+1d0:[ ]+007f80a4 [ ]+bstrpick.w[ ]+[ ]+\$a0, \$a1, 0x1f, 0x0
|
||||
[ ]+1d4:[ ]+008000a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x0, 0x0
|
||||
[ ]+1d8:[ ]+009f04a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x1f, 0x1
|
||||
[ ]+1dc:[ ]+00a000a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x20, 0x0
|
||||
[ ]+1e0:[ ]+00bf00a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x3f, 0x0
|
||||
[ ]+1e4:[ ]+00c000a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x0, 0x0
|
||||
[ ]+1e8:[ ]+00df04a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x1f, 0x1
|
||||
[ ]+1ec:[ ]+00e000a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x20, 0x0
|
||||
[ ]+1f0:[ ]+00ff00a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x3f, 0x0
|
||||
@@ -0,0 +1,125 @@
|
||||
clo.w $r4,$r5
|
||||
clz.w $r4,$r5
|
||||
cto.w $r4,$r5
|
||||
ctz.w $r4,$r5
|
||||
clo.d $r4,$r5
|
||||
clz.d $r4,$r5
|
||||
cto.d $r4,$r5
|
||||
ctz.d $r4,$r5
|
||||
revb.2h $r4,$r5
|
||||
revb.4h $r4,$r5
|
||||
revb.2w $r4,$r5
|
||||
revb.d $r4,$r5
|
||||
revh.2w $r4,$r5
|
||||
revh.d $r4,$r5
|
||||
bitrev.4b $r4,$r5
|
||||
bitrev.8b $r4,$r5
|
||||
bitrev.w $r4,$r5
|
||||
bitrev.d $r4,$r5
|
||||
ext.w.h $r4,$r5
|
||||
ext.w.b $r4,$r5
|
||||
move $r4,$r5
|
||||
rdtimel.w $r4,$r5
|
||||
rdtimeh.w $r4,$r5
|
||||
rdtime.d $r4,$r5
|
||||
cpucfg $r4,$r5
|
||||
asrtle.d $r5,$r6
|
||||
asrtgt.d $r5,$r6
|
||||
alsl.w $r4,$r5,$r6,1
|
||||
alsl.w $r4,$r5,$r6,4
|
||||
alsl.wu $r4,$r5,$r6,1
|
||||
alsl.wu $r4,$r5,$r6,4
|
||||
bytepick.w $r4,$r5,$r6,0
|
||||
bytepick.w $r4,$r5,$r6,3
|
||||
bytepick.d $r4,$r5,$r6,0
|
||||
bytepick.d $r4,$r5,$r6,7
|
||||
add.w $r4,$r5,$r6
|
||||
add.d $r4,$r5,$r6
|
||||
sub.w $r4,$r5,$r6
|
||||
sub.d $r4,$r5,$r6
|
||||
slt $r4,$r5,$r6
|
||||
sltu $r4,$r5,$r6
|
||||
maskeqz $r4,$r5,$r6
|
||||
masknez $r4,$r5,$r6
|
||||
nor $r4,$r5,$r6
|
||||
and $r4,$r5,$r6
|
||||
or $r4,$r5,$r6
|
||||
xor $r4,$r5,$r6
|
||||
orn $r4,$r5,$r6
|
||||
andn $r4,$r5,$r6
|
||||
sll.w $r4,$r5,$r6
|
||||
srl.w $r4,$r5,$r6
|
||||
sra.w $r4,$r5,$r6
|
||||
sll.d $r4,$r5,$r6
|
||||
srl.d $r4,$r5,$r6
|
||||
sra.d $r4,$r5,$r6
|
||||
rotr.w $r4,$r5,$r6
|
||||
rotr.d $r4,$r5,$r6
|
||||
mul.w $r4,$r5,$r6
|
||||
mulh.w $r4,$r5,$r6
|
||||
mulh.wu $r4,$r5,$r6
|
||||
mul.d $r4,$r5,$r6
|
||||
mulh.d $r4,$r5,$r6
|
||||
mulh.du $r4,$r5,$r6
|
||||
mulw.d.w $r4,$r5,$r6
|
||||
mulw.d.wu $r4,$r5,$r6
|
||||
div.w $r4,$r5,$r6
|
||||
mod.w $r4,$r5,$r6
|
||||
div.wu $r4,$r5,$r6
|
||||
mod.wu $r4,$r5,$r6
|
||||
div.d $r4,$r5,$r6
|
||||
mod.d $r4,$r5,$r6
|
||||
div.du $r4,$r5,$r6
|
||||
mod.du $r4,$r5,$r6
|
||||
crc.w.b.w $r4,$r5,$r6
|
||||
crc.w.h.w $r4,$r5,$r6
|
||||
crc.w.w.w $r4,$r5,$r6
|
||||
crc.w.d.w $r4,$r5,$r6
|
||||
crcc.w.b.w $r4,$r5,$r6
|
||||
crcc.w.h.w $r4,$r5,$r6
|
||||
crcc.w.w.w $r4,$r5,$r6
|
||||
crcc.w.d.w $r4,$r5,$r6
|
||||
break 0
|
||||
break 0x7fff
|
||||
dbcl 0
|
||||
dbcl 0x7fff
|
||||
alsl.d $r4,$r5,$r6,1
|
||||
alsl.d $r4,$r5,$r6,4
|
||||
slli.w $r4,$r5,0
|
||||
slli.w $r4,$r5,1
|
||||
slli.w $r4,$r5,0x1f
|
||||
slli.d $r4,$r5,0
|
||||
slli.d $r4,$r5,1
|
||||
slli.d $r4,$r5,0x3f
|
||||
srli.w $r4,$r5,0
|
||||
srli.w $r4,$r5,1
|
||||
srli.w $r4,$r5,0x1f
|
||||
srli.d $r4,$r5,0
|
||||
srli.d $r4,$r5,1
|
||||
srli.d $r4,$r5,0x3f
|
||||
srai.w $r4,$r5,0
|
||||
srai.w $r4,$r5,1
|
||||
srai.w $r4,$r5,0x1f
|
||||
srai.d $r4,$r5,0
|
||||
srai.d $r4,$r5,1
|
||||
srai.d $r4,$r5,0x3f
|
||||
rotri.w $r4,$r5,0
|
||||
rotri.w $r4,$r5,1
|
||||
rotri.w $r4,$r5,0x1f
|
||||
rotri.d $r4,$r5,0
|
||||
rotri.d $r4,$r5,1
|
||||
rotri.d $r4,$r5,0x3f
|
||||
bstrins.w $r4,$r5,0,0
|
||||
bstrins.w $r4,$r5,2,1
|
||||
bstrins.w $r4,$r5,31,0
|
||||
bstrpick.w $r4,$r5,0,0
|
||||
bstrpick.w $r4,$r5,2,1
|
||||
bstrpick.w $r4,$r5,31,0
|
||||
bstrins.d $r4,$r5,0,0
|
||||
bstrins.d $r4,$r5,31,1
|
||||
bstrins.d $r4,$r5,32,0
|
||||
bstrins.d $r4,$r5,63,0
|
||||
bstrpick.d $r4,$r5,0,0
|
||||
bstrpick.d $r4,$r5,31,1
|
||||
bstrpick.d $r4,$r5,32,0
|
||||
bstrpick.d $r4,$r5,63,0
|
||||
@@ -0,0 +1,85 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+000 <.text>:
|
||||
[ ]+0:[ ]+01008820 [ ]+fadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+4:[ ]+01010820 [ ]+fadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+8:[ ]+01028820 [ ]+fsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+c:[ ]+01030820 [ ]+fsub.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+10:[ ]+01048820 [ ]+fmul.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+14:[ ]+01050820 [ ]+fmul.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+18:[ ]+01068820 [ ]+fdiv.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+1c:[ ]+01070820 [ ]+fdiv.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+20:[ ]+01088820 [ ]+fmax.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+24:[ ]+01090820 [ ]+fmax.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+28:[ ]+010a8820 [ ]+fmin.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+2c:[ ]+010b0820 [ ]+fmin.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+30:[ ]+010c8820 [ ]+fmaxa.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+34:[ ]+010d0820 [ ]+fmaxa.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+38:[ ]+010e8820 [ ]+fmina.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+3c:[ ]+010f0820 [ ]+fmina.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+40:[ ]+01108820 [ ]+fscaleb.s[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+44:[ ]+01110820 [ ]+fscaleb.d[ ]+[ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+48:[ ]+01128820 [ ]+fcopysign.s [ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+4c:[ ]+01130820 [ ]+fcopysign.d [ ]+\$fa0, \$fa1, \$fa2
|
||||
[ ]+50:[ ]+01140420 [ ]+fabs.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+54:[ ]+01140820 [ ]+fabs.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+58:[ ]+01141420 [ ]+fneg.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+5c:[ ]+01141820 [ ]+fneg.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+60:[ ]+01142420 [ ]+flogb.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+64:[ ]+01142820 [ ]+flogb.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+68:[ ]+01143420 [ ]+fclass.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+6c:[ ]+01143820 [ ]+fclass.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+70:[ ]+01144420 [ ]+fsqrt.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+74:[ ]+01144820 [ ]+fsqrt.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+78:[ ]+01145420 [ ]+frecip.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+7c:[ ]+01145820 [ ]+frecip.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+80:[ ]+01146420 [ ]+frsqrt.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+84:[ ]+01146820 [ ]+frsqrt.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+88:[ ]+01149420 [ ]+fmov.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+8c:[ ]+01149820 [ ]+fmov.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+90:[ ]+0114a4a0 [ ]+movgr2fr.w[ ]+[ ]+\$fa0, \$a1
|
||||
[ ]+94:[ ]+0114a8a0 [ ]+movgr2fr.d[ ]+[ ]+\$fa0, \$a1
|
||||
[ ]+98:[ ]+0114aca0 [ ]+movgr2frh.w [ ]+\$fa0, \$a1
|
||||
[ ]+9c:[ ]+0114b424 [ ]+movfr2gr.s[ ]+[ ]+\$a0, \$fa1
|
||||
[ ]+a0:[ ]+0114b824 [ ]+movfr2gr.d[ ]+[ ]+\$a0, \$fa1
|
||||
[ ]+a4:[ ]+0114bc24 [ ]+movfrh2gr.s [ ]+\$a0, \$fa1
|
||||
[ ]+a8:[ ]+0114c0a4 [ ]+movgr2fcsr[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+ac:[ ]+0114c8a4 [ ]+movfcsr2gr[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+b0:[ ]+0114d020 [ ]+movfr2cf[ ]+[ ]+\$fcc0, \$fa1
|
||||
[ ]+b4:[ ]+0114d4a0 [ ]+movcf2fr[ ]+[ ]+\$fa0, \$fcc5
|
||||
[ ]+b8:[ ]+0114d8a0 [ ]+movgr2cf[ ]+[ ]+\$fcc0, \$a1
|
||||
[ ]+bc:[ ]+0114dca4 [ ]+movcf2gr[ ]+[ ]+\$a0, \$fcc5
|
||||
[ ]+c0:[ ]+01191820 [ ]+fcvt.s.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+c4:[ ]+01192420 [ ]+fcvt.d.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+c8:[ ]+011a0420 [ ]+ftintrm.w.s [ ]+\$fa0, \$fa1
|
||||
[ ]+cc:[ ]+011a0820 [ ]+ftintrm.w.d [ ]+\$fa0, \$fa1
|
||||
[ ]+d0:[ ]+011a2420 [ ]+ftintrm.l.s [ ]+\$fa0, \$fa1
|
||||
[ ]+d4:[ ]+011a2820 [ ]+ftintrm.l.d [ ]+\$fa0, \$fa1
|
||||
[ ]+d8:[ ]+011a4420 [ ]+ftintrp.w.s [ ]+\$fa0, \$fa1
|
||||
[ ]+dc:[ ]+011a4820 [ ]+ftintrp.w.d [ ]+\$fa0, \$fa1
|
||||
[ ]+e0:[ ]+011a6420 [ ]+ftintrp.l.s [ ]+\$fa0, \$fa1
|
||||
[ ]+e4:[ ]+011a6820 [ ]+ftintrp.l.d [ ]+\$fa0, \$fa1
|
||||
[ ]+e8:[ ]+011a8420 [ ]+ftintrz.w.s [ ]+\$fa0, \$fa1
|
||||
[ ]+ec:[ ]+011a8820 [ ]+ftintrz.w.d [ ]+\$fa0, \$fa1
|
||||
[ ]+f0:[ ]+011aa420 [ ]+ftintrz.l.s [ ]+\$fa0, \$fa1
|
||||
[ ]+f4:[ ]+011aa820 [ ]+ftintrz.l.d [ ]+\$fa0, \$fa1
|
||||
[ ]+f8:[ ]+011ac420 [ ]+ftintrne.w.s[ ]+\$fa0, \$fa1
|
||||
[ ]+fc:[ ]+011ac820 [ ]+ftintrne.w.d[ ]+\$fa0, \$fa1
|
||||
[ ]+100:[ ]+011ae420 [ ]+ftintrne.l.s[ ]+\$fa0, \$fa1
|
||||
[ ]+104:[ ]+011ae820 [ ]+ftintrne.l.d[ ]+\$fa0, \$fa1
|
||||
[ ]+108:[ ]+011b0420 [ ]+ftint.w.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+10c:[ ]+011b0820 [ ]+ftint.w.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+110:[ ]+011b2420 [ ]+ftint.l.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+114:[ ]+011b2820 [ ]+ftint.l.d[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+118:[ ]+011d1020 [ ]+ffint.s.w[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+11c:[ ]+011d1820 [ ]+ffint.s.l[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+120:[ ]+011d2020 [ ]+ffint.d.w[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+124:[ ]+011d2820 [ ]+ffint.d.l[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+128:[ ]+011e4420 [ ]+frint.s[ ]+[ ]+\$fa0, \$fa1
|
||||
[ ]+12c:[ ]+011e4820 [ ]+frint.d[ ]+[ ]+\$fa0, \$fa1
|
||||
@@ -0,0 +1,76 @@
|
||||
fadd.s $f0,$f1,$f2
|
||||
fadd.d $f0,$f1,$f2
|
||||
fsub.s $f0,$f1,$f2
|
||||
fsub.d $f0,$f1,$f2
|
||||
fmul.s $f0,$f1,$f2
|
||||
fmul.d $f0,$f1,$f2
|
||||
fdiv.s $f0,$f1,$f2
|
||||
fdiv.d $f0,$f1,$f2
|
||||
fmax.s $f0,$f1,$f2
|
||||
fmax.d $f0,$f1,$f2
|
||||
fmin.s $f0,$f1,$f2
|
||||
fmin.d $f0,$f1,$f2
|
||||
fmaxa.s $f0,$f1,$f2
|
||||
fmaxa.d $f0,$f1,$f2
|
||||
fmina.s $f0,$f1,$f2
|
||||
fmina.d $f0,$f1,$f2
|
||||
fscaleb.s $f0,$f1,$f2
|
||||
fscaleb.d $f0,$f1,$f2
|
||||
fcopysign.s $f0,$f1,$f2
|
||||
fcopysign.d $f0,$f1,$f2
|
||||
fabs.s $f0,$f1
|
||||
fabs.d $f0,$f1
|
||||
fneg.s $f0,$f1
|
||||
fneg.d $f0,$f1
|
||||
flogb.s $f0,$f1
|
||||
flogb.d $f0,$f1
|
||||
fclass.s $f0,$f1
|
||||
fclass.d $f0,$f1
|
||||
fsqrt.s $f0,$f1
|
||||
fsqrt.d $f0,$f1
|
||||
frecip.s $f0,$f1
|
||||
frecip.d $f0,$f1
|
||||
frsqrt.s $f0,$f1
|
||||
frsqrt.d $f0,$f1
|
||||
fmov.s $f0,$f1
|
||||
fmov.d $f0,$f1
|
||||
movgr2fr.w $f0,$r5
|
||||
movgr2fr.d $f0,$r5
|
||||
movgr2frh.w $f0,$r5
|
||||
movfr2gr.s $r4,$f1
|
||||
movfr2gr.d $r4,$f1
|
||||
movfrh2gr.s $r4,$f1
|
||||
movgr2fcsr $r4,$r5
|
||||
movfcsr2gr $r4,$r5
|
||||
movfr2cf $fcc0,$f1
|
||||
movcf2fr $f0,$fcc5
|
||||
movgr2cf $fcc0,$r5
|
||||
movcf2gr $r4,$fcc5
|
||||
fcvt.s.d $f0,$f1
|
||||
fcvt.d.s $f0,$f1
|
||||
ftintrm.w.s $f0,$f1
|
||||
ftintrm.w.d $f0,$f1
|
||||
ftintrm.l.s $f0,$f1
|
||||
ftintrm.l.d $f0,$f1
|
||||
ftintrp.w.s $f0,$f1
|
||||
ftintrp.w.d $f0,$f1
|
||||
ftintrp.l.s $f0,$f1
|
||||
ftintrp.l.d $f0,$f1
|
||||
ftintrz.w.s $f0,$f1
|
||||
ftintrz.w.d $f0,$f1
|
||||
ftintrz.l.s $f0,$f1
|
||||
ftintrz.l.d $f0,$f1
|
||||
ftintrne.w.s $f0,$f1
|
||||
ftintrne.w.d $f0,$f1
|
||||
ftintrne.l.s $f0,$f1
|
||||
ftintrne.l.d $f0,$f1
|
||||
ftint.w.s $f0,$f1
|
||||
ftint.w.d $f0,$f1
|
||||
ftint.l.s $f0,$f1
|
||||
ftint.l.d $f0,$f1
|
||||
ffint.s.w $f0,$f1
|
||||
ffint.s.l $f0,$f1
|
||||
ffint.d.w $f0,$f1
|
||||
ffint.d.l $f0,$f1
|
||||
frint.s $f0,$f1
|
||||
frint.d $f0,$f1
|
||||
@@ -0,0 +1,48 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+020000a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+4:[ ]+021ffca4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+8:[ ]+022004a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+c:[ ]+024000a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+10:[ ]+025ffca4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+14:[ ]+026004a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+18:[ ]+028000a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+1c:[ ]+029ffca4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+20:[ ]+02a004a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+24:[ ]+02c000a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+28:[ ]+02dffca4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+2c:[ ]+02e004a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+30:[ ]+030000a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+34:[ ]+031ffca4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+38:[ ]+032004a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+3c:[ ]+034000a4 [ ]+andi[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+40:[ ]+035ffca4 [ ]+andi[ ]+[ ]+\$a0, \$a1, 0x7ff
|
||||
[ ]+44:[ ]+038000a4 [ ]+ori[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+48:[ ]+039ffca4 [ ]+ori[ ]+[ ]+\$a0, \$a1, 0x7ff
|
||||
[ ]+4c:[ ]+03c000a4 [ ]+xori[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+50:[ ]+03dffca4 [ ]+xori[ ]+[ ]+\$a0, \$a1, 0x7ff
|
||||
[ ]+54:[ ]+100000a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+58:[ ]+11fffca4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 32767\(0x7fff\)
|
||||
[ ]+5c:[ ]+120004a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, -32767\(0x8001\)
|
||||
[ ]+60:[ ]+14000004 [ ]+lu12i.w[ ]+[ ]+\$a0, 0
|
||||
[ ]+64:[ ]+14ffffe4 [ ]+lu12i.w[ ]+[ ]+\$a0, 524287\(0x7ffff\)
|
||||
[ ]+68:[ ]+17000024 [ ]+lu32i.d[ ]+[ ]+\$a0, -524287\(0x80001\)
|
||||
[ ]+6c:[ ]+18000004 [ ]+pcaddi[ ]+[ ]+\$a0, 0
|
||||
[ ]+70:[ ]+18ffffe4 [ ]+pcaddi[ ]+[ ]+\$a0, 524287\(0x7ffff\)
|
||||
[ ]+74:[ ]+19000024 [ ]+pcaddi[ ]+[ ]+\$a0, -524287\(0x80001\)
|
||||
[ ]+78:[ ]+1a000004 [ ]+pcalau12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+7c:[ ]+1affffe4 [ ]+pcalau12i[ ]+[ ]+\$a0, 524287\(0x7ffff\)
|
||||
[ ]+80:[ ]+1b000024 [ ]+pcalau12i[ ]+[ ]+\$a0, -524287\(0x80001\)
|
||||
[ ]+84:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+88:[ ]+1cffffe4 [ ]+pcaddu12i[ ]+[ ]+\$a0, 524287\(0x7ffff\)
|
||||
[ ]+8c:[ ]+1d000024 [ ]+pcaddu12i[ ]+[ ]+\$a0, -524287\(0x80001\)
|
||||
[ ]+90:[ ]+1e000004 [ ]+pcaddu18i[ ]+[ ]+\$a0, 0
|
||||
[ ]+94:[ ]+1effffe4 [ ]+pcaddu18i[ ]+[ ]+\$a0, 524287\(0x7ffff\)
|
||||
[ ]+98:[ ]+1f000024 [ ]+pcaddu18i[ ]+[ ]+\$a0, -524287\(0x80001\)
|
||||
@@ -0,0 +1,39 @@
|
||||
slti $r4,$r5,0
|
||||
slti $r4,$r5,0x7ff
|
||||
slti $r4,$r5,-0x7ff
|
||||
sltui $r4,$r5,0
|
||||
sltui $r4,$r5,0x7ff
|
||||
sltui $r4,$r5,-0x7ff
|
||||
addi.w $r4,$r5,0
|
||||
addi.w $r4,$r5,0x7ff
|
||||
addi.w $r4,$r5,-0x7ff
|
||||
addi.d $r4,$r5,0
|
||||
addi.d $r4,$r5,0x7ff
|
||||
addi.d $r4,$r5,-0x7ff
|
||||
lu52i.d $r4,$r5,0
|
||||
lu52i.d $r4,$r5,0x7ff
|
||||
lu52i.d $r4,$r5,-0x7ff
|
||||
andi $r4,$r5,0
|
||||
andi $r4,$r5,0x7ff
|
||||
ori $r4,$r5,0
|
||||
ori $r4,$r5,0x7ff
|
||||
xori $r4,$r5,0
|
||||
xori $r4,$r5,0x7ff
|
||||
addu16i.d $r4,$r5,0
|
||||
addu16i.d $r4,$r5,0x7fff
|
||||
addu16i.d $r4,$r5,-0x7fff
|
||||
lu12i.w $r4,0
|
||||
lu12i.w $r4,0x7ffff
|
||||
lu32i.d $r4,-0x7ffff
|
||||
pcaddi $r4,0
|
||||
pcaddi $r4,0x7ffff
|
||||
pcaddi $r4,-0x7ffff
|
||||
pcalau12i $r4,0
|
||||
pcalau12i $r4,0x7ffff
|
||||
pcalau12i $r4,-0x7ffff
|
||||
pcaddu12i $r4,0
|
||||
pcaddu12i $r4,0x7ffff
|
||||
pcaddu12i $r4,-0x7ffff
|
||||
pcaddu18i $r4,0
|
||||
pcaddu18i $r4,0x7ffff
|
||||
pcaddu18i $r4,-0x7ffff
|
||||
@@ -0,0 +1,68 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+03400000 [ ]+andi[ ]+[ ]+\$zero, \$zero, 0x0
|
||||
[ ]+4:[ ]+60000004 [ ]+bgtz[ ]+[ ]+\$a0, 0[ ]+# 0x4
|
||||
[ ]+[ ]+[ ]+4: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+4: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+8:[ ]+64000080 [ ]+bgez[ ]+[ ]+\$a0, 0[ ]+# 0x8
|
||||
[ ]+[ ]+[ ]+8: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+8: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+c:[ ]+64000004 [ ]+blez[ ]+[ ]+\$a0, 0[ ]+# 0xc
|
||||
[ ]+[ ]+[ ]+c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+10:[ ]+40000080 [ ]+beqz[ ]+[ ]+\$a0, 0[ ]+# 0x10
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+14:[ ]+44000080 [ ]+bnez[ ]+[ ]+\$a0, 0[ ]+# 0x14
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+18:[ ]+48000000 [ ]+bceqz[ ]+[ ]+\$fcc0, 0[ ]+# 0x18
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+1c:[ ]+48000100 [ ]+bcnez[ ]+[ ]+\$fcc0, 0[ ]+# 0x1c
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+20:[ ]+4c000080 [ ]+jirl[ ]+[ ]+\$zero, \$a0, 0
|
||||
[ ]+24:[ ]+50000000 [ ]+b[ ]+[ ]+0[ ]+# 0x24
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+28:[ ]+54000000 [ ]+bl[ ]+[ ]+0[ ]+# 0x28
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+2c:[ ]+58000085 [ ]+beq[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x2c
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+30:[ ]+5c000085 [ ]+bne[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x30
|
||||
[ ]+[ ]+[ ]+30: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+30: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+34:[ ]+60000085 [ ]+blt[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x34
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+38:[ ]+600000a4 [ ]+blt[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x38
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+3c:[ ]+64000085 [ ]+bge[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x3c
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+40:[ ]+640000a4 [ ]+bge[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x40
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+44:[ ]+68000085 [ ]+bltu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x44
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+48:[ ]+680000a4 [ ]+bltu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x48
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+4c:[ ]+6c000085 [ ]+bgeu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x4c
|
||||
[ ]+[ ]+[ ]+4c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+4c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
[ ]+50:[ ]+6c0000a4 [ ]+bgeu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x50
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
|
||||
@@ -0,0 +1,22 @@
|
||||
.L1:
|
||||
nop
|
||||
bgtz $r4,L1
|
||||
bgez $r4,L1
|
||||
blez $r4,L1
|
||||
beqz $r4,L1
|
||||
bnez $r4,L1
|
||||
bceqz $fcc0,L1
|
||||
bcnez $fcc0,L1
|
||||
jr $r4
|
||||
b L1
|
||||
bl L1
|
||||
beq $r4,$r5,L1
|
||||
bne $r4,$r5,L1
|
||||
blt $r4,$r5,L1
|
||||
bgt $r4,$r5,L1
|
||||
bge $r4,$r5,L1
|
||||
ble $r4,$r5,L1
|
||||
bltu $r4,$r5,L1
|
||||
bgtu $r4,$r5,L1
|
||||
bgeu $r4,$r5,L1
|
||||
bleu $r4,$r5,L1
|
||||
@@ -0,0 +1,178 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+200000a4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+4:[ ]+203ffca4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+8:[ ]+210000a4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+c:[ ]+213ffca4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+10:[ ]+220000a4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+14:[ ]+223ffca4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+18:[ ]+230000a4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+1c:[ ]+233ffca4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+20:[ ]+240000a4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+24:[ ]+243ffca4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+28:[ ]+250000a4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+2c:[ ]+253ffca4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+30:[ ]+260000a4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+34:[ ]+263ffca4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+38:[ ]+270000a4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+3c:[ ]+273ffca4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\)
|
||||
[ ]+40:[ ]+280000a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+44:[ ]+281ffca4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+48:[ ]+282004a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+4c:[ ]+284000a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+50:[ ]+285ffca4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+54:[ ]+286004a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+58:[ ]+288000a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+5c:[ ]+289ffca4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+60:[ ]+28a004a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+64:[ ]+28c000a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+68:[ ]+28dffca4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+6c:[ ]+28e004a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+70:[ ]+290000a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+74:[ ]+291ffca4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+78:[ ]+292004a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+7c:[ ]+294000a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+80:[ ]+295ffca4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+84:[ ]+296004a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+88:[ ]+298000a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+8c:[ ]+299ffca4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+90:[ ]+29a004a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+94:[ ]+29c000a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+98:[ ]+29dffca4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+9c:[ ]+29e004a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+a0:[ ]+2a0000a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+a4:[ ]+2a1ffca4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+a8:[ ]+2a2004a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+ac:[ ]+2a4000a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+b0:[ ]+2a5ffca4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+b4:[ ]+2a6004a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+b8:[ ]+2a8000a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 0
|
||||
[ ]+bc:[ ]+2a9ffca4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+c0:[ ]+2aa004a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\)
|
||||
[ ]+c4:[ ]+2ac000a0 [ ]+preld[ ]+[ ]+0x0, \$a1, 0
|
||||
[ ]+c8:[ ]+2adffcbf [ ]+preld[ ]+[ ]+0x1f, \$a1, 2047\(0x7ff\)
|
||||
[ ]+cc:[ ]+2ae004bf [ ]+preld[ ]+[ ]+0x1f, \$a1, -2047\(0x801\)
|
||||
[ ]+d0:[ ]+2b0000a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 0
|
||||
[ ]+d4:[ ]+2b1ffca0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+d8:[ ]+2b2004a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\)
|
||||
[ ]+dc:[ ]+2b4000a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 0
|
||||
[ ]+e0:[ ]+2b5ffca0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+e4:[ ]+2b6004a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\)
|
||||
[ ]+e8:[ ]+2b8000a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 0
|
||||
[ ]+ec:[ ]+2b9ffca0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+f0:[ ]+2ba004a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\)
|
||||
[ ]+f4:[ ]+2bc000a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 0
|
||||
[ ]+f8:[ ]+2bdffca0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+fc:[ ]+2be004a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\)
|
||||
100:[ ]+380018a4 [ ]+ldx.b[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
104:[ ]+380418a4 [ ]+ldx.h[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
108:[ ]+380818a4 [ ]+ldx.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
10c:[ ]+380c18a4 [ ]+ldx.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
110:[ ]+381018a4 [ ]+stx.b[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
114:[ ]+381418a4 [ ]+stx.h[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
118:[ ]+381818a4 [ ]+stx.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
11c:[ ]+381c18a4 [ ]+stx.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
120:[ ]+382018a4 [ ]+ldx.bu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
124:[ ]+382418a4 [ ]+ldx.hu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
128:[ ]+382818a4 [ ]+ldx.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
12c:[ ]+382c18a0 [ ]+preldx[ ]+[ ]+0x0, \$a1, \$a2
|
||||
130:[ ]+382c18bf [ ]+preldx[ ]+[ ]+0x1f, \$a1, \$a2
|
||||
134:[ ]+38720000 [ ]+dbar[ ]+[ ]+0x0
|
||||
138:[ ]+38727fff [ ]+dbar[ ]+[ ]+0x7fff
|
||||
13c:[ ]+38728000 [ ]+ibar[ ]+[ ]+0x0
|
||||
140:[ ]+3872ffff [ ]+ibar[ ]+[ ]+0x7fff
|
||||
144:[ ]+386014c4 [ ]+amswap.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
148:[ ]+386018a4 [ ]+amswap.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
14c:[ ]+386094c4 [ ]+amswap.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
150:[ ]+386098a4 [ ]+amswap.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
154:[ ]+386114c4 [ ]+amadd.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
158:[ ]+386118a4 [ ]+amadd.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
15c:[ ]+386194c4 [ ]+amadd.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
160:[ ]+386198a4 [ ]+amadd.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
164:[ ]+386214c4 [ ]+amand.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
168:[ ]+386218a4 [ ]+amand.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
16c:[ ]+386294c4 [ ]+amand.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
170:[ ]+386298a4 [ ]+amand.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
174:[ ]+386314c4 [ ]+amor.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
178:[ ]+386318a4 [ ]+amor.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
17c:[ ]+386394c4 [ ]+amor.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
180:[ ]+386398a4 [ ]+amor.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
184:[ ]+386414c4 [ ]+amxor.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
188:[ ]+386418a4 [ ]+amxor.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
18c:[ ]+386494c4 [ ]+amxor.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
190:[ ]+386498a4 [ ]+amxor.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
194:[ ]+386514c4 [ ]+ammax.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
198:[ ]+386518a4 [ ]+ammax.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
19c:[ ]+386594c4 [ ]+ammax.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1a0:[ ]+386598a4 [ ]+ammax.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1a4:[ ]+386614c4 [ ]+ammin.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1a8:[ ]+386618a4 [ ]+ammin.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1ac:[ ]+386694c4 [ ]+ammin.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1b0:[ ]+386698a4 [ ]+ammin.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1b4:[ ]+386714c4 [ ]+ammax.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1b8:[ ]+386718a4 [ ]+ammax.wu[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1bc:[ ]+386794c4 [ ]+ammax.du[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1c0:[ ]+386798a4 [ ]+ammax.du[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1c4:[ ]+386814c4 [ ]+ammin.wu[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1c8:[ ]+386818a4 [ ]+ammin.wu[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1cc:[ ]+386894c4 [ ]+ammin.du[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1d0:[ ]+386898a4 [ ]+ammin.du[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1d4:[ ]+386914c4 [ ]+amswap_db.w [ ]+\$a0, \$a1, \$a2
|
||||
1d8:[ ]+386918a4 [ ]+amswap_db.w [ ]+\$a0, \$a2, \$a1
|
||||
1dc:[ ]+386994c4 [ ]+amswap_db.d [ ]+\$a0, \$a1, \$a2
|
||||
1e0:[ ]+386998a4 [ ]+amswap_db.d [ ]+\$a0, \$a2, \$a1
|
||||
1e4:[ ]+386a14c4 [ ]+amadd_db.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1e8:[ ]+386a18a4 [ ]+amadd_db.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1ec:[ ]+386a94c4 [ ]+amadd_db.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1f0:[ ]+386a98a4 [ ]+amadd_db.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1f4:[ ]+386b14c4 [ ]+amand_db.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
1f8:[ ]+386b18a4 [ ]+amand_db.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
1fc:[ ]+386b94c4 [ ]+amand_db.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
200:[ ]+386b98a4 [ ]+amand_db.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
204:[ ]+386c14c4 [ ]+amor_db.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
208:[ ]+386c18a4 [ ]+amor_db.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
20c:[ ]+386c94c4 [ ]+amor_db.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
210:[ ]+386c98a4 [ ]+amor_db.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
214:[ ]+386d14c4 [ ]+amxor_db.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
218:[ ]+386d18a4 [ ]+amxor_db.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
21c:[ ]+386d94c4 [ ]+amxor_db.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
220:[ ]+386d98a4 [ ]+amxor_db.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
224:[ ]+386e14c4 [ ]+ammax_db.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
228:[ ]+386e18a4 [ ]+ammax_db.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
22c:[ ]+386e94c4 [ ]+ammax_db.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
230:[ ]+386e98a4 [ ]+ammax_db.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
234:[ ]+386f14c4 [ ]+ammin_db.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
238:[ ]+386f18a4 [ ]+ammin_db.w[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
23c:[ ]+386f94c4 [ ]+ammin_db.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
240:[ ]+386f98a4 [ ]+ammin_db.d[ ]+[ ]+\$a0, \$a2, \$a1
|
||||
244:[ ]+387014c4 [ ]+ammax_db.wu [ ]+\$a0, \$a1, \$a2
|
||||
248:[ ]+387018a4 [ ]+ammax_db.wu [ ]+\$a0, \$a2, \$a1
|
||||
24c:[ ]+387094c4 [ ]+ammax_db.du [ ]+\$a0, \$a1, \$a2
|
||||
250:[ ]+387098a4 [ ]+ammax_db.du [ ]+\$a0, \$a2, \$a1
|
||||
254:[ ]+387114c4 [ ]+ammin_db.wu [ ]+\$a0, \$a1, \$a2
|
||||
258:[ ]+387118a4 [ ]+ammin_db.wu [ ]+\$a0, \$a2, \$a1
|
||||
25c:[ ]+387194c4 [ ]+ammin_db.du [ ]+\$a0, \$a1, \$a2
|
||||
260:[ ]+387198a4 [ ]+ammin_db.du [ ]+\$a0, \$a2, \$a1
|
||||
264:[ ]+387818a4 [ ]+ldgt.b[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
268:[ ]+387898a4 [ ]+ldgt.h[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
26c:[ ]+387918a4 [ ]+ldgt.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
270:[ ]+387998a4 [ ]+ldgt.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
274:[ ]+387a18a4 [ ]+ldle.b[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
278:[ ]+387a98a4 [ ]+ldle.h[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
27c:[ ]+387b18a4 [ ]+ldle.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
280:[ ]+387b98a4 [ ]+ldle.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
284:[ ]+387c18a4 [ ]+stgt.b[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
288:[ ]+387c98a4 [ ]+stgt.h[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
28c:[ ]+387d18a4 [ ]+stgt.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
290:[ ]+387d98a4 [ ]+stgt.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
294:[ ]+387e18a4 [ ]+stle.b[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
298:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
29c:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
2a0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2
|
||||
@@ -0,0 +1,169 @@
|
||||
ll.w $r4,$r5,0
|
||||
ll.w $r4,$r5,0x3ffc
|
||||
sc.w $r4,$r5,0
|
||||
sc.w $r4,$r5,0x3ffc
|
||||
ll.d $r4,$r5,0
|
||||
ll.d $r4,$r5,0x3ffc
|
||||
sc.d $r4,$r5,0
|
||||
sc.d $r4,$r5,0x3ffc
|
||||
ldptr.w $r4,$r5,0
|
||||
ldptr.w $r4,$r5,0x3ffc
|
||||
stptr.w $r4,$r5,0
|
||||
stptr.w $r4,$r5,0x3ffc
|
||||
ldptr.d $r4,$r5,0
|
||||
ldptr.d $r4,$r5,0x3ffc
|
||||
stptr.d $r4,$r5,0
|
||||
stptr.d $r4,$r5,0x3ffc
|
||||
ld.b $r4,$r5,0
|
||||
ld.b $r4,$r5,0x7ff
|
||||
ld.b $r4,$r5,-0x7ff
|
||||
ld.h $r4,$r5,0
|
||||
ld.h $r4,$r5,0x7ff
|
||||
ld.h $r4,$r5,-0x7ff
|
||||
ld.w $r4,$r5,0
|
||||
ld.w $r4,$r5,0x7ff
|
||||
ld.w $r4,$r5,-0x7ff
|
||||
ld.d $r4,$r5,0
|
||||
ld.d $r4,$r5,0x7ff
|
||||
ld.d $r4,$r5,-0x7ff
|
||||
st.b $r4,$r5,0
|
||||
st.b $r4,$r5,0x7ff
|
||||
st.b $r4,$r5,-0x7ff
|
||||
st.h $r4,$r5,0
|
||||
st.h $r4,$r5,0x7ff
|
||||
st.h $r4,$r5,-0x7ff
|
||||
st.w $r4,$r5,0
|
||||
st.w $r4,$r5,0x7ff
|
||||
st.w $r4,$r5,-0x7ff
|
||||
st.d $r4,$r5,0
|
||||
st.d $r4,$r5,0x7ff
|
||||
st.d $r4,$r5,-0x7ff
|
||||
ld.bu $r4,$r5,0
|
||||
ld.bu $r4,$r5,0x7ff
|
||||
ld.bu $r4,$r5,-0x7ff
|
||||
ld.hu $r4,$r5,0
|
||||
ld.hu $r4,$r5,0x7ff
|
||||
ld.hu $r4,$r5,-0x7ff
|
||||
ld.wu $r4,$r5,0
|
||||
ld.wu $r4,$r5,0x7ff
|
||||
ld.wu $r4,$r5,-0x7ff
|
||||
preld 0,$r5,0
|
||||
preld 31,$r5,0x7ff
|
||||
preld 31,$r5,-0x7ff
|
||||
fld.s $f0,$r5,0
|
||||
fld.s $f0,$r5,0x7ff
|
||||
fld.s $f0,$r5,-0x7ff
|
||||
fst.s $f0,$r5,0
|
||||
fst.s $f0,$r5,0x7ff
|
||||
fst.s $f0,$r5,-0x7ff
|
||||
fld.d $f0,$r5,0
|
||||
fld.d $f0,$r5,0x7ff
|
||||
fld.d $f0,$r5,-0x7ff
|
||||
fst.d $f0,$r5,0
|
||||
fst.d $f0,$r5,0x7ff
|
||||
fst.d $f0,$r5,-0x7ff
|
||||
ldx.b $r4,$r5,$r6
|
||||
ldx.h $r4,$r5,$r6
|
||||
ldx.w $r4,$r5,$r6
|
||||
ldx.d $r4,$r5,$r6
|
||||
stx.b $r4,$r5,$r6
|
||||
stx.h $r4,$r5,$r6
|
||||
stx.w $r4,$r5,$r6
|
||||
stx.d $r4,$r5,$r6
|
||||
ldx.bu $r4,$r5,$r6
|
||||
ldx.hu $r4,$r5,$r6
|
||||
ldx.wu $r4,$r5,$r6
|
||||
preldx 0,$r5,$r6
|
||||
preldx 31,$r5,$r6
|
||||
dbar 0
|
||||
dbar 0x7fff
|
||||
ibar 0
|
||||
ibar 0x7fff
|
||||
amswap.w $r4,$r5,$r6,0
|
||||
amswap.w $r4,$r6,$r5
|
||||
amswap.d $r4,$r5,$r6,0
|
||||
amswap.d $r4,$r6,$r5
|
||||
amadd.w $r4,$r5,$r6,0
|
||||
amadd.w $r4,$r6,$r5
|
||||
amadd.d $r4,$r5,$r6,0
|
||||
amadd.d $r4,$r6,$r5
|
||||
amand.w $r4,$r5,$r6,0
|
||||
amand.w $r4,$r6,$r5
|
||||
amand.d $r4,$r5,$r6,0
|
||||
amand.d $r4,$r6,$r5
|
||||
amor.w $r4,$r5,$r6,0
|
||||
amor.w $r4,$r6,$r5
|
||||
amor.d $r4,$r5,$r6,0
|
||||
amor.d $r4,$r6,$r5
|
||||
amxor.w $r4,$r5,$r6,0
|
||||
amxor.w $r4,$r6,$r5
|
||||
amxor.d $r4,$r5,$r6,0
|
||||
amxor.d $r4,$r6,$r5
|
||||
ammax.w $r4,$r5,$r6,0
|
||||
ammax.w $r4,$r6,$r5
|
||||
ammax.d $r4,$r5,$r6,0
|
||||
ammax.d $r4,$r6,$r5
|
||||
ammin.w $r4,$r5,$r6,0
|
||||
ammin.w $r4,$r6,$r5
|
||||
ammin.d $r4,$r5,$r6,0
|
||||
ammin.d $r4,$r6,$r5
|
||||
ammax.wu $r4,$r5,$r6,0
|
||||
ammax.wu $r4,$r6,$r5
|
||||
ammax.du $r4,$r5,$r6,0
|
||||
ammax.du $r4,$r6,$r5
|
||||
ammin.wu $r4,$r5,$r6,0
|
||||
ammin.wu $r4,$r6,$r5
|
||||
ammin.du $r4,$r5,$r6,0
|
||||
ammin.du $r4,$r6,$r5
|
||||
amswap_db.w $r4,$r5,$r6,0
|
||||
amswap_db.w $r4,$r6,$r5
|
||||
amswap_db.d $r4,$r5,$r6,0
|
||||
amswap_db.d $r4,$r6,$r5
|
||||
amadd_db.w $r4,$r5,$r6,0
|
||||
amadd_db.w $r4,$r6,$r5
|
||||
amadd_db.d $r4,$r5,$r6,0
|
||||
amadd_db.d $r4,$r6,$r5
|
||||
amand_db.w $r4,$r5,$r6,0
|
||||
amand_db.w $r4,$r6,$r5
|
||||
amand_db.d $r4,$r5,$r6,0
|
||||
amand_db.d $r4,$r6,$r5
|
||||
amor_db.w $r4,$r5,$r6,0
|
||||
amor_db.w $r4,$r6,$r5
|
||||
amor_db.d $r4,$r5,$r6,0
|
||||
amor_db.d $r4,$r6,$r5
|
||||
amxor_db.w $r4,$r5,$r6,0
|
||||
amxor_db.w $r4,$r6,$r5
|
||||
amxor_db.d $r4,$r5,$r6,0
|
||||
amxor_db.d $r4,$r6,$r5
|
||||
ammax_db.w $r4,$r5,$r6,0
|
||||
ammax_db.w $r4,$r6,$r5
|
||||
ammax_db.d $r4,$r5,$r6,0
|
||||
ammax_db.d $r4,$r6,$r5
|
||||
ammin_db.w $r4,$r5,$r6,0
|
||||
ammin_db.w $r4,$r6,$r5
|
||||
ammin_db.d $r4,$r5,$r6,0
|
||||
ammin_db.d $r4,$r6,$r5
|
||||
ammax_db.wu $r4,$r5,$r6,0
|
||||
ammax_db.wu $r4,$r6,$r5
|
||||
ammax_db.du $r4,$r5,$r6,0
|
||||
ammax_db.du $r4,$r6,$r5
|
||||
ammin_db.wu $r4,$r5,$r6,0
|
||||
ammin_db.wu $r4,$r6,$r5
|
||||
ammin_db.du $r4,$r5,$r6,0
|
||||
ammin_db.du $r4,$r6,$r5
|
||||
ldgt.b $r4,$r5,$r6
|
||||
ldgt.h $r4,$r5,$r6
|
||||
ldgt.w $r4,$r5,$r6
|
||||
ldgt.d $r4,$r5,$r6
|
||||
ldle.b $r4,$r5,$r6
|
||||
ldle.h $r4,$r5,$r6
|
||||
ldle.w $r4,$r5,$r6
|
||||
ldle.d $r4,$r5,$r6
|
||||
stgt.b $r4,$r5,$r6
|
||||
stgt.h $r4,$r5,$r6
|
||||
stgt.w $r4,$r5,$r6
|
||||
stgt.d $r4,$r5,$r6
|
||||
stle.b $r4,$r5,$r6
|
||||
stle.h $r4,$r5,$r6
|
||||
stle.w $r4,$r5,$r6
|
||||
stle.d $r4,$r5,$r6
|
||||
@@ -0,0 +1,23 @@
|
||||
# Expect script for LoongArch assembler tests.
|
||||
# Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
#
|
||||
# This file is part of the GNU Binutils.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
|
||||
# MA 02110-1301, USA.
|
||||
|
||||
if [istarget loongarch*-*-*] {
|
||||
run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
|
||||
}
|
||||
@@ -0,0 +1,733 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
#skip: loongarch32*-*-*
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0000000000000000 <.text>:
|
||||
[ ]+0:[ ]+00150004 [ ]+move[ ]+[ ]+\$a0, \$zero
|
||||
[ ]+4:[ ]+02bffc04 [ ]+addi.w[ ]+[ ]+\$a0, \$zero, -1\(0xfff\)
|
||||
[ ]+8:[ ]+00150004 [ ]+move[ ]+[ ]+\$a0, \$zero
|
||||
[ ]+c:[ ]+02bffc04 [ ]+addi.w[ ]+[ ]+\$a0, \$zero, -1\(0xfff\)
|
||||
[ ]+10:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+14:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+18:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+1c:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+20:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+20: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+24:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+28:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+2c:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+30:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+34:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+38:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+3c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+40:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+40: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+44:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+44: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+48:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+48: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+4c:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+50:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+50: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+54:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+54: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+58:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+58: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+5c:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+5c: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+60:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+60: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+64:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+64: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+64: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+64: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+64: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+64: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+64: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+68:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+6c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+6c: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x800
|
||||
[ ]+[ ]+[ ]+6c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+6c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+6c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+70:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x804
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+70: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+74:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000000
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+74: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+78:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000004
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+78: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+7c:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+7c: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000008
|
||||
[ ]+[ ]+[ ]+7c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+7c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+7c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+7c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+7c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+80:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+80: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x8000000c
|
||||
[ ]+[ ]+[ ]+80: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+80: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+80: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+84:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+88:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+88: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x800
|
||||
[ ]+[ ]+[ ]+88: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+88: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+88: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+8c:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x804
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+8c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+90:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000000
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+90: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+94:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000004
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+94: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+98:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+98: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000008
|
||||
[ ]+[ ]+[ ]+98: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+98: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+98: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+98: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+98: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+9c:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+9c: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x8000000c
|
||||
[ ]+[ ]+[ ]+9c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+9c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+9c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+a0:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+a4:[ ]+14000004 [ ]+lu12i.w[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_MARK_LA[ ]+L1
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+L1
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+a4: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+a8:[ ]+03800084 [ ]+ori[ ]+[ ]+\$a0, \$a0, 0x0
|
||||
[ ]+[ ]+[ ]+a8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+L1
|
||||
[ ]+[ ]+[ ]+a8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+a8: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+a8: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+ac:[ ]+16000004 [ ]+lu32i.d[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+ac: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+L1
|
||||
[ ]+[ ]+[ ]+ac: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+ac: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+ac: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+ac: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+ac: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+b0:[ ]+03000084 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+b0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+L1
|
||||
[ ]+[ ]+[ ]+b0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+b0: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+b0: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+b4:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+b4: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x800
|
||||
[ ]+[ ]+[ ]+b4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+b4: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+b4: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+b8:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x804
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+b8: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+bc:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+bc: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x800
|
||||
[ ]+[ ]+[ ]+bc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+bc: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+bc: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+c0:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x804
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c0: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+c4:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_PUSH_PCREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000000
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c4: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+c8:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x4
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000004
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+c8: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+cc:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+cc: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x80000008
|
||||
[ ]+[ ]+[ ]+cc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+cc: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+cc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+cc: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+cc: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+d0:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+d0: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x8000000c
|
||||
[ ]+[ ]+[ ]+d0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+d0: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+d0: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+d4:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+d8:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+d8: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+d8: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+d8: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+d8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+d8: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+d8: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+dc:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+dc: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+e0:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e0: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+e4:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e4: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+e8:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+e8: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+ec:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+ec: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+ec: R_LARCH_SOP_PUSH_GPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+ec: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+ec: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+ec: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+ec: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+f0:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+f4:[ ]+14000004 [ ]+lu12i.w[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+f4: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+f4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+f4: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+f4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+f4: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+f4: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+f8:[ ]+03800084 [ ]+ori[ ]+[ ]+\$a0, \$a0, 0x0
|
||||
[ ]+[ ]+[ ]+f8: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+f8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+f8: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+f8: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+fc:[ ]+16000004 [ ]+lu32i.d[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+fc: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+fc: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+fc: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+100:[ ]+03000084 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+100: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1
|
||||
[ ]+[ ]+[ ]+100: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+100: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+100: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+104:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+104: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+104: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+104: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+108:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+108: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+10c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+10c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+110:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+110: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+114:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+114: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+118:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1
|
||||
[ ]+[ ]+[ ]+118: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+118: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+118: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+11c:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+120:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+120: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+120: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+120: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+120: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+120: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+120: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+124:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+124: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+128:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+128: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+12c:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+12c: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+130:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+130: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+134:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+134: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+134: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+134: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+138:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
[ ]+13c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800
|
||||
[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+13c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+13c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+13c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+140:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+140: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+144:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+144: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+148:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_SUB[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_AND[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+148: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\*
|
||||
[ ]+14c:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_SL[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+14c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\*
|
||||
[ ]+150:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0
|
||||
[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c
|
||||
[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1
|
||||
[ ]+[ ]+[ ]+150: R_LARCH_SOP_ADD[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34
|
||||
[ ]+[ ]+[ ]+150: R_LARCH_SOP_SR[ ]+\*ABS\*
|
||||
[ ]+[ ]+[ ]+150: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\*
|
||||
[ ]+154:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1
|
||||
@@ -0,0 +1,29 @@
|
||||
.L1:
|
||||
li.w $r4,0
|
||||
li.w $r4,0xffffffff
|
||||
li.d $r4,0
|
||||
li.d $r4,0xffffffffffffffff
|
||||
la $r4,L1
|
||||
la.global $r4,L1
|
||||
la.global $r4,$r5,L1
|
||||
la.global $r4,L1
|
||||
la.global $r4,$r5,L1
|
||||
la.global $r4,L1
|
||||
la.global $r4,$r5,L1
|
||||
la.local $r4,L1
|
||||
la.local $r4,$r5,L1
|
||||
la.local $r4,L1
|
||||
la.local $r4,$r5,L1
|
||||
la.abs $r4,L1
|
||||
la.pcrel $r4,L1
|
||||
la.pcrel $r4,L1
|
||||
la.pcrel $r4,$r5,L1
|
||||
la.got $r4,L1
|
||||
la.got $r4,$r5,L1
|
||||
la.tls.le $r4,L1
|
||||
la.tls.ie $r4,L1
|
||||
la.tls.ie $r4,$r5,L1
|
||||
la.tls.ld $r4,L1
|
||||
la.tls.ld $r4,$r5,L1
|
||||
la.tls.gd $r4,L1
|
||||
la.tls.gd $r4,$r5,L1
|
||||
@@ -0,0 +1,10 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+000 <target>:
|
||||
[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero, \$zero, 0x0
|
||||
@@ -0,0 +1,2 @@
|
||||
target:
|
||||
nop
|
||||
@@ -0,0 +1,44 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+04000004 [ ]+csrrd[ ]+[ ]+\$a0, 0x0
|
||||
[ ]+4:[ ]+04fffc04 [ ]+csrrd[ ]+[ ]+\$a0, 0x3fff
|
||||
[ ]+8:[ ]+04000024 [ ]+csrwr[ ]+[ ]+\$a0, 0x0
|
||||
[ ]+c:[ ]+04fffc24 [ ]+csrwr[ ]+[ ]+\$a0, 0x3fff
|
||||
[ ]+10:[ ]+040000a4 [ ]+csrxchg[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+14:[ ]+04fffca4 [ ]+csrxchg[ ]+[ ]+\$a0, \$a1, 0x3fff
|
||||
[ ]+18:[ ]+060000a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 0
|
||||
[ ]+1c:[ ]+060000bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 0
|
||||
[ ]+20:[ ]+061ffca0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 2047\(0x7ff\)
|
||||
[ ]+24:[ ]+061ffcbf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 2047\(0x7ff\)
|
||||
[ ]+28:[ ]+062004a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, -2047\(0x801\)
|
||||
[ ]+2c:[ ]+062004bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, -2047\(0x801\)
|
||||
[ ]+30:[ ]+064000a4 [ ]+lddir[ ]+[ ]+\$a0, \$a1, 0x0
|
||||
[ ]+34:[ ]+0643fca4 [ ]+lddir[ ]+[ ]+\$a0, \$a1, 0xff
|
||||
[ ]+38:[ ]+064400a0 [ ]+ldpte[ ]+[ ]+\$a1, 0x0
|
||||
[ ]+3c:[ ]+0647fca0 [ ]+ldpte[ ]+[ ]+\$a1, 0xff
|
||||
[ ]+40:[ ]+064800a4 [ ]+iocsrrd.b[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+44:[ ]+064804a4 [ ]+iocsrrd.h[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+48:[ ]+064808a4 [ ]+iocsrrd.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+4c:[ ]+06480ca4 [ ]+iocsrrd.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+50:[ ]+064810a4 [ ]+iocsrwr.b[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+54:[ ]+064814a4 [ ]+iocsrwr.h[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+58:[ ]+064818a4 [ ]+iocsrwr.w[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+5c:[ ]+06481ca4 [ ]+iocsrwr.d[ ]+[ ]+\$a0, \$a1
|
||||
[ ]+60:[ ]+06482000 [ ]+tlbclr[ ]+
|
||||
[ ]+64:[ ]+06482400 [ ]+tlbflush[ ]+
|
||||
[ ]+68:[ ]+06482800 [ ]+tlbsrch[ ]+
|
||||
[ ]+6c:[ ]+06482c00 [ ]+tlbrd[ ]+
|
||||
[ ]+70:[ ]+06483000 [ ]+tlbwr[ ]+
|
||||
[ ]+74:[ ]+06483400 [ ]+tlbfill[ ]+
|
||||
[ ]+78:[ ]+06483800 [ ]+ertn[ ]+
|
||||
[ ]+7c:[ ]+06488000 [ ]+idle[ ]+[ ]+0x0
|
||||
[ ]+80:[ ]+0648ffff [ ]+idle[ ]+[ ]+0x7fff
|
||||
[ ]+84:[ ]+064998a0 [ ]+invtlb[ ]+[ ]+0x0, \$a1, \$a2
|
||||
[ ]+88:[ ]+064998bf [ ]+invtlb[ ]+[ ]+0x1f, \$a1, \$a2
|
||||
@@ -0,0 +1,35 @@
|
||||
csrrd $r4,0
|
||||
csrrd $r4,0x3fff
|
||||
csrwr $r4,0
|
||||
csrwr $r4,0x3fff
|
||||
csrxchg $r4,$r5,0
|
||||
csrxchg $r4,$r5,0x3fff
|
||||
cacop 0,$r5,0
|
||||
cacop 0x1f,$r5,0
|
||||
cacop 0,$r5,0x7ff
|
||||
cacop 0x1f,$r5,0x7ff
|
||||
cacop 0,$r5,-0x7ff
|
||||
cacop 0x1f,$r5,-0x7ff
|
||||
lddir $r4,$r5,0
|
||||
lddir $r4,$r5,0xff
|
||||
ldpte $r5,0
|
||||
ldpte $r5,0xff
|
||||
iocsrrd.b $r4,$r5
|
||||
iocsrrd.h $r4,$r5
|
||||
iocsrrd.w $r4,$r5
|
||||
iocsrrd.d $r4,$r5
|
||||
iocsrwr.b $r4,$r5
|
||||
iocsrwr.h $r4,$r5
|
||||
iocsrwr.w $r4,$r5
|
||||
iocsrwr.d $r4,$r5
|
||||
tlbclr
|
||||
tlbflush
|
||||
tlbsrch
|
||||
tlbrd
|
||||
tlbwr
|
||||
tlbfill
|
||||
ertn
|
||||
idle 0
|
||||
idle 0x7fff
|
||||
invtlb 0,$r5,$r6
|
||||
invtlb 0x1f,$r5,$r6
|
||||
@@ -0,0 +1,11 @@
|
||||
#as:
|
||||
#objdump: -dr
|
||||
|
||||
.*:[ ]+file format .*
|
||||
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000.* <.text>:
|
||||
[ ]+0:[ ]+002b0000 [ ]+syscall[ ]+[ ]+0x0
|
||||
[ ]+4:[ ]+002b7fff [ ]+syscall[ ]+[ ]+0x7fff
|
||||
@@ -0,0 +1,2 @@
|
||||
syscall 0
|
||||
syscall 0x7fff
|
||||
@@ -360,6 +360,10 @@ proc verbose_eval { expr { level 1 } } {
|
||||
# This definition is taken from an unreleased version of DejaGnu. Once
|
||||
# that version gets released, and has been out in the world for a few
|
||||
# months at least, it may be safe to delete this copy.
|
||||
|
||||
if { [istarget loongarch*-*-*] } {
|
||||
rename prune_warnings prune_warnings_other
|
||||
}
|
||||
if ![string length [info proc prune_warnings]] {
|
||||
#
|
||||
# prune_warnings -- delete various system verbosities from TEXT.
|
||||
|
||||
Reference in New Issue
Block a user