LoongArch: gas: Start a new frag after instructions that can be relaxed
For R_LARCH_TLS_{LE_HI20_R,LE_ADD_R,LD_PC_HI20,GD_PC_HI20, DESC_PC_HI20}
relocations, start a new frag to get correct eh_frame Call Frame Information
FDE DW_CFA_advance_loc info.
This commit is contained in:
committed by
liuzhensong
parent
a519d29e22
commit
7231da9099
@@ -1070,13 +1070,22 @@ append_fixp_and_insn (struct loongarch_cl_insn *ip)
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optimized away or compressed by the linker during relaxation, to prevent
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the assembler from computing static offsets across such an instruction.
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This is necessary to get correct .eh_frame cfa info. If one cfa's two
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symbol is not in the same frag, it will generate relocs to calculate
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symbol subtraction. (gas/dw2gencfi.c:output_cfi_insn:
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if (symbol_get_frag (to) == symbol_get_frag (from))) */
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This is necessary to get correct .eh_frame FDE DW_CFA_advance_loc info.
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If one cfi_insn_data's two symbols are not in the same frag, it will
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generate ADD and SUB relocations pairs to calculate DW_CFA_advance_loc.
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(gas/dw2gencfi.c: output_cfi_insn:
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if (symbol_get_frag (to) == symbol_get_frag (from)))
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For macro instructions, only the first instruction expanded from macro
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need to start a new frag. */
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if (LARCH_opts.relax
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&& (BFD_RELOC_LARCH_PCALA_HI20 == reloc_info[0].type
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|| BFD_RELOC_LARCH_GOT_PC_HI20 == reloc_info[0].type))
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|| BFD_RELOC_LARCH_GOT_PC_HI20 == reloc_info[0].type
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|| BFD_RELOC_LARCH_TLS_LE_HI20_R == reloc_info[0].type
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|| BFD_RELOC_LARCH_TLS_LE_ADD_R == reloc_info[0].type
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|| BFD_RELOC_LARCH_TLS_LD_PC_HI20 == reloc_info[0].type
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|| BFD_RELOC_LARCH_TLS_GD_PC_HI20 == reloc_info[0].type
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|| BFD_RELOC_LARCH_TLS_DESC_PC_HI20 == reloc_info[0].type))
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{
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frag_wane (frag_now);
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frag_new (0);
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@@ -0,0 +1,46 @@
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#as: -mrelax
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#objdump: -Dr -j .eh_frame
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#skip: loongarch32-*-*
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.*:[ ]+file format .*
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Disassembly of section .eh_frame:
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[ ]*0000000000000000 <.eh_frame>:
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[ ]+0:[ ]+00000014[ ]+.word[ ]+[ ]+0x00000014
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[ ]+4:[ ]+00000000[ ]+.word[ ]+[ ]+0x00000000
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[ ]+8:[ ]+00527a01[ ]+.word[ ]+[ ]+0x00527a01
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[ ]+c:[ ]+01017c01[ ]+fadd.d[ ]+\$fa1, \$fa0, \$fs7
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[ ]+10:[ ]+0c030d1b[ ]+.word[ ]+[ ]+0x0c030d1b
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[ ]+14:[ ]+00000016[ ]+.word[ ]+[ ]+0x00000016
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[ ]+18:[ ]+00000034[ ]+.word[ ]+[ ]+0x00000034
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[ ]+1c:[ ]+0000001c[ ]+.word[ ]+[ ]+0x0000001c
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[ ]+...
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[ ]+20: R_LARCH_32_PCREL[ ]+L0\^A
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[ ]+24: R_LARCH_ADD32[ ]+L0\^A
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[ ]+24: R_LARCH_SUB32[ ]+L0\^A
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[ ]+28:[ ]+0cd64000[ ]+.word[ ]+[ ]+0x0cd64000
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[ ]+29: R_LARCH_ADD6[ ]+L0\^A
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[ ]+29: R_LARCH_SUB6[ ]+L0\^A
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[ ]+2c:[ ]+d6400016[ ]+.word[ ]+[ ]+0xd6400016
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[ ]+2e: R_LARCH_ADD6[ ]+L0\^A
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[ ]+2e: R_LARCH_SUB6[ ]+L0\^A
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[ ]+30:[ ]+4000160c[ ]+beqz[ ]+\$t4, 3145748[ ]+# 300044 <L0\^A\+0x30000c>
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[ ]+33: R_LARCH_ADD6[ ]+L0\^A
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[ ]+33: R_LARCH_SUB6[ ]+L0\^A
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[ ]+34:[ ]+00160cd6[ ]+orn[ ]+\$fp, \$a2, \$sp
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[ ]+38:[ ]+160cd640[ ]+lu32i.d[ ]+\$zero, 26290
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[ ]+38: R_LARCH_ADD6[ ]+L0\^A
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[ ]+38: R_LARCH_SUB6[ ]+L0\^A
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[ ]+3c:[ ]+0cd64000[ ]+.word[ ]+[ ]+0x0cd64000
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[ ]+3d: R_LARCH_ADD6[ ]+L0\^A
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[ ]+3d: R_LARCH_SUB6[ ]+L0\^A
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[ ]+40:[ ]+d6400016[ ]+.word[ ]+[ ]+0xd6400016
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[ ]+42: R_LARCH_ADD6[ ]+L0\^A
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[ ]+42: R_LARCH_SUB6[ ]+L0\^A
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[ ]+44:[ ]+4000160c[ ]+beqz[ ]+\$t4, 3145748[ ]+# 300058 <L0\^A\+0x300020>
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[ ]+47: R_LARCH_ADD6[ ]+L0\^A
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[ ]+47: R_LARCH_SUB6[ ]+L0\^A
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[ ]+48:[ ]+000000d6[ ]+.word[ ]+[ ]+0x000000d6
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[ ]+4c:[ ]+00000000[ ]+.word[ ]+[ ]+0x00000000
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@@ -0,0 +1,33 @@
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# Emits ADD/SUB relocations for CFA FDE DW_CFA_advance_loc with -mrelax option.
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.text
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.cfi_startproc
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.cfi_def_cfa 22, 0
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la.local $t0, a
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.cfi_restore 22
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.cfi_def_cfa 22, 0
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la.got $t0, a
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.cfi_restore 22
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.cfi_def_cfa 22, 0
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la.tls.ld $t0, a
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.cfi_restore 22
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.cfi_def_cfa 22, 0
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la.tls.gd $t0, a
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.cfi_restore 22
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.cfi_def_cfa 22, 0
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la.tls.desc $t0, a
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.cfi_restore 22
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.cfi_def_cfa 22, 0
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pcalau12i $t0, %le_hi20_r(a)
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.cfi_restore 22
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.cfi_def_cfa 22, 0
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add.d $t0, $tp, $t0, %le_add_r(a)
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.cfi_restore 22
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.cfi_endproc
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