gas/testsuite:
* gas/z8k/z8k.exp: Run translate-ops test.
* gas/z8k/translate-ops.s: New file.
* gas/z8k/translate-ops.d: New file.
opcodes:
* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
non-existing opcode trtrb.
* z8k-opc.h: Regenerate.
This commit is contained in:
Christian Groessler
parent
1fe532cf60
commit
747a4ac1f4
@ -1,3 +1,9 @@
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2012-10-26 Christian Groessler <chris@groessler.org>
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* gas/z8k/z8k.exp: Run translate-ops test.
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* gas/z8k/translate-ops.s: New file.
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* gas/z8k/translate-ops.d: New file.
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2012-10-26 Alan Modra <amodra@gmail.com>
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* gas/ppc/power4.s: Fix invalid lq offsets.
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17
gas/testsuite/gas/z8k/translate-ops.d
Normal file
17
gas/testsuite/gas/z8k/translate-ops.d
Normal file
@ -0,0 +1,17 @@
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#as:
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#objdump: -dr
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#name: translate-ops
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.*: +file format coff-z8k
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Disassembly of section \.text:
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0*00000000 <\.text>:
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0: b828 0640 trdb @rr2,@rr4,r6
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4: b82c 0640 trdrb @rr2,@rr4,r6
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8: b8c0 07a0 trib @rr12,@rr10,r7
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c: b8c4 08a0 trirb @rr12,@rr10,r8
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10: b86a 0a80 trtdb @rr6,@rr8,r10
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14: b88e 034e trtdrb @rr8,@rr4,r3
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18: b8a2 0c20 trtib @rr10,@rr2,r12
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1c: b826 064e trtirb @rr2,@rr4,r6
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15
gas/testsuite/gas/z8k/translate-ops.s
Normal file
15
gas/testsuite/gas/z8k/translate-ops.s
Normal file
@ -0,0 +1,15 @@
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! translate opcodes
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.text
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.z8001
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trdb @rr2,@rr4,r6
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trdrb @rr2,@rr4,r6
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trib @rr12,@rr10,r7
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trirb @rr12,@rr10,r8
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trtdb @rr6,@rr8,r10
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trtdrb @rr8,@rr4,r3
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trtib @rr10,@rr2,r12
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trtirb @rr2,@rr4,r6
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.end
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@ -49,4 +49,8 @@ if [istarget z8k-*-*] then {
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# labels starting with register names test
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run_dump_test "reglabel"
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# translate operations
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run_dump_test "translate-ops"
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}
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@ -1,3 +1,10 @@
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2012-10-26 Christian Groessler <chris@groessler.org>
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* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
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trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
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non-existing opcode trtrb.
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* z8k-opc.h: Regenerate.
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2012-10-26 Alan Modra <amodra@gmail.com>
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* ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
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@ -3580,85 +3580,77 @@ const opcode_entry_type z8k_table[] = {
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"testl",OPC_testl,0,{CLASS_REG_LONG+(ARG_RD),},
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{CLASS_BIT+9,CLASS_BIT+0xc,CLASS_REG+(ARG_RD),CLASS_BIT+8,0,0,0,0,0,},1,2,190},
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/* 1011 1000 ddN0 1000 0000 aaaa ssN0 0000 *** trdb @rd,@rs,rba */
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/* 1011 1000 ddN0 1000 0000 rrrr ssN0 0000 *** trdb @rd,@rs,rr */
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{
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#ifdef NICENAMES
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"trdb @rd,@rs,rba",8,25,0x1c,
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"trdb @rd,@rs,rr",8,25,0x04,
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#endif
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"trdb",OPC_trdb,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_BYTE+(ARG_RA),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RD),CLASS_BIT+8,CLASS_BIT+0,CLASS_REG+(ARG_RA),CLASS_REGN0+(ARG_RS),CLASS_BIT+0,0,},3,4,191},
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"trdb",OPC_trdb,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RD),CLASS_BIT+8,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RS),CLASS_BIT+0,0,},3,4,191},
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/* 1011 1000 ddN0 1100 0000 aaaa ssN0 0000 *** trdrb @rd,@rs,rba */
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/* 1011 1000 ddN0 1100 0000 rrrr ssN0 0000 *** trdrb @rd,@rs,rr */
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{
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#ifdef NICENAMES
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"trdrb @rd,@rs,rba",8,25,0x1c,
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"trdrb @rd,@rs,rr",8,25,0x04,
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#endif
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"trdrb",OPC_trdrb,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_BYTE+(ARG_RA),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RD),CLASS_BIT+0xc,CLASS_BIT+0,CLASS_REG+(ARG_RA),CLASS_REGN0+(ARG_RS),CLASS_BIT+0,0,},3,4,192},
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"trdrb",OPC_trdrb,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RD),CLASS_BIT+0xc,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RS),CLASS_BIT+0,0,},3,4,192},
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/* 1011 1000 ddN0 0000 0000 rrrr ssN0 0000 *** trib @rd,@rs,rbr */
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/* 1011 1000 ddN0 0000 0000 rrrr ssN0 0000 *** trib @rd,@rs,rr */
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{
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#ifdef NICENAMES
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"trib @rd,@rs,rbr",8,25,0x1c,
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"trib @rd,@rs,rr",8,25,0x04,
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#endif
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"trib",OPC_trib,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_BYTE+(ARG_RR),},
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"trib",OPC_trib,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RD),CLASS_BIT+0,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RS),CLASS_BIT+0,0,},3,4,193},
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/* 1011 1000 ddN0 0100 0000 rrrr ssN0 0000 *** trirb @rd,@rs,rbr */
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/* 1011 1000 ddN0 0100 0000 rrrr ssN0 0000 *** trirb @rd,@rs,rr */
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{
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#ifdef NICENAMES
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"trirb @rd,@rs,rbr",8,25,0x1c,
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"trirb @rd,@rs,rr",8,25,0x04,
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#endif
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"trirb",OPC_trirb,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_BYTE+(ARG_RR),},
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"trirb",OPC_trirb,0,{CLASS_IR+(ARG_RD),CLASS_IR+(ARG_RS),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RD),CLASS_BIT+4,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RS),CLASS_BIT+0,0,},3,4,194},
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/* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtdb @ra,@rb,rbr */
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/* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtdb @ra,@rb,rr */
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{
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#ifdef NICENAMES
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"trtdb @ra,@rb,rbr",8,25,0x1c,
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"trtdb @ra,@rb,rr",8,25,0x14,
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#endif
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"trtdb",OPC_trtdb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_BYTE+(ARG_RR),},
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"trtdb",OPC_trtdb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RA),CLASS_BIT+0xa,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RB),CLASS_BIT+0,0,},3,4,195},
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/* 1011 1000 aaN0 1110 0000 rrrr bbN0 1110 *** trtdrb @ra,@rb,rbr */
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/* 1011 1000 aaN0 1110 0000 rrrr bbN0 1110 *** trtdrb @ra,@rb,rr */
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{
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#ifdef NICENAMES
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"trtdrb @ra,@rb,rbr",8,25,0x1c,
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"trtdrb @ra,@rb,rr",8,25,0x14,
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#endif
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"trtdrb",OPC_trtdrb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_BYTE+(ARG_RR),},
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"trtdrb",OPC_trtdrb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RA),CLASS_BIT+0xe,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RB),CLASS_BIT+0xe,0,},3,4,196},
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/* 1011 1000 aaN0 0010 0000 rrrr bbN0 0000 *** trtib @ra,@rb,rbr */
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/* 1011 1000 aaN0 0010 0000 rrrr bbN0 0000 *** trtib @ra,@rb,rr */
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{
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#ifdef NICENAMES
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"trtib @ra,@rb,rbr",8,25,0x1c,
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"trtib @ra,@rb,rr",8,25,0x14,
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#endif
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"trtib",OPC_trtib,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_BYTE+(ARG_RR),},
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"trtib",OPC_trtib,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RA),CLASS_BIT+2,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RB),CLASS_BIT+0,0,},3,4,197},
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/* 1011 1000 aaN0 0110 0000 rrrr bbN0 1110 *** trtirb @ra,@rb,rbr */
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/* 1011 1000 aaN0 0110 0000 rrrr bbN0 1110 *** trtirb @ra,@rb,rr */
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{
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#ifdef NICENAMES
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"trtirb @ra,@rb,rbr",8,25,0x1c,
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"trtirb @ra,@rb,rr",8,25,0x14,
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#endif
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"trtirb",OPC_trtirb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_BYTE+(ARG_RR),},
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"trtirb",OPC_trtirb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_WORD+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RA),CLASS_BIT+6,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RB),CLASS_BIT+0xe,0,},3,4,198},
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/* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtrb @ra,@rb,rbr */
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{
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#ifdef NICENAMES
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"trtrb @ra,@rb,rbr",8,25,0x1c,
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#endif
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"trtrb",OPC_trtrb,0,{CLASS_IR+(ARG_RA),CLASS_IR+(ARG_RB),CLASS_REG_BYTE+(ARG_RR),},
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{CLASS_BIT+0xb,CLASS_BIT+8,CLASS_REGN0+(ARG_RA),CLASS_BIT+0xa,CLASS_BIT+0,CLASS_REG+(ARG_RR),CLASS_REGN0+(ARG_RB),CLASS_BIT+0,0,},3,4,199},
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/* 0000 1101 ddN0 0110 *** tset @rd */
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{
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#ifdef NICENAMES
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"tset @rd",16,11,0x08,
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#endif
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"tset",OPC_tset,0,{CLASS_IR+(ARG_RD),},
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{CLASS_BIT+0,CLASS_BIT+0xd,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,200},
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{CLASS_BIT+0,CLASS_BIT+0xd,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,199},
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/* 0100 1101 0000 0110 address_dst *** tset address_dst */
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{
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@ -3666,7 +3658,7 @@ const opcode_entry_type z8k_table[] = {
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"tset address_dst",16,14,0x08,
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#endif
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"tset",OPC_tset,0,{CLASS_DA+(ARG_DST),},
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{CLASS_BIT+4,CLASS_BIT+0xd,CLASS_BIT+0,CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,200},
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{CLASS_BIT+4,CLASS_BIT+0xd,CLASS_BIT+0,CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,199},
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/* 0100 1101 ddN0 0110 address_dst *** tset address_dst(rd) */
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{
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@ -3674,7 +3666,7 @@ const opcode_entry_type z8k_table[] = {
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"tset address_dst(rd)",16,15,0x08,
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#endif
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"tset",OPC_tset,0,{CLASS_X+(ARG_RD),},
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{CLASS_BIT+4,CLASS_BIT+0xd,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,200},
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{CLASS_BIT+4,CLASS_BIT+0xd,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,199},
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/* 1000 1101 dddd 0110 *** tset rd */
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{
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@ -3682,7 +3674,7 @@ const opcode_entry_type z8k_table[] = {
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"tset rd",16,7,0x08,
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#endif
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"tset",OPC_tset,0,{CLASS_REG_WORD+(ARG_RD),},
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{CLASS_BIT+8,CLASS_BIT+0xd,CLASS_REG+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,200},
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{CLASS_BIT+8,CLASS_BIT+0xd,CLASS_REG+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,199},
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/* 0000 1100 ddN0 0110 *** tsetb @rd */
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{
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@ -3690,7 +3682,7 @@ const opcode_entry_type z8k_table[] = {
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"tsetb @rd",8,11,0x08,
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#endif
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"tsetb",OPC_tsetb,0,{CLASS_IR+(ARG_RD),},
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{CLASS_BIT+0,CLASS_BIT+0xc,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,201},
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{CLASS_BIT+0,CLASS_BIT+0xc,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,200},
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/* 0100 1100 0000 0110 address_dst *** tsetb address_dst */
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{
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@ -3698,7 +3690,7 @@ const opcode_entry_type z8k_table[] = {
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"tsetb address_dst",8,14,0x08,
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#endif
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"tsetb",OPC_tsetb,0,{CLASS_DA+(ARG_DST),},
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{CLASS_BIT+4,CLASS_BIT+0xc,CLASS_BIT+0,CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,201},
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{CLASS_BIT+4,CLASS_BIT+0xc,CLASS_BIT+0,CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,200},
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/* 0100 1100 ddN0 0110 address_dst *** tsetb address_dst(rd) */
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{
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@ -3706,7 +3698,7 @@ const opcode_entry_type z8k_table[] = {
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"tsetb address_dst(rd)",8,15,0x08,
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#endif
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"tsetb",OPC_tsetb,0,{CLASS_X+(ARG_RD),},
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{CLASS_BIT+4,CLASS_BIT+0xc,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,201},
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{CLASS_BIT+4,CLASS_BIT+0xc,CLASS_REGN0+(ARG_RD),CLASS_BIT+6,CLASS_ADDRESS+(ARG_DST),0,0,0,0,},1,4,200},
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/* 1000 1100 dddd 0110 *** tsetb rbd */
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{
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@ -3714,7 +3706,7 @@ const opcode_entry_type z8k_table[] = {
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"tsetb rbd",8,7,0x08,
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#endif
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"tsetb",OPC_tsetb,0,{CLASS_REG_BYTE+(ARG_RD),},
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{CLASS_BIT+8,CLASS_BIT+0xc,CLASS_REG+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,201},
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{CLASS_BIT+8,CLASS_BIT+0xc,CLASS_REG+(ARG_RD),CLASS_BIT+6,0,0,0,0,0,},1,2,200},
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/* 0000 1001 ssN0 dddd *** xor rd,@rs */
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{
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@ -3722,7 +3714,7 @@ const opcode_entry_type z8k_table[] = {
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"xor rd,@rs",16,7,0x18,
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#endif
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"xor",OPC_xor,0,{CLASS_REG_WORD+(ARG_RD),CLASS_IR+(ARG_RS),},
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{CLASS_BIT+0,CLASS_BIT+9,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,202},
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{CLASS_BIT+0,CLASS_BIT+9,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,201},
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/* 0100 1001 0000 dddd address_src *** xor rd,address_src */
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{
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@ -3730,7 +3722,7 @@ const opcode_entry_type z8k_table[] = {
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"xor rd,address_src",16,9,0x18,
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#endif
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"xor",OPC_xor,0,{CLASS_REG_WORD+(ARG_RD),CLASS_DA+(ARG_SRC),},
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{CLASS_BIT+4,CLASS_BIT+9,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,202},
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{CLASS_BIT+4,CLASS_BIT+9,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,201},
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/* 0100 1001 ssN0 dddd address_src *** xor rd,address_src(rs) */
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{
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@ -3738,7 +3730,7 @@ const opcode_entry_type z8k_table[] = {
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"xor rd,address_src(rs)",16,10,0x18,
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#endif
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"xor",OPC_xor,0,{CLASS_REG_WORD+(ARG_RD),CLASS_X+(ARG_RS),},
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{CLASS_BIT+4,CLASS_BIT+9,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,202},
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{CLASS_BIT+4,CLASS_BIT+9,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,201},
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/* 0000 1001 0000 dddd imm16 *** xor rd,imm16 */
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{
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@ -3746,7 +3738,7 @@ const opcode_entry_type z8k_table[] = {
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"xor rd,imm16",16,7,0x18,
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#endif
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"xor",OPC_xor,0,{CLASS_REG_WORD+(ARG_RD),CLASS_IMM+(ARG_IMM16),},
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{CLASS_BIT+0,CLASS_BIT+9,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_IMM+(ARG_IMM16),0,0,0,0,},2,4,202},
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{CLASS_BIT+0,CLASS_BIT+9,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_IMM+(ARG_IMM16),0,0,0,0,},2,4,201},
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/* 1000 1001 ssss dddd *** xor rd,rs */
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{
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@ -3754,7 +3746,7 @@ const opcode_entry_type z8k_table[] = {
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"xor rd,rs",16,4,0x18,
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#endif
|
||||
"xor",OPC_xor,0,{CLASS_REG_WORD+(ARG_RD),CLASS_REG_WORD+(ARG_RS),},
|
||||
{CLASS_BIT+8,CLASS_BIT+9,CLASS_REG+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,202},
|
||||
{CLASS_BIT+8,CLASS_BIT+9,CLASS_REG+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,201},
|
||||
|
||||
/* 0000 1000 ssN0 dddd *** xorb rbd,@rs */
|
||||
{
|
||||
@ -3762,7 +3754,7 @@ const opcode_entry_type z8k_table[] = {
|
||||
"xorb rbd,@rs",8,7,0x1c,
|
||||
#endif
|
||||
"xorb",OPC_xorb,0,{CLASS_REG_BYTE+(ARG_RD),CLASS_IR+(ARG_RS),},
|
||||
{CLASS_BIT+0,CLASS_BIT+8,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,203},
|
||||
{CLASS_BIT+0,CLASS_BIT+8,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,202},
|
||||
|
||||
/* 0100 1000 0000 dddd address_src *** xorb rbd,address_src */
|
||||
{
|
||||
@ -3770,7 +3762,7 @@ const opcode_entry_type z8k_table[] = {
|
||||
"xorb rbd,address_src",8,9,0x1c,
|
||||
#endif
|
||||
"xorb",OPC_xorb,0,{CLASS_REG_BYTE+(ARG_RD),CLASS_DA+(ARG_SRC),},
|
||||
{CLASS_BIT+4,CLASS_BIT+8,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,203},
|
||||
{CLASS_BIT+4,CLASS_BIT+8,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,202},
|
||||
|
||||
/* 0100 1000 ssN0 dddd address_src *** xorb rbd,address_src(rs) */
|
||||
{
|
||||
@ -3778,7 +3770,7 @@ const opcode_entry_type z8k_table[] = {
|
||||
"xorb rbd,address_src(rs)",8,10,0x1c,
|
||||
#endif
|
||||
"xorb",OPC_xorb,0,{CLASS_REG_BYTE+(ARG_RD),CLASS_X+(ARG_RS),},
|
||||
{CLASS_BIT+4,CLASS_BIT+8,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,203},
|
||||
{CLASS_BIT+4,CLASS_BIT+8,CLASS_REGN0+(ARG_RS),CLASS_REG+(ARG_RD),CLASS_ADDRESS+(ARG_SRC),0,0,0,0,},2,4,202},
|
||||
|
||||
/* 0000 1000 0000 dddd imm8 imm8 *** xorb rbd,imm8 */
|
||||
{
|
||||
@ -3786,7 +3778,7 @@ const opcode_entry_type z8k_table[] = {
|
||||
"xorb rbd,imm8",8,7,0x1c,
|
||||
#endif
|
||||
"xorb",OPC_xorb,0,{CLASS_REG_BYTE+(ARG_RD),CLASS_IMM+(ARG_IMM8),},
|
||||
{CLASS_BIT+0,CLASS_BIT+8,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_IMM+(ARG_IMM8),CLASS_IMM+(ARG_IMM8),0,0,0,},2,4,203},
|
||||
{CLASS_BIT+0,CLASS_BIT+8,CLASS_BIT+0,CLASS_REG+(ARG_RD),CLASS_IMM+(ARG_IMM8),CLASS_IMM+(ARG_IMM8),0,0,0,},2,4,202},
|
||||
|
||||
/* 1000 1000 ssss dddd *** xorb rbd,rbs */
|
||||
{
|
||||
@ -3794,7 +3786,7 @@ const opcode_entry_type z8k_table[] = {
|
||||
"xorb rbd,rbs",8,4,0x1c,
|
||||
#endif
|
||||
"xorb",OPC_xorb,0,{CLASS_REG_BYTE+(ARG_RD),CLASS_REG_BYTE+(ARG_RS),},
|
||||
{CLASS_BIT+8,CLASS_BIT+8,CLASS_REG+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,203},
|
||||
{CLASS_BIT+8,CLASS_BIT+8,CLASS_REG+(ARG_RS),CLASS_REG+(ARG_RD),0,0,0,0,0,},2,2,202},
|
||||
|
||||
/* end marker */
|
||||
{
|
||||
|
||||
@ -514,15 +514,14 @@ static struct op opt[] =
|
||||
{"-ZS---", 17, 32, "0101 1100 ddN0 1000 address_dst", "testl address_dst(rd)", 0},
|
||||
{"-ZS---", 13, 32, "1001 1100 dddd 1000", "testl rrd", 0},
|
||||
|
||||
{"-ZSV--", 25, 8, "1011 1000 ddN0 1000 0000 aaaa ssN0 0000", "trdb @rd,@rs,rba", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 ddN0 1100 0000 aaaa ssN0 0000", "trdrb @rd,@rs,rba", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 ddN0 0000 0000 rrrr ssN0 0000", "trib @rd,@rs,rbr", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 ddN0 0100 0000 rrrr ssN0 0000", "trirb @rd,@rs,rbr", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 aaN0 1010 0000 rrrr bbN0 0000", "trtdb @ra,@rb,rbr", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 aaN0 1110 0000 rrrr bbN0 1110", "trtdrb @ra,@rb,rbr", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 aaN0 0010 0000 rrrr bbN0 0000", "trtib @ra,@rb,rbr", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 aaN0 0110 0000 rrrr bbN0 1110", "trtirb @ra,@rb,rbr", 0},
|
||||
{"-ZSV--", 25, 8, "1011 1000 aaN0 1010 0000 rrrr bbN0 0000", "trtrb @ra,@rb,rbr", 0},
|
||||
{"---V--", 25, 8, "1011 1000 ddN0 1000 0000 rrrr ssN0 0000", "trdb @rd,@rs,rr", 0},
|
||||
{"---V--", 25, 8, "1011 1000 ddN0 1100 0000 rrrr ssN0 0000", "trdrb @rd,@rs,rr", 0},
|
||||
{"---V--", 25, 8, "1011 1000 ddN0 0000 0000 rrrr ssN0 0000", "trib @rd,@rs,rr", 0},
|
||||
{"---V--", 25, 8, "1011 1000 ddN0 0100 0000 rrrr ssN0 0000", "trirb @rd,@rs,rr", 0},
|
||||
{"-Z-V--", 25, 8, "1011 1000 aaN0 1010 0000 rrrr bbN0 0000", "trtdb @ra,@rb,rr", 0},
|
||||
{"-Z-V--", 25, 8, "1011 1000 aaN0 1110 0000 rrrr bbN0 1110", "trtdrb @ra,@rb,rr", 0},
|
||||
{"-Z-V--", 25, 8, "1011 1000 aaN0 0010 0000 rrrr bbN0 0000", "trtib @ra,@rb,rr", 0},
|
||||
{"-Z-V--", 25, 8, "1011 1000 aaN0 0110 0000 rrrr bbN0 1110", "trtirb @ra,@rb,rr", 0},
|
||||
|
||||
{"--S---", 11, 16, "0000 1101 ddN0 0110", "tset @rd", 0},
|
||||
{"--S---", 14, 16, "0100 1101 0000 0110 address_dst", "tset address_dst", 0},
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user