Add -z bndplt to generate BND prefix in PLT entries

This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND
prefix in PLT entries.  It also updated Linux/x86-64 assembler not to
generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations.

bfd/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only
	for -z bndplt.

gas/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* config/tc-i386-intel.c (i386_operator): Remove last argument
	from lex_got call.
	* config/tc-i386.c (reloc): Remove bnd_prefix from parameters'
	list.  Return always BFD_RELOC_32_PCREL.
	* (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND.
	* (output_jump): Update call to reloc accordingly.
	* (output_interseg_jump): Likewise.
	* (output_disp): Likewise.
	* (output_imm): Likewise.
	* (x86_cons_fix_new): Likewise.
	* (lex_got): Remove bnd_prefix from parameters' list in macro and
	declarations. Don't use BFD_RELOC_X86_64_PLT32_BND.
	* (x86_cons): Update call to lex_got accordingly.
	* (i386_immediate): Likewise.
	* (i386_displacement): Likewise.
	* (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor
	BFD_RELOC_X86_64_PC32_BND.
	* (tc_gen_reloc): Likewise.

include/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* bfdlink.h (struct bfd_link_info): Add bndplt.

ld/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64.
	* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
	"-z bndplt" if BNDPLT is yes.
	(gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry.
	* ld.texinfo: Add description for bndplt.

ld/testsuite/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option.
	* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
	* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.  Update dissassembly
	sections.
	* testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests.
	* testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name.
	* testsuite/ld-x86-64/mpx1c.rd: Likewise.
	* testsuite/ld-x86-64/mpx2a.rd: Likewise.
	* testsuite/ld-x86-64/mpx2c.rd: Likewise.
	* testsuite/ld-x86-64/mpx3.dd: New file.
	* testsuite/ld-x86-64/mpx3a.s: Likewise.
	* testsuite/ld-x86-64/mpx3b.s: Likewise.
	* testsuite/ld-x86-64/mpx4.dd: Likewise.
	* testsuite/ld-x86-64/mpx4a.s: Likewise.
	* testsuite/ld-x86-64/mpx4b.s: Likewise.
This commit is contained in:
Igor Zamyatin 2014-11-18 10:52:36 +03:00 committed by H.J. Lu
parent 470e2f4e30
commit d258b82828
29 changed files with 252 additions and 86 deletions

View File

@ -1,3 +1,8 @@
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only
for -z bndplt.
2014-11-14 Nick Clifton <nickc@redhat.com> 2014-11-14 Nick Clifton <nickc@redhat.com>
PR binutils/17597 PR binutils/17597

View File

@ -1629,11 +1629,16 @@ elf_x86_64_check_relocs (bfd *abfd, struct bfd_link_info *info,
case R_X86_64_PC32_BND: case R_X86_64_PC32_BND:
case R_X86_64_PLT32_BND: case R_X86_64_PLT32_BND:
case R_X86_64_PC32:
case R_X86_64_PLT32:
case R_X86_64_32:
case R_X86_64_64:
/* MPX PLT is supported only if elf_x86_64_arch_bed /* MPX PLT is supported only if elf_x86_64_arch_bed
is used in 64-bit mode. */ is used in 64-bit mode. */
if (ABI_64_P (abfd) if (ABI_64_P (abfd)
&& (get_elf_x86_64_backend_data (abfd) && info->bndplt
== &elf_x86_64_arch_bed)) && (get_elf_x86_64_backend_data (abfd)
== &elf_x86_64_arch_bed))
{ {
elf_x86_64_hash_entry (h)->has_bnd_reloc = TRUE; elf_x86_64_hash_entry (h)->has_bnd_reloc = TRUE;
@ -1675,11 +1680,7 @@ elf_x86_64_check_relocs (bfd *abfd, struct bfd_link_info *info,
} }
case R_X86_64_32S: case R_X86_64_32S:
case R_X86_64_32:
case R_X86_64_64:
case R_X86_64_PC32:
case R_X86_64_PC64: case R_X86_64_PC64:
case R_X86_64_PLT32:
case R_X86_64_GOTPCREL: case R_X86_64_GOTPCREL:
case R_X86_64_GOTPCREL64: case R_X86_64_GOTPCREL64:
if (htab->elf.dynobj == NULL) if (htab->elf.dynobj == NULL)

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@ -1,3 +1,24 @@
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* config/tc-i386-intel.c (i386_operator): Remove last argument
from lex_got call.
* config/tc-i386.c (reloc): Remove bnd_prefix from parameters'
list. Return always BFD_RELOC_32_PCREL.
* (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND.
* (output_jump): Update call to reloc accordingly.
* (output_interseg_jump): Likewise.
* (output_disp): Likewise.
* (output_imm): Likewise.
* (x86_cons_fix_new): Likewise.
* (lex_got): Remove bnd_prefix from parameters' list in macro and
declarations. Don't use BFD_RELOC_X86_64_PLT32_BND.
* (x86_cons): Update call to lex_got accordingly.
* (i386_immediate): Likewise.
* (i386_displacement): Likewise.
* (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor
BFD_RELOC_X86_64_PC32_BND.
* (tc_gen_reloc): Likewise.
2014-11-18 Jan Beulich <jbeulich@suse.com> 2014-11-18 Jan Beulich <jbeulich@suse.com>
* config/tc-aarch64.c (s_aarch64_arch_extension): New. * config/tc-aarch64.c (s_aarch64_arch_extension): New.

View File

@ -141,9 +141,7 @@ operatorT i386_operator (const char *name, unsigned int operands, char *pc)
int adjust = 0; int adjust = 0;
char *gotfree_input_line = lex_got (&i.reloc[this_operand], char *gotfree_input_line = lex_got (&i.reloc[this_operand],
&adjust, &adjust,
&intel_state.reloc_types, &intel_state.reloc_types);
(i.bnd_prefix != NULL
|| add_bnd_prefix));
if (!gotfree_input_line) if (!gotfree_input_line)
break; break;

View File

@ -2830,7 +2830,6 @@ static bfd_reloc_code_real_type
reloc (unsigned int size, reloc (unsigned int size,
int pcrel, int pcrel,
int sign, int sign,
int bnd_prefix,
bfd_reloc_code_real_type other) bfd_reloc_code_real_type other)
{ {
if (other != NO_RELOC) if (other != NO_RELOC)
@ -2909,9 +2908,7 @@ reloc (unsigned int size,
{ {
case 1: return BFD_RELOC_8_PCREL; case 1: return BFD_RELOC_8_PCREL;
case 2: return BFD_RELOC_16_PCREL; case 2: return BFD_RELOC_16_PCREL;
case 4: return (bnd_prefix && object_64bit case 4: return BFD_RELOC_32_PCREL;
? BFD_RELOC_X86_64_PC32_BND
: BFD_RELOC_32_PCREL);
case 8: return BFD_RELOC_64_PCREL; case 8: return BFD_RELOC_64_PCREL;
} }
as_bad (_("cannot do %u byte pc-relative relocation"), size); as_bad (_("cannot do %u byte pc-relative relocation"), size);
@ -6776,13 +6773,7 @@ output_branch (void)
/* 1 possible extra opcode + 4 byte displacement go in var part. /* 1 possible extra opcode + 4 byte displacement go in var part.
Pass reloc in fr_var. */ Pass reloc in fr_var. */
frag_var (rs_machine_dependent, 5, frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
((!object_64bit
|| i.reloc[0] != NO_RELOC
|| (i.bnd_prefix == NULL && !add_bnd_prefix))
? i.reloc[0]
: BFD_RELOC_X86_64_PC32_BND),
subtype, sym, off, p);
} }
static void static void
@ -6858,10 +6849,7 @@ output_jump (void)
} }
fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size, fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size,
i.op[0].disps, 1, reloc (size, 1, 1, i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0]));
(i.bnd_prefix != NULL
|| add_bnd_prefix),
i.reloc[0]));
/* All jumps handled here are signed, but don't use a signed limit /* All jumps handled here are signed, but don't use a signed limit
check for 32 and 16 bit jumps as we want to allow wrap around at check for 32 and 16 bit jumps as we want to allow wrap around at
@ -6927,7 +6915,7 @@ output_interseg_jump (void)
} }
else else
fix_new_exp (frag_now, p - frag_now->fr_literal, size, fix_new_exp (frag_now, p - frag_now->fr_literal, size,
i.op[1].imms, 0, reloc (size, 0, 0, 0, i.reloc[1])); i.op[1].imms, 0, reloc (size, 0, 0, i.reloc[1]));
if (i.op[0].imms->X_op != O_constant) if (i.op[0].imms->X_op != O_constant)
as_bad (_("can't handle non absolute segment in `%s'"), as_bad (_("can't handle non absolute segment in `%s'"),
i.tm.name); i.tm.name);
@ -7206,10 +7194,7 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
} }
p = frag_more (size); p = frag_more (size);
reloc_type = reloc (size, pcrel, sign, reloc_type = reloc (size, pcrel, sign, i.reloc[n]);
(i.bnd_prefix != NULL
|| add_bnd_prefix),
i.reloc[n]);
if (GOT_symbol if (GOT_symbol
&& GOT_symbol == i.op[n].disps->X_add_symbol && GOT_symbol == i.op[n].disps->X_add_symbol
&& (((reloc_type == BFD_RELOC_32 && (((reloc_type == BFD_RELOC_32
@ -7300,7 +7285,7 @@ output_imm (fragS *insn_start_frag, offsetT insn_start_off)
sign = 0; sign = 0;
p = frag_more (size); p = frag_more (size);
reloc_type = reloc (size, 0, sign, 0, i.reloc[n]); reloc_type = reloc (size, 0, sign, i.reloc[n]);
/* This is tough to explain. We end up with this one if we /* This is tough to explain. We end up with this one if we
* have operands that look like * have operands that look like
@ -7393,7 +7378,7 @@ void
x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len, x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len,
expressionS *exp, bfd_reloc_code_real_type r) expressionS *exp, bfd_reloc_code_real_type r)
{ {
r = reloc (len, 0, cons_sign, 0, r); r = reloc (len, 0, cons_sign, r);
#ifdef TE_PE #ifdef TE_PE
if (exp->X_op == O_secrel) if (exp->X_op == O_secrel)
@ -7419,7 +7404,7 @@ x86_address_bytes (void)
#if !(defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) || defined (OBJ_MACH_O)) \ #if !(defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) || defined (OBJ_MACH_O)) \
|| defined (LEX_AT) || defined (LEX_AT)
# define lex_got(reloc, adjust, types, bnd_prefix) NULL # define lex_got(reloc, adjust, types) NULL
#else #else
/* Parse operands of the form /* Parse operands of the form
<symbol>@GOTOFF+<nnn> <symbol>@GOTOFF+<nnn>
@ -7433,8 +7418,7 @@ x86_address_bytes (void)
static char * static char *
lex_got (enum bfd_reloc_code_real *rel, lex_got (enum bfd_reloc_code_real *rel,
int *adjust, int *adjust,
i386_operand_type *types, i386_operand_type *types)
int bnd_prefix)
{ {
/* Some of the relocations depend on the size of what field is to /* Some of the relocations depend on the size of what field is to
be relocated. But in our callers i386_immediate and i386_displacement be relocated. But in our callers i386_immediate and i386_displacement
@ -7569,8 +7553,6 @@ lex_got (enum bfd_reloc_code_real *rel,
*adjust = len; *adjust = len;
memcpy (tmpbuf + first, past_reloc, second); memcpy (tmpbuf + first, past_reloc, second);
tmpbuf[first + second] = '\0'; tmpbuf[first + second] = '\0';
if (bnd_prefix && *rel == BFD_RELOC_X86_64_PLT32)
*rel = BFD_RELOC_X86_64_PLT32_BND;
return tmpbuf; return tmpbuf;
} }
@ -7603,8 +7585,7 @@ lex_got (enum bfd_reloc_code_real *rel,
static char * static char *
lex_got (enum bfd_reloc_code_real *rel ATTRIBUTE_UNUSED, lex_got (enum bfd_reloc_code_real *rel ATTRIBUTE_UNUSED,
int *adjust ATTRIBUTE_UNUSED, int *adjust ATTRIBUTE_UNUSED,
i386_operand_type *types, i386_operand_type *types)
int bnd_prefix ATTRIBUTE_UNUSED)
{ {
static const struct static const struct
{ {
@ -7705,7 +7686,7 @@ x86_cons (expressionS *exp, int size)
int adjust = 0; int adjust = 0;
save = input_line_pointer; save = input_line_pointer;
gotfree_input_line = lex_got (&got_reloc, &adjust, NULL, 0); gotfree_input_line = lex_got (&got_reloc, &adjust, NULL);
if (gotfree_input_line) if (gotfree_input_line)
input_line_pointer = gotfree_input_line; input_line_pointer = gotfree_input_line;
@ -7939,9 +7920,7 @@ i386_immediate (char *imm_start)
save_input_line_pointer = input_line_pointer; save_input_line_pointer = input_line_pointer;
input_line_pointer = imm_start; input_line_pointer = imm_start;
gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types, gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
(i.bnd_prefix != NULL
|| add_bnd_prefix));
if (gotfree_input_line) if (gotfree_input_line)
input_line_pointer = gotfree_input_line; input_line_pointer = gotfree_input_line;
@ -8198,9 +8177,7 @@ i386_displacement (char *disp_start, char *disp_end)
*displacement_string_end = '0'; *displacement_string_end = '0';
} }
#endif #endif
gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types, gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
(i.bnd_prefix != NULL
|| add_bnd_prefix));
if (gotfree_input_line) if (gotfree_input_line)
input_line_pointer = gotfree_input_line; input_line_pointer = gotfree_input_line;
@ -9160,8 +9137,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
&& (fixP->fx_r_type == BFD_RELOC_32_PCREL && (fixP->fx_r_type == BFD_RELOC_32_PCREL
|| fixP->fx_r_type == BFD_RELOC_64_PCREL || fixP->fx_r_type == BFD_RELOC_64_PCREL
|| fixP->fx_r_type == BFD_RELOC_16_PCREL || fixP->fx_r_type == BFD_RELOC_16_PCREL
|| fixP->fx_r_type == BFD_RELOC_8_PCREL || fixP->fx_r_type == BFD_RELOC_8_PCREL)
|| fixP->fx_r_type == BFD_RELOC_X86_64_PC32_BND)
&& !use_rela_relocations) && !use_rela_relocations)
{ {
/* This is a hack. There should be a better way to handle this. /* This is a hack. There should be a better way to handle this.
@ -9230,7 +9206,6 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
{ {
case BFD_RELOC_386_PLT32: case BFD_RELOC_386_PLT32:
case BFD_RELOC_X86_64_PLT32: case BFD_RELOC_X86_64_PLT32:
case BFD_RELOC_X86_64_PLT32_BND:
/* Make the jump instruction point to the address of the operand. At /* Make the jump instruction point to the address of the operand. At
runtime we merely add the offset to the actual PLT entry. */ runtime we merely add the offset to the actual PLT entry. */
value = -4; value = -4;
@ -10354,7 +10329,6 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
#endif #endif
case BFD_RELOC_X86_64_PLT32: case BFD_RELOC_X86_64_PLT32:
case BFD_RELOC_X86_64_PLT32_BND:
case BFD_RELOC_X86_64_GOT32: case BFD_RELOC_X86_64_GOT32:
case BFD_RELOC_X86_64_GOTPCREL: case BFD_RELOC_X86_64_GOTPCREL:
case BFD_RELOC_386_PLT32: case BFD_RELOC_386_PLT32:
@ -10415,10 +10389,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
break; break;
case 1: code = BFD_RELOC_8_PCREL; break; case 1: code = BFD_RELOC_8_PCREL; break;
case 2: code = BFD_RELOC_16_PCREL; break; case 2: code = BFD_RELOC_16_PCREL; break;
case 4: case 4: code = BFD_RELOC_32_PCREL; break;
code = (fixp->fx_r_type == BFD_RELOC_X86_64_PC32_BND
? fixp-> fx_r_type : BFD_RELOC_32_PCREL);
break;
#ifdef BFD64 #ifdef BFD64
case 8: code = BFD_RELOC_64_PCREL; break; case 8: code = BFD_RELOC_64_PCREL; break;
#endif #endif
@ -10511,7 +10482,6 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
switch (code) switch (code)
{ {
case BFD_RELOC_X86_64_PLT32: case BFD_RELOC_X86_64_PLT32:
case BFD_RELOC_X86_64_PLT32_BND:
case BFD_RELOC_X86_64_GOT32: case BFD_RELOC_X86_64_GOT32:
case BFD_RELOC_X86_64_GOTPCREL: case BFD_RELOC_X86_64_GOTPCREL:
case BFD_RELOC_X86_64_TLSGD: case BFD_RELOC_X86_64_TLSGD:

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@ -1,3 +1,8 @@
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* gas/i386/x86-64-mpx-branch-1.d: Don't use *_BND relocations.
* gas/i386/x86-64-mpx-branch-2.d: Likewise.
2014-11-18 Jan Beulich <jbeulich@suse.com> 2014-11-18 Jan Beulich <jbeulich@suse.com>
* gas/aarch64/crc32-directive.d: New. * gas/aarch64/crc32-directive.d: New.

View File

@ -8,8 +8,8 @@
Disassembly of section .text: Disassembly of section .text:
0+ <foo1-0xc>: 0+ <foo1-0xc>:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32_BND \*ABS\*\+0x10003c [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32_BND \*ABS\*\+0x10003c [ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
0+c <foo1>: 0+c <foo1>:
[ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1> [ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1>
@ -20,9 +20,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2> [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
0+24 <foo2>: 0+24 <foo2>:
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32_BND foo-0x4 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32_BND foo-0x4 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32 foo-0x4

View File

@ -8,8 +8,8 @@
Disassembly of section .text: Disassembly of section .text:
0+ <foo1-0xc>: 0+ <foo1-0xc>:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32_BND \*ABS\*\+0x10003c [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32_BND \*ABS\*\+0x10003c [ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
0+c <foo1>: 0+c <foo1>:
[ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1> [ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1>
@ -20,9 +20,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2> [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
0+24 <foo2>: 0+24 <foo2>:
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32_BND foo-0x4 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32_BND foo-0x4 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32_BND foo-0x4 [ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32 foo-0x4

View File

@ -1,3 +1,7 @@
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* bfdlink.h (struct bfd_link_info): Add bndplt.
2014-10-30 Andrew Pinski <apinski@cavium.com> 2014-10-30 Andrew Pinski <apinski@cavium.com>
* elf/mips.h (AFL_EXT_OCTEON3): Define. * elf/mips.h (AFL_EXT_OCTEON3): Define.

View File

@ -417,6 +417,9 @@ struct bfd_link_info
/* TRUE if the linker script contained an explicit PHDRS command. */ /* TRUE if the linker script contained an explicit PHDRS command. */
unsigned int user_phdrs: 1; unsigned int user_phdrs: 1;
/* TRUE if BND prefix in PLT entries is always generated. */
unsigned int bndplt: 1;
/* Char that may appear as the first char of a symbol, but should be /* Char that may appear as the first char of a symbol, but should be
skipped (like symbol_leading_char) when looking up symbols in skipped (like symbol_leading_char) when looking up symbols in
wrap_hash. Used by PowerPC Linux for 'dot' symbols. */ wrap_hash. Used by PowerPC Linux for 'dot' symbols. */

View File

@ -1,3 +1,11 @@
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64.
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
"-z bndplt" if BNDPLT is yes.
(gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry.
* ld.texinfo: Add description for bndplt.
2014-10-08 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> 2014-10-08 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* avrtiny.sc: Apply avr.sc fixes. * avrtiny.sc: Apply avr.sc fixes.

View File

@ -31,7 +31,10 @@ fi
case "$target" in case "$target" in
x86_64*-linux*|i[3-7]86-*-linux-*) x86_64*-linux*|i[3-7]86-*-linux-*)
case "$EMULATION_NAME" in case "$EMULATION_NAME" in
*64*) LIBPATH_SUFFIX=64 ;; *64*)
LIBPATH_SUFFIX=64
BNDPLT=yes
;;
esac esac
;; ;;
*-*-solaris2*) *-*-solaris2*)

View File

@ -2277,6 +2277,14 @@ fragment <<EOF
link_info.execstack = FALSE; link_info.execstack = FALSE;
} }
EOF EOF
if test x"$BNDPLT" = xyes; then
fragment <<EOF
else if (strcmp (optarg, "bndplt") == 0)
link_info.bndplt = TRUE;
EOF
fi
if test x"$GENERATE_SHLIB_SCRIPT" = xyes; then if test x"$GENERATE_SHLIB_SCRIPT" = xyes; then
fragment <<EOF fragment <<EOF
else if (strcmp (optarg, "global") == 0) else if (strcmp (optarg, "global") == 0)
@ -2456,6 +2464,13 @@ fragment <<EOF
EOF EOF
fi fi
if test x"$BNDPLT" = xyes; then
fragment <<EOF
fprintf (file, _("\
-z bndplt Always generate BND prefix in PLT entries\n"));
EOF
fi
if test -n "$PARSE_AND_LIST_OPTIONS" ; then if test -n "$PARSE_AND_LIST_OPTIONS" ; then
fragment <<EOF fragment <<EOF
$PARSE_AND_LIST_OPTIONS $PARSE_AND_LIST_OPTIONS

View File

@ -1133,6 +1133,9 @@ Specify a stack size for in an ELF @code{PT_GNU_STACK} segment.
Specifying zero will override any default non-zero sized Specifying zero will override any default non-zero sized
@code{PT_GNU_STACK} segment creation. @code{PT_GNU_STACK} segment creation.
@item bndplt
Always generate BND prefix in PLT entries. Supported for Linux/x86_64.
@end table @end table
Other keywords are ignored for Solaris compatibility. Other keywords are ignored for Solaris compatibility.

View File

@ -1,3 +1,21 @@
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option.
* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1.d: Likewise. Update dissassembly
sections.
* testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests.
* testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name.
* testsuite/ld-x86-64/mpx1c.rd: Likewise.
* testsuite/ld-x86-64/mpx2a.rd: Likewise.
* testsuite/ld-x86-64/mpx2c.rd: Likewise.
* testsuite/ld-x86-64/mpx3.dd: New file.
* testsuite/ld-x86-64/mpx3a.s: Likewise.
* testsuite/ld-x86-64/mpx3b.s: Likewise.
* testsuite/ld-x86-64/mpx4.dd: Likewise.
* testsuite/ld-x86-64/mpx4a.s: Likewise.
* testsuite/ld-x86-64/mpx4b.s: Likewise.
2014-11-13 H.J. Lu <hongjiu.lu@intel.com> 2014-11-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/17598 PR gas/17598

View File

@ -1,5 +1,5 @@
#as: --64 -madd-bnd-prefix #as: --64 -madd-bnd-prefix
#ld: -shared -melf_x86_64 #ld: -shared -melf_x86_64 -z bndplt
#objdump: -dw #objdump: -dw
#... #...

View File

@ -1,5 +1,5 @@
#as: --64 -madd-bnd-prefix #as: --64 -madd-bnd-prefix
#ld: -shared -melf_x86_64 #ld: -shared -melf_x86_64 -z bndplt
#objdump: -dw #objdump: -dw
#... #...

View File

@ -1,6 +1,6 @@
#source: bnd-branch-1.s #source: bnd-branch-1.s
#as: --64 #as: --64
#ld: -shared -melf_x86_64 #ld: -shared -melf_x86_64 -z bndplt
#objdump: -dw #objdump: -dw
.*: +file format .* .*: +file format .*
@ -13,8 +13,8 @@ Disassembly of section .plt:
[ ]*[a-f0-9]+: f2 ff 25 83 01 20 00 bnd jmpq \*0x200183\(%rip\) # 200440 <_GLOBAL_OFFSET_TABLE_\+0x10> [ ]*[a-f0-9]+: f2 ff 25 83 01 20 00 bnd jmpq \*0x200183\(%rip\) # 200440 <_GLOBAL_OFFSET_TABLE_\+0x10>
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\) [ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
[ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0 [ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
[ ]*[a-f0-9]+: e9 e6 ff ff ff jmpq 2b0 <foo2@plt-0x50> [ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 2b0 <foo2@plt-0x50>
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1 [ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 2b0 <foo2@plt-0x50> [ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 2b0 <foo2@plt-0x50>
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
@ -22,14 +22,14 @@ Disassembly of section .plt:
[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff bnd jmpq 2b0 <foo2@plt-0x50> [ ]*[a-f0-9]+: f2 e9 c5 ff ff ff bnd jmpq 2b0 <foo2@plt-0x50>
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3 [ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3
[ ]*[a-f0-9]+: e9 b6 ff ff ff jmpq 2b0 <foo2@plt-0x50> [ ]*[a-f0-9]+: f2 e9 b5 ff ff ff bnd jmpq 2b0 <foo2@plt-0x50>
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
Disassembly of section .plt.bnd: Disassembly of section .plt.bnd:
0+300 <foo2@plt>: 0+300 <foo2@plt>:
[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200448 <_GLOBAL_OFFSET_TABLE_\+0x18> [ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200448 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax [ ]*[a-f0-9]+: 90 nop
0+308 <foo3@plt>: 0+308 <foo3@plt>:
[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200450 <_GLOBAL_OFFSET_TABLE_\+0x20> [ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200450 <_GLOBAL_OFFSET_TABLE_\+0x20>
@ -40,8 +40,8 @@ Disassembly of section .plt.bnd:
[ ]*[a-f0-9]+: 90 nop [ ]*[a-f0-9]+: 90 nop
0+318 <foo4@plt>: 0+318 <foo4@plt>:
[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200460 <_GLOBAL_OFFSET_TABLE_\+0x30> [ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200460 <_GLOBAL_OFFSET_TABLE_\+0x30>
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax [ ]*[a-f0-9]+: 90 nop
Disassembly of section .text: Disassembly of section .text:

View File

@ -74,6 +74,21 @@ set run_tests {
{dummy.s} "mpx2static" "mpx2.out"} {dummy.s} "mpx2static" "mpx2.out"}
} }
run_ld_link_tests {
{"Build libcall.so"
"-shared -z bndplt" "" ""
{mpx3b.s} {} "libcall.so"}
{"Build mpx3"
"tmpdir/libcall.so -z bndplt" "" ""
{mpx3a.s} {{objdump -dw mpx3.dd}} "mpx3"}
{"Build libcall1.so"
"-shared -z bndplt" "" ""
{mpx4b.s} {} "libcall1.so"}
{"Build mpx4"
"tmpdir/libcall1.so -z bndplt" "" ""
{mpx4a.s} {{objdump -dw mpx4.dd}} "mpx4"}
}
run_ld_link_exec_tests [] $run_tests run_ld_link_exec_tests [] $run_tests
run_dump_test "bnd-branch-1" run_dump_test "bnd-branch-1"

View File

@ -1,3 +1,3 @@
#... #...
[0-9a-f ]+R_X86_64_PLT32_BND +0+ +.* [0-9a-f ]+R_X86_64_PLT32 +0+ +.*
#... #...

View File

@ -1,3 +1,3 @@
#... #...
[0-9a-f ]+R_X86_64_PC32_BND +0+ +.* [0-9a-f ]+R_X86_64_PC32 +0+ +.*
#... #...

View File

@ -1,3 +1,3 @@
#... #...
[0-9a-f ]+R_X86_64_PLT32_BND +0+ +.* [0-9a-f ]+R_X86_64_PLT32 +0+ +.*
#... #...

View File

@ -1,3 +1,3 @@
#... #...
[0-9a-f ]+R_X86_64_PLT32_BND +0+ +.* [0-9a-f ]+R_X86_64_PLT32 +0+ +.*
#... #...

View File

@ -0,0 +1,35 @@
.*: +file format .*
Disassembly of section .plt:
0+400290 <.plt>:
[ ]*[a-f0-9]+: ff 35 6a 01 20 00 pushq 0x20016a\(%rip\) # 600400 <_GLOBAL_OFFSET_TABLE_\+0x8>
[ ]*[a-f0-9]+: f2 ff 25 6b 01 20 00 bnd jmpq \*0x20016b\(%rip\) # 600408 <_GLOBAL_OFFSET_TABLE_\+0x10>
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
[ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 400290 <call1@plt-0x30>
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 400290 <call1@plt-0x30>
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
Disassembly of section .plt.bnd:
0+4002c0 <call1@plt>:
[ ]*[a-f0-9]+: f2 ff 25 49 01 20 00 bnd jmpq \*0x200149\(%rip\) # 600410 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 90 nop
0+4002c8 <call2@plt>:
[ ]*[a-f0-9]+: f2 ff 25 49 01 20 00 bnd jmpq \*0x200149\(%rip\) # 600418 <_GLOBAL_OFFSET_TABLE_\+0x20>
[ ]*[a-f0-9]+: 90 nop
Disassembly of section .text:
0+4002d0 <_start>:
[ ]*[a-f0-9]+: bf c0 02 40 00 mov \$0x4002c0,%edi
[ ]*[a-f0-9]+: f2 ff d7 bnd callq \*%rdi
[ ]*[a-f0-9]+: 48 8b 3d 41 01 20 00 mov 0x200141\(%rip\),%rdi # 600420 <func>
[ ]*[a-f0-9]+: f2 ff d7 bnd callq \*%rdi
[ ]*[a-f0-9]+: c3 retq
#pass

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@ -0,0 +1,16 @@
.text
.globl _start
.type _start, @function
_start:
movl $call1, %edi
bnd call *%rdi
movq func(%rip), %rdi
bnd call *%rdi
ret
.size _start, .-_start
.globl func
.data
.type func, @object
.size func, 8
func:
.quad call2

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@ -0,0 +1,11 @@
.text
.globl call1
.type call1, @function
call1:
ret
.size call1, .-call1
.globl call2
.type call2, @function
call2:
ret
.size call2, .-call2

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@ -0,0 +1,24 @@
.*: +file format .*
Disassembly of section .plt:
0+400260 <.plt>:
[ ]*[a-f0-9]+: ff 35 42 01 20 00 pushq 0x200142\(%rip\) # 6003a8 <_GLOBAL_OFFSET_TABLE_\+0x8>
[ ]*[a-f0-9]+: f2 ff 25 43 01 20 00 bnd jmpq \*0x200143\(%rip\) # 6003b0 <_GLOBAL_OFFSET_TABLE_\+0x10>
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
[ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 400260 <call1@plt-0x20>
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
Disassembly of section .plt.bnd:
0+400280 <call1@plt>:
[ ]*[a-f0-9]+: f2 ff 25 31 01 20 00 bnd jmpq \*0x200131\(%rip\) # 6003b8 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 90 nop
Disassembly of section .text:
0+400288 <_start>:
[ ]*[a-f0-9]+: bf 80 02 40 00 mov \$0x400280,%edi
[ ]*[a-f0-9]+: f2 ff d7 bnd callq \*%rdi

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@ -0,0 +1,6 @@
.text
.globl _start
.type _start, @function
_start:
movl $call1, %edi
bnd call *%rdi

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@ -0,0 +1,5 @@
.text
.globl call1
.type call1, @function
call1:
ret