aarch64: Regenerate aarch64-*-2.c files
This commit is contained in:
Victor Do Nascimento
parent
e3a478523e
commit
e244fa1a6b
@ -426,15 +426,15 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
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case 1200: /* movz */
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value = 1200; /* --> movz. */
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break;
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case 3193: /* clrbhb */
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case 1276: /* autibsp */
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case 1275: /* autibz */
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case 1274: /* autiasp */
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case 1273: /* autiaz */
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case 1272: /* pacibsp */
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case 1271: /* pacibz */
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case 1270: /* paciasp */
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case 1269: /* paciaz */
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case 3197: /* clrbhb */
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case 1280: /* autibsp */
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case 1279: /* autibz */
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case 1278: /* autiasp */
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case 1277: /* autiaz */
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case 1276: /* pacibsp */
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case 1275: /* pacibz */
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case 1274: /* paciasp */
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case 1273: /* paciaz */
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case 1253: /* gcsb */
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case 1233: /* clearbhb */
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case 1232: /* tsb */
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@ -465,143 +465,147 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
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case 1236: /* dsb */
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value = 1236; /* --> dsb. */
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break;
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case 3194: /* trcit */
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case 1264: /* cosp */
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case 1263: /* cpp */
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case 1262: /* dvp */
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case 1261: /* cfp */
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case 1258: /* tlbi */
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case 1257: /* ic */
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case 1256: /* dc */
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case 1255: /* at */
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case 3198: /* trcit */
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case 1266: /* cosp */
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case 1265: /* cpp */
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case 1264: /* dvp */
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case 1263: /* cfp */
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case 1259: /* tlbi */
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case 1258: /* ic */
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case 1257: /* dc */
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case 1256: /* at */
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case 1254: /* sys */
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value = 1254; /* --> sys. */
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break;
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case 1259: /* wfet */
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value = 1259; /* --> wfet. */
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case 1260: /* tlbip */
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case 1255: /* sysp */
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value = 1255; /* --> sysp. */
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break;
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case 1260: /* wfit */
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value = 1260; /* --> wfit. */
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case 1261: /* wfet */
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value = 1261; /* --> wfet. */
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break;
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case 2078: /* bic */
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case 1325: /* and */
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value = 1325; /* --> and. */
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case 1262: /* wfit */
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value = 1262; /* --> wfit. */
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break;
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case 1308: /* mov */
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case 1327: /* and */
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value = 1327; /* --> and. */
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case 2082: /* bic */
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case 1329: /* and */
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value = 1329; /* --> and. */
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break;
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case 1312: /* movs */
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case 1328: /* ands */
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value = 1328; /* --> ands. */
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case 1312: /* mov */
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case 1331: /* and */
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value = 1331; /* --> and. */
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break;
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case 2079: /* cmple */
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case 1363: /* cmpge */
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value = 1363; /* --> cmpge. */
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case 1316: /* movs */
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case 1332: /* ands */
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value = 1332; /* --> ands. */
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break;
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case 2082: /* cmplt */
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case 1366: /* cmpgt */
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value = 1366; /* --> cmpgt. */
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case 2083: /* cmple */
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case 1367: /* cmpge */
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value = 1367; /* --> cmpge. */
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break;
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case 2080: /* cmplo */
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case 1368: /* cmphi */
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value = 1368; /* --> cmphi. */
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case 2086: /* cmplt */
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case 1370: /* cmpgt */
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value = 1370; /* --> cmpgt. */
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break;
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case 2081: /* cmpls */
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case 1371: /* cmphs */
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value = 1371; /* --> cmphs. */
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case 2084: /* cmplo */
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case 1372: /* cmphi */
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value = 1372; /* --> cmphi. */
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break;
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case 1305: /* mov */
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case 1393: /* cpy */
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value = 1393; /* --> cpy. */
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break;
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case 1307: /* mov */
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case 1394: /* cpy */
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value = 1394; /* --> cpy. */
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break;
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case 2089: /* fmov */
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case 1310: /* mov */
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case 1395: /* cpy */
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value = 1395; /* --> cpy. */
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break;
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case 1299: /* mov */
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case 1407: /* dup */
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value = 1407; /* --> dup. */
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break;
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case 1302: /* mov */
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case 1298: /* mov */
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case 1408: /* dup */
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value = 1408; /* --> dup. */
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break;
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case 2088: /* fmov */
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case 1304: /* mov */
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case 1409: /* dup */
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value = 1409; /* --> dup. */
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break;
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case 1303: /* mov */
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case 1410: /* dupm */
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value = 1410; /* --> dupm. */
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break;
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case 2083: /* eon */
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case 1412: /* eor */
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value = 1412; /* --> eor. */
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break;
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case 1313: /* not */
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case 1414: /* eor */
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value = 1414; /* --> eor. */
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break;
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case 1314: /* nots */
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case 1415: /* eors */
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value = 1415; /* --> eors. */
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break;
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case 2084: /* facle */
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case 1420: /* facge */
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value = 1420; /* --> facge. */
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break;
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case 2085: /* faclt */
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case 1421: /* facgt */
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value = 1421; /* --> facgt. */
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break;
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case 2086: /* fcmle */
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case 1434: /* fcmge */
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value = 1434; /* --> fcmge. */
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break;
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case 2087: /* fcmlt */
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case 1436: /* fcmgt */
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value = 1436; /* --> fcmgt. */
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break;
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case 1296: /* fmov */
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case 1442: /* fcpy */
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value = 1442; /* --> fcpy. */
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break;
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case 1295: /* fmov */
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case 1465: /* fdup */
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value = 1465; /* --> fdup. */
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break;
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case 1297: /* mov */
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case 1797: /* orr */
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value = 1797; /* --> orr. */
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break;
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case 2090: /* orn */
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case 1798: /* orr */
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value = 1798; /* --> orr. */
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break;
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case 1301: /* mov */
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case 1300: /* mov */
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case 1800: /* orr */
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value = 1800; /* --> orr. */
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break;
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case 1311: /* movs */
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case 1801: /* orrs */
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value = 1801; /* --> orrs. */
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break;
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case 1306: /* mov */
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case 1864: /* sel */
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value = 1864; /* --> sel. */
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case 2085: /* cmpls */
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case 1375: /* cmphs */
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value = 1375; /* --> cmphs. */
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break;
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case 1309: /* mov */
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case 1865: /* sel */
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value = 1865; /* --> sel. */
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case 1397: /* cpy */
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value = 1397; /* --> cpy. */
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break;
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case 1311: /* mov */
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case 1398: /* cpy */
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value = 1398; /* --> cpy. */
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break;
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case 2093: /* fmov */
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case 1314: /* mov */
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case 1399: /* cpy */
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value = 1399; /* --> cpy. */
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break;
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case 1303: /* mov */
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case 1411: /* dup */
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value = 1411; /* --> dup. */
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break;
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case 1306: /* mov */
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case 1302: /* mov */
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case 1412: /* dup */
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value = 1412; /* --> dup. */
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break;
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case 2092: /* fmov */
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case 1308: /* mov */
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case 1413: /* dup */
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value = 1413; /* --> dup. */
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break;
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case 1307: /* mov */
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case 1414: /* dupm */
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value = 1414; /* --> dupm. */
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break;
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case 2087: /* eon */
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case 1416: /* eor */
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value = 1416; /* --> eor. */
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break;
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case 1317: /* not */
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case 1418: /* eor */
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value = 1418; /* --> eor. */
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break;
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case 1318: /* nots */
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case 1419: /* eors */
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value = 1419; /* --> eors. */
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break;
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case 2088: /* facle */
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case 1424: /* facge */
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value = 1424; /* --> facge. */
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break;
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case 2089: /* faclt */
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case 1425: /* facgt */
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value = 1425; /* --> facgt. */
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break;
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case 2090: /* fcmle */
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case 1438: /* fcmge */
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value = 1438; /* --> fcmge. */
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break;
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case 2091: /* fcmlt */
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case 1440: /* fcmgt */
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value = 1440; /* --> fcmgt. */
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break;
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case 1300: /* fmov */
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case 1446: /* fcpy */
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value = 1446; /* --> fcpy. */
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break;
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case 1299: /* fmov */
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case 1469: /* fdup */
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value = 1469; /* --> fdup. */
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break;
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case 1301: /* mov */
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case 1801: /* orr */
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value = 1801; /* --> orr. */
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break;
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case 2094: /* orn */
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case 1802: /* orr */
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value = 1802; /* --> orr. */
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break;
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case 1305: /* mov */
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case 1304: /* mov */
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case 1804: /* orr */
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value = 1804; /* --> orr. */
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break;
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case 1315: /* movs */
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case 1805: /* orrs */
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value = 1805; /* --> orrs. */
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break;
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case 1310: /* mov */
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case 1868: /* sel */
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value = 1868; /* --> sel. */
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break;
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case 1313: /* mov */
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case 1869: /* sel */
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value = 1869; /* --> sel. */
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break;
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default: return NULL;
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}
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@ -632,11 +636,10 @@ aarch64_insert_operand (const aarch64_operand *self,
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case 12:
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case 13:
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case 14:
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case 18:
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case 19:
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case 20:
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case 21:
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case 23:
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case 22:
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case 24:
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case 25:
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case 26:
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@ -646,11 +649,9 @@ aarch64_insert_operand (const aarch64_operand *self,
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case 30:
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case 31:
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case 32:
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case 113:
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case 114:
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case 172:
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case 173:
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case 174:
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case 33:
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case 116:
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case 117:
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case 175:
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case 176:
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case 177:
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@ -662,56 +663,58 @@ aarch64_insert_operand (const aarch64_operand *self,
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case 183:
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case 184:
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case 185:
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case 200:
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case 201:
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case 202:
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case 186:
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case 187:
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case 188:
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case 203:
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case 204:
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case 205:
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case 206:
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case 207:
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case 208:
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case 215:
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case 209:
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case 210:
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case 211:
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case 218:
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case 222:
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case 229:
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case 230:
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case 237:
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case 238:
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case 239:
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case 221:
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case 225:
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case 232:
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case 233:
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case 240:
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case 241:
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case 242:
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case 243:
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return aarch64_ins_regno (self, info, code, inst, errors);
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case 6:
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case 110:
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case 111:
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case 272:
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case 274:
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case 113:
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case 114:
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case 275:
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case 277:
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return aarch64_ins_none (self, info, code, inst, errors);
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case 16:
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return aarch64_ins_reg_extended (self, info, code, inst, errors);
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case 17:
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return aarch64_ins_reg_extended (self, info, code, inst, errors);
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case 18:
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return aarch64_ins_reg_shifted (self, info, code, inst, errors);
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case 22:
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case 23:
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return aarch64_ins_ft (self, info, code, inst, errors);
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case 33:
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case 34:
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case 35:
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case 36:
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case 276:
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return aarch64_ins_reglane (self, info, code, inst, errors);
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case 37:
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return aarch64_ins_reglist (self, info, code, inst, errors);
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case 279:
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return aarch64_ins_reglane (self, info, code, inst, errors);
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case 38:
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return aarch64_ins_ldst_reglist (self, info, code, inst, errors);
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return aarch64_ins_reglist (self, info, code, inst, errors);
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case 39:
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return aarch64_ins_ldst_reglist_r (self, info, code, inst, errors);
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return aarch64_ins_ldst_reglist (self, info, code, inst, errors);
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case 40:
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return aarch64_ins_ldst_elemlist (self, info, code, inst, errors);
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return aarch64_ins_ldst_reglist_r (self, info, code, inst, errors);
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case 41:
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return aarch64_ins_ldst_elemlist (self, info, code, inst, errors);
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case 42:
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case 43:
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case 44:
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case 54:
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case 45:
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case 55:
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case 56:
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case 57:
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@ -728,117 +731,117 @@ aarch64_insert_operand (const aarch64_operand *self,
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case 68:
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case 69:
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case 70:
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case 82:
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case 71:
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case 83:
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case 84:
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case 85:
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case 109:
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case 169:
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case 171:
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case 192:
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case 193:
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case 194:
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case 86:
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case 112:
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case 172:
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case 174:
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case 195:
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case 196:
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case 197:
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case 198:
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case 199:
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case 243:
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case 270:
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case 271:
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case 200:
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case 201:
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case 202:
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case 246:
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case 273:
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case 275:
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case 280:
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case 281:
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case 274:
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case 276:
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case 278:
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case 283:
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case 284:
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return aarch64_ins_imm (self, info, code, inst, errors);
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case 45:
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case 46:
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return aarch64_ins_advsimd_imm_shift (self, info, code, inst, errors);
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case 47:
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return aarch64_ins_advsimd_imm_shift (self, info, code, inst, errors);
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case 48:
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case 49:
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case 50:
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return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
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case 53:
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case 159:
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case 54:
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case 162:
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return aarch64_ins_fpimm (self, info, code, inst, errors);
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case 71:
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case 167:
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return aarch64_ins_limm (self, info, code, inst, errors);
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case 72:
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return aarch64_ins_aimm (self, info, code, inst, errors);
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case 170:
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return aarch64_ins_limm (self, info, code, inst, errors);
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case 73:
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return aarch64_ins_imm_half (self, info, code, inst, errors);
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return aarch64_ins_aimm (self, info, code, inst, errors);
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case 74:
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return aarch64_ins_imm_half (self, info, code, inst, errors);
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case 75:
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return aarch64_ins_fbits (self, info, code, inst, errors);
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case 76:
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case 77:
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case 164:
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return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
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case 78:
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case 163:
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case 165:
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return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
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case 167:
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return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
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case 79:
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case 166:
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case 168:
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return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
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case 80:
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case 81:
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return aarch64_ins_cond (self, info, code, inst, errors);
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case 86:
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case 95:
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return aarch64_ins_addr_simple (self, info, code, inst, errors);
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case 87:
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return aarch64_ins_addr_regoff (self, info, code, inst, errors);
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case 96:
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return aarch64_ins_addr_simple (self, info, code, inst, errors);
|
||||
case 88:
|
||||
return aarch64_ins_addr_regoff (self, info, code, inst, errors);
|
||||
case 89:
|
||||
case 90:
|
||||
case 92:
|
||||
case 94:
|
||||
return aarch64_ins_addr_simm (self, info, code, inst, errors);
|
||||
case 91:
|
||||
return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
|
||||
case 93:
|
||||
case 95:
|
||||
return aarch64_ins_addr_simm (self, info, code, inst, errors);
|
||||
case 92:
|
||||
return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
|
||||
case 94:
|
||||
return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
|
||||
case 96:
|
||||
return aarch64_ins_addr_offset (self, info, code, inst, errors);
|
||||
case 97:
|
||||
return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
|
||||
return aarch64_ins_addr_offset (self, info, code, inst, errors);
|
||||
case 98:
|
||||
return aarch64_ins_sysreg (self, info, code, inst, errors);
|
||||
return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
|
||||
case 99:
|
||||
return aarch64_ins_pstatefield (self, info, code, inst, errors);
|
||||
case 100:
|
||||
return aarch64_ins_sysreg (self, info, code, inst, errors);
|
||||
case 101:
|
||||
return aarch64_ins_pstatefield (self, info, code, inst, errors);
|
||||
case 102:
|
||||
case 103:
|
||||
case 104:
|
||||
return aarch64_ins_sysins_op (self, info, code, inst, errors);
|
||||
case 105:
|
||||
case 107:
|
||||
return aarch64_ins_barrier (self, info, code, inst, errors);
|
||||
case 106:
|
||||
return aarch64_ins_barrier_dsb_nxs (self, info, code, inst, errors);
|
||||
case 107:
|
||||
return aarch64_ins_sysins_op (self, info, code, inst, errors);
|
||||
case 108:
|
||||
case 110:
|
||||
return aarch64_ins_barrier (self, info, code, inst, errors);
|
||||
case 109:
|
||||
return aarch64_ins_barrier_dsb_nxs (self, info, code, inst, errors);
|
||||
case 111:
|
||||
return aarch64_ins_prfop (self, info, code, inst, errors);
|
||||
case 112:
|
||||
return aarch64_ins_hint (self, info, code, inst, errors);
|
||||
case 115:
|
||||
case 116:
|
||||
return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
|
||||
case 117:
|
||||
return aarch64_ins_hint (self, info, code, inst, errors);
|
||||
case 118:
|
||||
case 119:
|
||||
return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
|
||||
case 120:
|
||||
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
|
||||
case 121:
|
||||
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
|
||||
case 122:
|
||||
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
|
||||
case 123:
|
||||
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
|
||||
case 124:
|
||||
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
|
||||
case 125:
|
||||
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
|
||||
case 126:
|
||||
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
|
||||
case 127:
|
||||
case 128:
|
||||
case 129:
|
||||
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
|
||||
case 130:
|
||||
case 131:
|
||||
case 132:
|
||||
@ -851,88 +854,88 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 139:
|
||||
case 140:
|
||||
case 141:
|
||||
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
|
||||
case 142:
|
||||
case 143:
|
||||
case 144:
|
||||
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
|
||||
case 145:
|
||||
case 146:
|
||||
case 147:
|
||||
case 148:
|
||||
case 149:
|
||||
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
|
||||
case 150:
|
||||
case 151:
|
||||
case 152:
|
||||
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
|
||||
case 153:
|
||||
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
|
||||
case 154:
|
||||
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
|
||||
case 155:
|
||||
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
|
||||
case 156:
|
||||
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
|
||||
case 157:
|
||||
return aarch64_ins_sve_aimm (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
|
||||
case 158:
|
||||
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
|
||||
case 159:
|
||||
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
|
||||
case 160:
|
||||
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_aimm (self, info, code, inst, errors);
|
||||
case 161:
|
||||
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
|
||||
case 163:
|
||||
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
|
||||
case 164:
|
||||
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
|
||||
case 162:
|
||||
case 165:
|
||||
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
|
||||
case 166:
|
||||
case 169:
|
||||
return aarch64_ins_inv_limm (self, info, code, inst, errors);
|
||||
case 168:
|
||||
case 171:
|
||||
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
|
||||
case 170:
|
||||
case 173:
|
||||
return aarch64_ins_sve_scale (self, info, code, inst, errors);
|
||||
case 186:
|
||||
case 187:
|
||||
case 188:
|
||||
return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
|
||||
case 189:
|
||||
case 190:
|
||||
case 191:
|
||||
case 256:
|
||||
return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
|
||||
case 192:
|
||||
case 193:
|
||||
case 194:
|
||||
case 259:
|
||||
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
|
||||
case 209:
|
||||
case 210:
|
||||
case 211:
|
||||
case 212:
|
||||
case 213:
|
||||
case 214:
|
||||
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
|
||||
case 215:
|
||||
case 216:
|
||||
return aarch64_ins_sve_index (self, info, code, inst, errors);
|
||||
case 217:
|
||||
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
|
||||
case 219:
|
||||
case 236:
|
||||
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_index (self, info, code, inst, errors);
|
||||
case 220:
|
||||
case 221:
|
||||
case 222:
|
||||
case 239:
|
||||
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
|
||||
case 223:
|
||||
case 224:
|
||||
case 225:
|
||||
case 226:
|
||||
case 235:
|
||||
return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
|
||||
case 227:
|
||||
case 228:
|
||||
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
|
||||
case 229:
|
||||
case 238:
|
||||
return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
|
||||
case 230:
|
||||
case 231:
|
||||
case 233:
|
||||
case 244:
|
||||
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
|
||||
case 232:
|
||||
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
|
||||
case 234:
|
||||
case 236:
|
||||
case 247:
|
||||
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
|
||||
case 235:
|
||||
case 237:
|
||||
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
|
||||
case 241:
|
||||
case 242:
|
||||
case 257:
|
||||
case 258:
|
||||
case 259:
|
||||
case 244:
|
||||
case 245:
|
||||
case 260:
|
||||
case 261:
|
||||
case 262:
|
||||
@ -943,26 +946,29 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 267:
|
||||
case 268:
|
||||
case 269:
|
||||
case 270:
|
||||
case 271:
|
||||
case 272:
|
||||
return aarch64_ins_simple_index (self, info, code, inst, errors);
|
||||
case 245:
|
||||
case 246:
|
||||
case 247:
|
||||
case 248:
|
||||
case 249:
|
||||
case 250:
|
||||
case 251:
|
||||
return aarch64_ins_sme_za_array (self, info, code, inst, errors);
|
||||
case 252:
|
||||
return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
|
||||
case 253:
|
||||
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
|
||||
case 254:
|
||||
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
|
||||
return aarch64_ins_sme_za_array (self, info, code, inst, errors);
|
||||
case 255:
|
||||
return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
|
||||
case 256:
|
||||
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
|
||||
case 257:
|
||||
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
|
||||
case 258:
|
||||
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
|
||||
case 277:
|
||||
case 278:
|
||||
case 279:
|
||||
case 280:
|
||||
case 281:
|
||||
case 282:
|
||||
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
|
||||
default: assert (0); abort ();
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -40,6 +40,7 @@ const struct aarch64_operand aarch64_operands[] =
|
||||
{AARCH64_OPND_CLASS_INT_REG, "Rn_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer or stack pointer register"},
|
||||
{AARCH64_OPND_CLASS_INT_REG, "Rm_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rm}, "an integer or stack pointer register"},
|
||||
{AARCH64_OPND_CLASS_INT_REG, "PAIRREG", OPD_F_HAS_EXTRACTOR, {}, "the second reg of a pair"},
|
||||
{AARCH64_OPND_CLASS_INT_REG, "PAIRREG_OR_XZR", OPD_F_HAS_EXTRACTOR, {}, "the second reg of a pair"},
|
||||
{AARCH64_OPND_CLASS_MODIFIED_REG, "Rm_EXT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an integer register with optional extension"},
|
||||
{AARCH64_OPND_CLASS_MODIFIED_REG, "Rm_SFT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an integer register with optional shift"},
|
||||
{AARCH64_OPND_CLASS_FP_REG, "Fd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a floating-point register"},
|
||||
@ -123,11 +124,13 @@ const struct aarch64_operand aarch64_operands[] =
|
||||
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_OFFSET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm9,FLD_index}, "an address with an optional 8-bit signed immediate offset"},
|
||||
{AARCH64_OPND_CLASS_ADDRESS, "SIMD_ADDR_POST", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a post-indexed address with immediate or register increment"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a system register"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG128", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a 128-bit system register"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "PSTATEFIELD", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a PSTATE field name"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_AT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an address translation operation specifier"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_DC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a data cache maintenance operation specifier"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_IC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an instruction cache maintenance operation specifier"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_TLBI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a TBL invalidation operation specifier"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_TLBIP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a 128-bit TBL invalidation operation specifier"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "SYSREG_SR", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a Speculation Restriction option name (RCTX)"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a barrier option name"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_DSB_NXS", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the DSB nXS option qualifier name SY, ISH, NSH, OSH or an optional 5-bit unsigned immediate"},
|
||||
@ -383,18 +386,18 @@ static const unsigned op_enum_table [] =
|
||||
391,
|
||||
413,
|
||||
415,
|
||||
1300,
|
||||
1304,
|
||||
1305,
|
||||
1310,
|
||||
1302,
|
||||
1301,
|
||||
1306,
|
||||
1298,
|
||||
1297,
|
||||
1302,
|
||||
1309,
|
||||
1311,
|
||||
1312,
|
||||
1308,
|
||||
1314,
|
||||
1313,
|
||||
1315,
|
||||
1316,
|
||||
1312,
|
||||
1318,
|
||||
1317,
|
||||
131,
|
||||
};
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user