aarch64: Add LSE128 instructions
Implement, together with the necessary tests, the following new LSE128
atomic instructions:
* Atomic bit clear on quadword in memory (ldclrp{a|l|al});
* Atomic bit set on quadword in memory (ldsetp{a|l|al});
* Swap quadword in memory (swpp{a|l|al});
gas/ChangeLog:
* testsuite/gas/aarch64/lse128-atomic.d: New.
* testsuite/gas/aarch64/lse128-atomic.s: Likewise.
opcodes/ChangeLog:
* aarch64-tbl.h (ldclrp): new _LSE128_INSN entry.
(ldclrpa): Likewise.
(ldclrpal): Likewise.
(ldclrpl): Likewise.
(ldsetp): Likewise.
(ldsetpa): Likewise.
(ldsetpal): Likewise.
(ldsetpl): Likewise.
(swpp): Likewise.
(swppa): Likewise.
(swppal): Likewise.
(swppl): Likewise.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
This commit is contained in:
Victor Do Nascimento
@@ -1,5 +1,7 @@
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-*- text -*-
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* Add support for 128-bit Atomic Instructions (LSE128) for AArch64.
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* Add support for Guarded Control Stack (GCS) for AArch64.
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* Add support for AArch64 Check Feature Status Extension (CHK).
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@@ -0,0 +1,32 @@
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#objdump: -dr
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#as:-march=armv9-a+lse128
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.*: file format .*
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Disassembly of section \.text:
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0+ <.*>:
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0: 19211040 ldclrp x0, x1, \[x2\]
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4: 192313e2 ldclrp x2, x3, \[sp\]
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8: 19a11040 ldclrpa x0, x1, \[x2\]
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c: 19a313e2 ldclrpa x2, x3, \[sp\]
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10: 19e11040 ldclrpal x0, x1, \[x2\]
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14: 19e313e2 ldclrpal x2, x3, \[sp\]
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18: 19611040 ldclrpl x0, x1, \[x2\]
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1c: 196313e2 ldclrpl x2, x3, \[sp\]
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20: 19213040 ldsetp x0, x1, \[x2\]
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24: 192333e2 ldsetp x2, x3, \[sp\]
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28: 19a13040 ldsetpa x0, x1, \[x2\]
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2c: 19a333e2 ldsetpa x2, x3, \[sp\]
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30: 19e13040 ldsetpal x0, x1, \[x2\]
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34: 19e333e2 ldsetpal x2, x3, \[sp\]
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38: 19613040 ldsetpl x0, x1, \[x2\]
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3c: 196333e2 ldsetpl x2, x3, \[sp\]
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40: 19218040 swpp x0, x1, \[x2\]
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44: 192383e2 swpp x2, x3, \[sp\]
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48: 19a18040 swppa x0, x1, \[x2\]
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4c: 19a383e2 swppa x2, x3, \[sp\]
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50: 19e18040 swppal x0, x1, \[x2\]
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54: 19e383e2 swppal x2, x3, \[sp\]
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58: 19618040 swppl x0, x1, \[x2\]
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5c: 196383e2 swppl x2, x3, \[sp\]
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@@ -0,0 +1,33 @@
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/* lse128-atomic.s Test file For AArch64 LSE128 atomic instructions
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encoding.
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Copyright (C) 2014-2023 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the license, or
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(at your option) any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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.macro format_0 op
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.irp suffix, , a, al, l
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\op\suffix x0, x1, [x2]
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\op\suffix x2, x3, [sp]
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.endr
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.endm
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func:
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format_0 ldclrp
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format_0 ldsetp
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format_0 swpp
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+227
-225
@@ -418,187 +418,187 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
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case 1136: /* lduminl */
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value = 1136; /* --> lduminl. */
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break;
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case 1187: /* mov */
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case 1186: /* movn */
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value = 1186; /* --> movn. */
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case 1199: /* mov */
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case 1198: /* movn */
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value = 1198; /* --> movn. */
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break;
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case 1189: /* mov */
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case 1188: /* movz */
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value = 1188; /* --> movz. */
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case 1201: /* mov */
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case 1200: /* movz */
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value = 1200; /* --> movz. */
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break;
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case 1263: /* autibsp */
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case 1262: /* autibz */
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case 1261: /* autiasp */
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case 1260: /* autiaz */
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case 1259: /* pacibsp */
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case 1258: /* pacibz */
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case 1257: /* paciasp */
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case 1256: /* paciaz */
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case 1241: /* gcsb */
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case 1221: /* clearbhb */
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case 1220: /* tsb */
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case 1219: /* psb */
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case 1218: /* esb */
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case 1217: /* autib1716 */
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case 1216: /* autia1716 */
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case 1215: /* pacib1716 */
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case 1214: /* pacia1716 */
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case 1213: /* xpaclri */
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case 1211: /* sevl */
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case 1210: /* sev */
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case 1209: /* wfi */
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case 1208: /* wfe */
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case 1207: /* yield */
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case 1206: /* bti */
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case 1205: /* csdb */
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case 1204: /* nop */
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case 1203: /* hint */
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value = 1203; /* --> hint. */
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case 1275: /* autibsp */
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case 1274: /* autibz */
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case 1273: /* autiasp */
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case 1272: /* autiaz */
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case 1271: /* pacibsp */
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case 1270: /* pacibz */
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case 1269: /* paciasp */
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case 1268: /* paciaz */
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case 1253: /* gcsb */
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case 1233: /* clearbhb */
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case 1232: /* tsb */
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case 1231: /* psb */
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case 1230: /* esb */
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case 1229: /* autib1716 */
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case 1228: /* autia1716 */
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case 1227: /* pacib1716 */
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case 1226: /* pacia1716 */
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case 1225: /* xpaclri */
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case 1223: /* sevl */
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case 1222: /* sev */
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case 1221: /* wfi */
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case 1220: /* wfe */
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case 1219: /* yield */
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case 1218: /* bti */
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case 1217: /* csdb */
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case 1216: /* nop */
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case 1215: /* hint */
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value = 1215; /* --> hint. */
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break;
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case 1227: /* pssbb */
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case 1226: /* ssbb */
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case 1225: /* dfb */
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case 1223: /* dsb */
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value = 1223; /* --> dsb. */
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case 1239: /* pssbb */
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case 1238: /* ssbb */
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case 1237: /* dfb */
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case 1235: /* dsb */
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value = 1235; /* --> dsb. */
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break;
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case 1224: /* dsb */
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value = 1224; /* --> dsb. */
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case 1236: /* dsb */
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value = 1236; /* --> dsb. */
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break;
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case 1251: /* cpp */
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case 1250: /* dvp */
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case 1249: /* cfp */
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case 1246: /* tlbi */
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case 1245: /* ic */
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case 1244: /* dc */
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case 1243: /* at */
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case 1242: /* sys */
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value = 1242; /* --> sys. */
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case 1263: /* cpp */
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case 1262: /* dvp */
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case 1261: /* cfp */
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case 1258: /* tlbi */
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case 1257: /* ic */
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case 1256: /* dc */
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case 1255: /* at */
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case 1254: /* sys */
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value = 1254; /* --> sys. */
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break;
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case 1247: /* wfet */
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value = 1247; /* --> wfet. */
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case 1259: /* wfet */
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value = 1259; /* --> wfet. */
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break;
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case 1248: /* wfit */
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value = 1248; /* --> wfit. */
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case 1260: /* wfit */
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value = 1260; /* --> wfit. */
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break;
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case 2065: /* bic */
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case 1312: /* and */
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value = 1312; /* --> and. */
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case 2077: /* bic */
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case 1324: /* and */
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value = 1324; /* --> and. */
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break;
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case 1295: /* mov */
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case 1314: /* and */
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value = 1314; /* --> and. */
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case 1307: /* mov */
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case 1326: /* and */
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value = 1326; /* --> and. */
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break;
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case 1299: /* movs */
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case 1315: /* ands */
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value = 1315; /* --> ands. */
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case 1311: /* movs */
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case 1327: /* ands */
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value = 1327; /* --> ands. */
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break;
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case 2066: /* cmple */
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case 1350: /* cmpge */
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value = 1350; /* --> cmpge. */
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case 2078: /* cmple */
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case 1362: /* cmpge */
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value = 1362; /* --> cmpge. */
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break;
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case 2069: /* cmplt */
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case 1353: /* cmpgt */
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value = 1353; /* --> cmpgt. */
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case 2081: /* cmplt */
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case 1365: /* cmpgt */
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value = 1365; /* --> cmpgt. */
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break;
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case 2067: /* cmplo */
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case 1355: /* cmphi */
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value = 1355; /* --> cmphi. */
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case 2079: /* cmplo */
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case 1367: /* cmphi */
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value = 1367; /* --> cmphi. */
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break;
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case 2068: /* cmpls */
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case 1358: /* cmphs */
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value = 1358; /* --> cmphs. */
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case 2080: /* cmpls */
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case 1370: /* cmphs */
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value = 1370; /* --> cmphs. */
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break;
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case 1292: /* mov */
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case 1380: /* cpy */
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value = 1380; /* --> cpy. */
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case 1304: /* mov */
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case 1392: /* cpy */
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value = 1392; /* --> cpy. */
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break;
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case 1294: /* mov */
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case 1381: /* cpy */
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value = 1381; /* --> cpy. */
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case 1306: /* mov */
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case 1393: /* cpy */
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value = 1393; /* --> cpy. */
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break;
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case 2076: /* fmov */
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case 2088: /* fmov */
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case 1309: /* mov */
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case 1394: /* cpy */
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value = 1394; /* --> cpy. */
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break;
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case 1298: /* mov */
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case 1406: /* dup */
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value = 1406; /* --> dup. */
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break;
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case 1301: /* mov */
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case 1297: /* mov */
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case 1382: /* cpy */
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value = 1382; /* --> cpy. */
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case 1407: /* dup */
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value = 1407; /* --> dup. */
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break;
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case 1286: /* mov */
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case 1394: /* dup */
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value = 1394; /* --> dup. */
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case 2087: /* fmov */
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case 1303: /* mov */
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case 1408: /* dup */
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value = 1408; /* --> dup. */
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break;
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case 1289: /* mov */
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case 1285: /* mov */
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case 1395: /* dup */
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value = 1395; /* --> dup. */
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case 1302: /* mov */
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case 1409: /* dupm */
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value = 1409; /* --> dupm. */
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break;
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case 2075: /* fmov */
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case 1291: /* mov */
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case 1396: /* dup */
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value = 1396; /* --> dup. */
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case 2082: /* eon */
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case 1411: /* eor */
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value = 1411; /* --> eor. */
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break;
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case 1290: /* mov */
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case 1397: /* dupm */
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value = 1397; /* --> dupm. */
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case 1312: /* not */
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case 1413: /* eor */
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value = 1413; /* --> eor. */
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break;
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case 2070: /* eon */
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case 1399: /* eor */
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value = 1399; /* --> eor. */
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case 1313: /* nots */
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case 1414: /* eors */
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value = 1414; /* --> eors. */
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break;
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case 1300: /* not */
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case 1401: /* eor */
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value = 1401; /* --> eor. */
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case 2083: /* facle */
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case 1419: /* facge */
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value = 1419; /* --> facge. */
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break;
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case 1301: /* nots */
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case 1402: /* eors */
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value = 1402; /* --> eors. */
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case 2084: /* faclt */
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case 1420: /* facgt */
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value = 1420; /* --> facgt. */
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break;
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case 2071: /* facle */
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case 1407: /* facge */
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value = 1407; /* --> facge. */
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case 2085: /* fcmle */
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case 1433: /* fcmge */
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value = 1433; /* --> fcmge. */
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break;
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case 2072: /* faclt */
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case 1408: /* facgt */
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value = 1408; /* --> facgt. */
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case 2086: /* fcmlt */
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case 1435: /* fcmgt */
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value = 1435; /* --> fcmgt. */
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break;
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case 2073: /* fcmle */
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case 1421: /* fcmge */
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value = 1421; /* --> fcmge. */
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case 1295: /* fmov */
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case 1441: /* fcpy */
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value = 1441; /* --> fcpy. */
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break;
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case 2074: /* fcmlt */
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case 1423: /* fcmgt */
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value = 1423; /* --> fcmgt. */
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break;
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case 1283: /* fmov */
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case 1429: /* fcpy */
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value = 1429; /* --> fcpy. */
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break;
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case 1282: /* fmov */
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case 1452: /* fdup */
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value = 1452; /* --> fdup. */
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break;
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case 1284: /* mov */
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case 1784: /* orr */
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value = 1784; /* --> orr. */
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break;
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case 2077: /* orn */
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case 1785: /* orr */
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value = 1785; /* --> orr. */
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break;
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case 1288: /* mov */
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case 1287: /* mov */
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case 1787: /* orr */
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value = 1787; /* --> orr. */
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break;
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case 1298: /* movs */
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case 1788: /* orrs */
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value = 1788; /* --> orrs. */
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break;
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case 1293: /* mov */
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case 1851: /* sel */
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value = 1851; /* --> sel. */
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case 1294: /* fmov */
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case 1464: /* fdup */
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value = 1464; /* --> fdup. */
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break;
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case 1296: /* mov */
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case 1852: /* sel */
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value = 1852; /* --> sel. */
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case 1796: /* orr */
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value = 1796; /* --> orr. */
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break;
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case 2089: /* orn */
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case 1797: /* orr */
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value = 1797; /* --> orr. */
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break;
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case 1300: /* mov */
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case 1299: /* mov */
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case 1799: /* orr */
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value = 1799; /* --> orr. */
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break;
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case 1310: /* movs */
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case 1800: /* orrs */
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value = 1800; /* --> orrs. */
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break;
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case 1305: /* mov */
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case 1863: /* sel */
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value = 1863; /* --> sel. */
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break;
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case 1308: /* mov */
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case 1864: /* sel */
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value = 1864; /* --> sel. */
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break;
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default: return NULL;
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}
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@@ -643,8 +643,8 @@ aarch64_insert_operand (const aarch64_operand *self,
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case 30:
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case 31:
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case 32:
|
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case 170:
|
||||
case 171:
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||||
case 113:
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||||
case 114:
|
||||
case 172:
|
||||
case 173:
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case 174:
|
||||
@@ -657,8 +657,8 @@ aarch64_insert_operand (const aarch64_operand *self,
|
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case 181:
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||||
case 182:
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||||
case 183:
|
||||
case 198:
|
||||
case 199:
|
||||
case 184:
|
||||
case 185:
|
||||
case 200:
|
||||
case 201:
|
||||
case 202:
|
||||
@@ -666,21 +666,23 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 204:
|
||||
case 205:
|
||||
case 206:
|
||||
case 213:
|
||||
case 216:
|
||||
case 220:
|
||||
case 227:
|
||||
case 228:
|
||||
case 235:
|
||||
case 236:
|
||||
case 207:
|
||||
case 208:
|
||||
case 215:
|
||||
case 218:
|
||||
case 222:
|
||||
case 229:
|
||||
case 230:
|
||||
case 237:
|
||||
case 238:
|
||||
case 239:
|
||||
case 240:
|
||||
return aarch64_ins_regno (self, info, code, inst, errors);
|
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case 6:
|
||||
case 110:
|
||||
case 111:
|
||||
case 270:
|
||||
case 272:
|
||||
case 274:
|
||||
return aarch64_ins_none (self, info, code, inst, errors);
|
||||
case 16:
|
||||
return aarch64_ins_reg_extended (self, info, code, inst, errors);
|
||||
@@ -692,7 +694,7 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 34:
|
||||
case 35:
|
||||
case 36:
|
||||
case 274:
|
||||
case 276:
|
||||
return aarch64_ins_reglane (self, info, code, inst, errors);
|
||||
case 37:
|
||||
return aarch64_ins_reglist (self, info, code, inst, errors);
|
||||
@@ -728,23 +730,23 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 84:
|
||||
case 85:
|
||||
case 109:
|
||||
case 167:
|
||||
case 169:
|
||||
case 190:
|
||||
case 191:
|
||||
case 171:
|
||||
case 192:
|
||||
case 193:
|
||||
case 194:
|
||||
case 195:
|
||||
case 196:
|
||||
case 197:
|
||||
case 241:
|
||||
case 268:
|
||||
case 269:
|
||||
case 198:
|
||||
case 199:
|
||||
case 243:
|
||||
case 270:
|
||||
case 271:
|
||||
case 273:
|
||||
case 278:
|
||||
case 279:
|
||||
case 275:
|
||||
case 280:
|
||||
case 281:
|
||||
return aarch64_ins_imm (self, info, code, inst, errors);
|
||||
case 45:
|
||||
case 46:
|
||||
@@ -754,10 +756,10 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 49:
|
||||
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
|
||||
case 53:
|
||||
case 157:
|
||||
case 159:
|
||||
return aarch64_ins_fpimm (self, info, code, inst, errors);
|
||||
case 71:
|
||||
case 165:
|
||||
case 167:
|
||||
return aarch64_ins_limm (self, info, code, inst, errors);
|
||||
case 72:
|
||||
return aarch64_ins_aimm (self, info, code, inst, errors);
|
||||
@@ -767,11 +769,11 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
return aarch64_ins_fbits (self, info, code, inst, errors);
|
||||
case 76:
|
||||
case 77:
|
||||
case 162:
|
||||
case 164:
|
||||
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
|
||||
case 78:
|
||||
case 161:
|
||||
case 163:
|
||||
case 165:
|
||||
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
|
||||
case 79:
|
||||
case 80:
|
||||
@@ -814,25 +816,23 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
return aarch64_ins_prfop (self, info, code, inst, errors);
|
||||
case 112:
|
||||
return aarch64_ins_hint (self, info, code, inst, errors);
|
||||
case 113:
|
||||
case 114:
|
||||
return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
|
||||
case 115:
|
||||
case 116:
|
||||
return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
|
||||
case 117:
|
||||
case 118:
|
||||
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
|
||||
case 119:
|
||||
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
|
||||
case 120:
|
||||
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
|
||||
case 121:
|
||||
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
|
||||
case 122:
|
||||
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
|
||||
case 123:
|
||||
case 124:
|
||||
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
|
||||
case 125:
|
||||
case 126:
|
||||
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
|
||||
case 127:
|
||||
case 128:
|
||||
case 129:
|
||||
@@ -846,87 +846,87 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 137:
|
||||
case 138:
|
||||
case 139:
|
||||
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
|
||||
case 140:
|
||||
case 141:
|
||||
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
|
||||
case 142:
|
||||
case 143:
|
||||
case 144:
|
||||
case 145:
|
||||
case 146:
|
||||
case 147:
|
||||
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
|
||||
case 148:
|
||||
case 149:
|
||||
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
|
||||
case 150:
|
||||
case 151:
|
||||
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
|
||||
case 152:
|
||||
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
|
||||
case 153:
|
||||
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
|
||||
case 154:
|
||||
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
|
||||
case 155:
|
||||
return aarch64_ins_sve_aimm (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
|
||||
case 156:
|
||||
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
|
||||
case 157:
|
||||
return aarch64_ins_sve_aimm (self, info, code, inst, errors);
|
||||
case 158:
|
||||
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
|
||||
case 159:
|
||||
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
|
||||
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
|
||||
case 160:
|
||||
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
|
||||
case 161:
|
||||
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
|
||||
case 162:
|
||||
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
|
||||
case 164:
|
||||
return aarch64_ins_inv_limm (self, info, code, inst, errors);
|
||||
case 166:
|
||||
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
|
||||
return aarch64_ins_inv_limm (self, info, code, inst, errors);
|
||||
case 168:
|
||||
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
|
||||
case 170:
|
||||
return aarch64_ins_sve_scale (self, info, code, inst, errors);
|
||||
case 184:
|
||||
case 185:
|
||||
case 186:
|
||||
return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
|
||||
case 187:
|
||||
case 188:
|
||||
return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
|
||||
case 189:
|
||||
case 254:
|
||||
case 190:
|
||||
case 191:
|
||||
case 256:
|
||||
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
|
||||
case 207:
|
||||
case 208:
|
||||
case 209:
|
||||
case 210:
|
||||
case 211:
|
||||
case 212:
|
||||
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
|
||||
case 213:
|
||||
case 214:
|
||||
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
|
||||
case 216:
|
||||
return aarch64_ins_sve_index (self, info, code, inst, errors);
|
||||
case 215:
|
||||
case 217:
|
||||
case 234:
|
||||
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
|
||||
case 218:
|
||||
case 219:
|
||||
case 236:
|
||||
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
|
||||
case 220:
|
||||
case 221:
|
||||
case 222:
|
||||
case 223:
|
||||
case 224:
|
||||
case 233:
|
||||
return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
|
||||
case 225:
|
||||
case 226:
|
||||
case 235:
|
||||
return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
|
||||
case 227:
|
||||
case 228:
|
||||
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
|
||||
case 229:
|
||||
case 231:
|
||||
case 242:
|
||||
case 233:
|
||||
case 244:
|
||||
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
|
||||
case 230:
|
||||
case 232:
|
||||
case 234:
|
||||
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
|
||||
case 239:
|
||||
case 240:
|
||||
case 255:
|
||||
case 256:
|
||||
case 241:
|
||||
case 242:
|
||||
case 257:
|
||||
case 258:
|
||||
case 259:
|
||||
@@ -938,26 +938,28 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 265:
|
||||
case 266:
|
||||
case 267:
|
||||
case 268:
|
||||
case 269:
|
||||
return aarch64_ins_simple_index (self, info, code, inst, errors);
|
||||
case 243:
|
||||
case 244:
|
||||
case 245:
|
||||
case 246:
|
||||
case 247:
|
||||
case 248:
|
||||
case 249:
|
||||
return aarch64_ins_sme_za_array (self, info, code, inst, errors);
|
||||
case 250:
|
||||
return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
|
||||
case 251:
|
||||
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
|
||||
return aarch64_ins_sme_za_array (self, info, code, inst, errors);
|
||||
case 252:
|
||||
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
|
||||
return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
|
||||
case 253:
|
||||
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
|
||||
case 254:
|
||||
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
|
||||
case 255:
|
||||
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
|
||||
case 275:
|
||||
case 276:
|
||||
case 277:
|
||||
case 278:
|
||||
case 279:
|
||||
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
|
||||
default: assert (0); abort ();
|
||||
}
|
||||
|
||||
+2290
-2156
File diff suppressed because it is too large
Load Diff
+17
-15
@@ -137,6 +137,8 @@ const struct aarch64_operand aarch64_operands[] =
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB/TSB option name CSYNC"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_GCSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the GCSB option name DSYNC"},
|
||||
{AARCH64_OPND_CLASS_SYSTEM, "BTI_TARGET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets j/c/jc"},
|
||||
{AARCH64_OPND_CLASS_INT_REG, "LSE128_Rt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_LSE128_Rt}, "an integer register"},
|
||||
{AARCH64_OPND_CLASS_INT_REG, "LSE128_Rt2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_LSE128_Rt2}, "an integer register"},
|
||||
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x16", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 16"},
|
||||
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x32", 5 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 32"},
|
||||
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by VL"},
|
||||
@@ -344,12 +346,12 @@ static const unsigned op_enum_table [] =
|
||||
12,
|
||||
636,
|
||||
637,
|
||||
1186,
|
||||
1188,
|
||||
1190,
|
||||
1198,
|
||||
1200,
|
||||
1202,
|
||||
998,
|
||||
1189,
|
||||
1187,
|
||||
1201,
|
||||
1199,
|
||||
318,
|
||||
624,
|
||||
635,
|
||||
@@ -381,18 +383,18 @@ static const unsigned op_enum_table [] =
|
||||
391,
|
||||
413,
|
||||
415,
|
||||
1287,
|
||||
1288,
|
||||
1293,
|
||||
1285,
|
||||
1284,
|
||||
1289,
|
||||
1296,
|
||||
1298,
|
||||
1299,
|
||||
1295,
|
||||
1301,
|
||||
1300,
|
||||
1305,
|
||||
1297,
|
||||
1296,
|
||||
1301,
|
||||
1308,
|
||||
1310,
|
||||
1311,
|
||||
1307,
|
||||
1313,
|
||||
1312,
|
||||
131,
|
||||
};
|
||||
|
||||
|
||||
@@ -4104,6 +4104,19 @@ const struct aarch64_opcode aarch64_opcode_table[] =
|
||||
_LSE_INSN ("stuminlb", 0x3860701f, 0xffe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS),
|
||||
_LSE_INSN ("stuminlh", 0x7860701f, 0xffe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS),
|
||||
_LSE_INSN ("stuminl", 0xb860701f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
|
||||
/* LSE128 extension (atomic). */
|
||||
_LSE128_INSN ("ldclrp", 0x19201000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldclrpa", 0x19a01000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldclrpal", 0x19e01000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldclrpl", 0x19601000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldsetp", 0x19203000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldsetpa", 0x19a03000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldsetpal", 0x19e03000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("ldsetpl", 0x19603000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("swpp", 0x19208000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("swppa", 0x19a08000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("swppal", 0x19e08000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
_LSE128_INSN ("swppl", 0x19608000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
|
||||
/* Move wide (immediate). */
|
||||
CORE_INSN ("movn", 0x12800000, 0x7f800000, movewide, OP_MOVN, OP2 (Rd, HALF), QL_DST_R, F_SF | F_HAS_ALIAS),
|
||||
CORE_INSN ("mov", 0x12800000, 0x7f800000, movewide, OP_MOV_IMM_WIDEN, OP2 (Rd, IMM_MOV), QL_DST_R, F_SF | F_ALIAS | F_CONV),
|
||||
|
||||
Reference in New Issue
Block a user