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Author SHA1 Message Date
Alan Modra
fd67aa1129 Update year range in copyright notice of binutils files 
Adds two new external authors to etc/update-copyright.py to cover
bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then
updates copyright messages as follows:

1) Update cgen/utils.scm emitted copyrights.
2) Run "etc/update-copyright.py --this-year" with an extra external
   author I haven't committed, 'Kalray SA.', to cover gas testsuite
   files (which should have their copyright message removed).
3) Build with --enable-maintainer-mode --enable-cgen-maint=yes.
4) Check out */po/*.pot which we don't update frequently.
 2024-01-04 22:58:12 +10:30
Matthieu Longo
528c1f2b58 aarch64: Enable Cortex-X3 CPU 
Hi,

This patch adds support for the Cortex-X3 CPU to binutils.

Gas regression testing for aarch64-none-linux-gnu target and found no regressions.

Ok for binutils-master? I don't have commit access so I need someone to commit on my behalf.

Regards,

Matthieu.
 2023-12-15 14:54:20 +00:00
Saurabh Jha
0515a7b643 aarch64: Enable Cortex-X4 CPU 2023-10-05 11:09:45 +01:00
Richard Ball
7d6a2e34ee aarch64: Enable Cortex-A720 CPU 
This patch adds support for the Cortex-A720 CPU to binutils.

bfd/ChangeLog:

	* cpu-aarch64.c: Add Cortex-A720.

gas/ChangeLog:

	* NEWS: Update docs.
	* config/tc-aarch64.c: Add Cortex-A720.
	* doc/c-aarch64.texi: Update docs.
	* testsuite/gas/aarch64/cpu-cortex-a720.d: New test.
 2023-08-16 14:08:09 +01:00
Alan Modra
d87bef3a7b Update year range in copyright notice of binutils files 
The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
 2023-01-01 21:50:11 +10:30
Nick Clifton
1a7e622b82 Fix ARM and AArch64 assembler tests to work in a multi-arch environment. 
PR 29764
gas	* testsuite/gas/arm/cpu-cortex-a76ae.d: Add arm prefix to the -m
	option passed to objdump.
	* testsuite/gas/arm/cpu-cortex-a77.d: Likewise.
	* testsuite/gas/aarch64/cpu-cortex-a76ae.d: Add aarch64 prefix to
	the -m option passed to objdump.
	* testsuite/gas/aarch64/cpu-cortex-a77.d: Likewise.

bfd	* cpu-arm.c (scan): Accept machine names prefixed with "arm:".
	* cpu-aarch64.c (scan): Accept machine names prefixed with "aarch64:".

bin	* doc/binutils.texi (objdump): Note that the -m option supports
	the <architecture>:<machine> syntax.
 2022-11-21 16:44:02 +00:00
Jedidiah Thompson
c60b380679 aarch64-pe support for LD, GAS and BFD 
Allows aarch64-pe to be targeted natively, not having to use objcopy to convert it from ELF to PE.
Based on initial work by Jedidiah Thompson

Co-authored-by: Jedidiah Thompson <wej22007@outlook.com>
Co-authored-by: Zac Walker <zac.walker@linaro.org>
 2022-10-19 10:57:12 +02:00
Alan Modra
a2c5833233 Update year range in copyright notice of binutils files 
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.

The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
 2022-01-02 12:04:28 +10:30
Alan Modra
0a1b45a20e Use bool in bfd 
* sysdep.h: POISON_BFD_BOOLEAN: Define.
	* aix5ppc-core.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h,
	* aoutx.h, * arc-got.h, * archive.c, * archive64.c, * archures.c,
	* bfd-in.h, * bfd.c, * bfdwin.c, * binary.c, * cache.c,
	* coff-alpha.c, * coff-arm.c, * coff-arm.h, * coff-bfd.c,
	* coff-bfd.h, * coff-go32.c, * coff-i386.c, * coff-ia64.c,
	* coff-mcore.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c,
	* coff-stgo32.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c,
	* coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c,
	* coffcode.h, * coffgen.c, * cofflink.c, * compress.c,
	* corefile.c, * cpu-aarch64.c, * cpu-aarch64.h, * cpu-alpha.c,
	* cpu-arc.c, * cpu-arm.c, * cpu-arm.h, * cpu-avr.c, * cpu-bfin.c,
	* cpu-bpf.c, * cpu-cr16.c, * cpu-cris.c, * cpu-crx.c,
	* cpu-csky.c, * cpu-d10v.c, * cpu-d30v.c, * cpu-dlx.c,
	* cpu-epiphany.c, * cpu-fr30.c, * cpu-frv.c, * cpu-ft32.c,
	* cpu-h8300.c, * cpu-hppa.c, * cpu-i386.c, * cpu-ia64.c,
	* cpu-iamcu.c, * cpu-ip2k.c, * cpu-iq2000.c, * cpu-k1om.c,
	* cpu-l1om.c, * cpu-lm32.c, * cpu-m10200.c, * cpu-m10300.c,
	* cpu-m32c.c, * cpu-m32r.c, * cpu-m68hc11.c, * cpu-m68hc12.c,
	* cpu-m68k.c, * cpu-m9s12x.c, * cpu-m9s12xg.c, * cpu-mcore.c,
	* cpu-mep.c, * cpu-metag.c, * cpu-microblaze.c, * cpu-mips.c,
	* cpu-mmix.c, * cpu-moxie.c, * cpu-msp430.c, * cpu-mt.c,
	* cpu-nds32.c, * cpu-nfp.c, * cpu-nios2.c, * cpu-ns32k.c,
	* cpu-or1k.c, * cpu-pdp11.c, * cpu-pj.c, * cpu-powerpc.c,
	* cpu-pru.c, * cpu-riscv.c, * cpu-rl78.c, * cpu-rs6000.c,
	* cpu-rx.c, * cpu-s12z.c, * cpu-s390.c, * cpu-score.c,
	* cpu-sh.c, * cpu-sparc.c, * cpu-spu.c, * cpu-tic30.c,
	* cpu-tic4x.c, * cpu-tic54x.c, * cpu-tic6x.c, * cpu-tilegx.c,
	* cpu-tilepro.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-vax.c,
	* cpu-visium.c, * cpu-wasm32.c, * cpu-xc16x.c, * cpu-xgate.c,
	* cpu-xstormy16.c, * cpu-xtensa.c, * cpu-z80.c, * cpu-z8k.c,
	* dwarf1.c, * dwarf2.c, * ecoff-bfd.h, * ecoff.c, * ecofflink.c,
	* elf-attrs.c, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-nacl.c,
	* elf-nacl.h, * elf-properties.c, * elf-s390-common.c,
	* elf-s390.h, * elf-strtab.c, * elf-vxworks.c, * elf-vxworks.h,
	* elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c,
	* elf32-arm.h, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c,
	* elf32-bfin.h, * elf32-cr16.c, * elf32-cr16.h, * elf32-cris.c,
	* elf32-crx.c, * elf32-csky.c, * elf32-csky.h, * elf32-d10v.c,
	* elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
	* elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c,
	* elf32-h8300.c, * elf32-hppa.c, * elf32-hppa.h, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
	* elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c,
	* elf32-m68k.h, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c,
	* elf32-metag.h, * elf32-microblaze.c, * elf32-mips.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-nios2.h, * elf32-or1k.c, * elf32-pj.c,
	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s12z.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score.h, * elf32-score7.c, * elf32-sh-relocs.h,
	* elf32-sh.c, * elf32-sparc.c, * elf32-spu.c, * elf32-spu.h,
	* elf32-tic6x.c, * elf32-tic6x.h, * elf32-tilegx.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-v850.h,
	* elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c,
	* elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
	* elf32-xtensa.c, * elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c,
	* elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c,
	* elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c,
	* elf64-ppc.h, * elf64-s390.c, * elf64-sparc.c,
	* elf64-tilegx.c, * elf64-x86-64.c, * elfcode.h,
	* elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c,
	* elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c,
	* elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h,
	* elfxx-mips.c, * elfxx-mips.h, * elfxx-riscv.c, * elfxx-riscv.h,
	* elfxx-sparc.c, * elfxx-sparc.h, * elfxx-target.h,
	* elfxx-tilegx.c, * elfxx-tilegx.h, * elfxx-x86.c, * elfxx-x86.h,
	* format.c, * genlink.h, * hash.c, * i386aout.c, * i386lynx.c,
	* i386msdos.c, * ihex.c, * libaout.h, * libbfd-in.h,
	* libbfd.c, * libcoff-in.h, * libecoff.h, * libpei.h,
	* libxcoff.h, * linker.c, * mach-o-aarch64.c, * mach-o-arm.c,
	* mach-o-i386.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h,
	* merge.c, * mmo.c, * netbsd.h, * opncls.c, * pc532-mach.c,
	* pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-sh.c,
	* pe-x86_64.c, * peXXigen.c, * pef.c, * pei-arm.c, * pei-i386.c,
	* pei-ia64.c, * pei-mcore.c, * pei-sh.c, * pei-x86_64.c,
	* peicode.h, * plugin.c, * plugin.h, * ppcboot.c, * reloc.c,
	* reloc16.c, * rs6000-core.c, * section.c, * simple.c, * som.c,
	* som.h, * srec.c, * stabs.c, * syms.c, * targets.c, * tekhex.c,
	* verilog.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * vms.h,
	* wasm-module.c, * xcofflink.c, * xcofflink.h, * xsym.c,
	* xsym.h: Replace bfd_boolean with bool, FALSE with false, and
	TRUE with true throughout.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* libcoff.h: Regenerate.
 2021-03-31 10:49:23 +10:30
Alan Modra
250d07de5c Update year range in copyright notice of binutils files 2021-01-01 10:31:05 +10:30
Alex Coplan
95830c988a aarch64: Add base support for Armv8-R 
This patch adds the basic infrastructure needed to support Armv8-R in
AArch64 binutils: new command-line flags, new feature bits, a new BFD
architecture, and support for differentiating between architecture
variants in the disassembler.

The new command-line options added by this patch are -march=armv8-r in
GAS and -m aarch64:armv8-r in objdump.

The disassembler support is necessary since Armv8-R AArch64 introduces a
system register (VSCTLR_EL2) which shares an encoding with a different
system register (TTBR0_EL2) in Armv8-A. This also allows us to use the
correct preferred disassembly for the new DFB alias introduced in
Armv8-R.

bfd/ChangeLog:

2020-09-08  Alex Coplan  <alex.coplan@arm.com>

	* archures.c (bfd_mach_aarch64_8R): New.
	* bfd-in2.h: Regenerate.
	* cpu-aarch64.c (bfd_aarch64_arch_v8_r): New.
	(bfd_aarch64_arch_ilp32): Update tail pointer.

gas/ChangeLog:

2020-09-08  Alex Coplan  <alex.coplan@arm.com>

	* config/tc-aarch64.c (aarch64_archs): Add armv8-r.
	* doc/c-aarch64.texi: Document -march=armv8-r.

include/ChangeLog:

2020-09-08  Alex Coplan  <alex.coplan@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_V8_A): New.
	(AARCH64_FEATURE_V8_R): New.
	(AARCH64_ARCH_V8): Include new A-profile feature bit.
	(AARCH64_ARCH_V8_R): New.

opcodes/ChangeLog:

2020-09-08  Alex Coplan  <alex.coplan@arm.com>

	* aarch64-dis.c (arch_variant): New.
	(determine_disassembling_preference): Disassemble according to
	arch variant.
	(select_aarch64_variant): New.
	(print_insn_aarch64): Set feature set.
 2020-09-08 14:14:11 +01:00
Alan Modra
b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Alan Modra
a8bfaadbb4 aarch64 bfd.h tidy 
bfd/
	* bfd-in.h: Move aarch64 declarations and defines..
	* cpu-aarch64.h: ..to here, new file..
	* elfxx-aarch64.h: ..and here.
	* cpu-aarch64.c: Include cpu-aarch64.h.
	* elfnn-aarch64.c: Likewise.
	* bfd-in2.h: Regenerate.
ld/
	* emultempl/aarch64elf.em: Include elfxx-aarch64.h.
 2019-09-23 10:27:21 +09:30
Nick Clifton
aebcfb76fc Enhance the disassembler so that it will reliably determine whether a reloc applies to the middle of the next insn. 
PR 24907
binutils* objdump.c (null_print): New function.
	(disassemble_bytes): Delete previous_octets local and replace with
	a test of the max_reloc_offset_into_insn field of the
	bfd_arch_info structure.  If a reloc is a potential match for the
	next insn, then perform a dummy disassembly in order to calculate
	its real length.

bfd	* archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn
	field.
	(bfd_default_arch_struct): Initialise the new field.
	* bfd-in2.h: Regenerate.
	* cpu-aarch64.c: Initialise the new field.
	* cpu-alpha.c: Likewise.
	* cpu-arc.c: Likewise.
	* cpu-arm.c: Likewise.
	* cpu-avr.c: Likewise.
	* cpu-bfin.c: Likewise.
	* cpu-bpf.c: Likewise.
	* cpu-cr16.c: Likewise.
	* cpu-cr16c.c: Likewise.
	* cpu-cris.c: Likewise.
	* cpu-crx.c: Likewise.
	* cpu-csky.c: Likewise.
	* cpu-d10v.c: Likewise.
	* cpu-d30v.c: Likewise.
	* cpu-dlx.c: Likewise.
	* cpu-epiphany.c: Likewise.
	* cpu-fr30.c: Likewise.
	* cpu-frv.c: Likewise.
	* cpu-ft32.c: Likewise.
	* cpu-h8300.c: Likewise.
	* cpu-hppa.c: Likewise.
	* cpu-i386.c: Likewise.
	* cpu-ia64.c: Likewise.
	* cpu-iamcu.c: Likewise.
	* cpu-ip2k.c: Likewise.
	* cpu-iq2000.c: Likewise.
	* cpu-k1om.c: Likewise.
	* cpu-l1om.c: Likewise.
	* cpu-lm32.c: Likewise.
	* cpu-m10200.c: Likewise.
	* cpu-m10300.c: Likewise.
	* cpu-m32c.c: Likewise.
	* cpu-m32r.c: Likewise.
	* cpu-m68hc11.c: Likewise.
	* cpu-m68hc12.c: Likewise.
	* cpu-m68k.c: Likewise.
	* cpu-m9s12x.c: Likewise.
	* cpu-m9s12xg.c: Likewise.
	* cpu-mcore.c: Likewise.
	* cpu-mep.c: Likewise.
	* cpu-metag.c: Likewise.
	* cpu-microblaze.c: Likewise.
	* cpu-mips.c: Likewise.
	* cpu-mmix.c: Likewise.
	* cpu-moxie.c: Likewise.
	* cpu-msp430.c: Likewise.
	* cpu-mt.c: Likewise.
	* cpu-nds32.c: Likewise.
	* cpu-nfp.c: Likewise.
	* cpu-nios2.c: Likewise.
	* cpu-ns32k.c: Likewise.
	* cpu-or1k.c: Likewise.
	* cpu-pdp11.c: Likewise.
	* cpu-pj.c: Likewise.
	* cpu-plugin.c: Likewise.
	* cpu-powerpc.c: Likewise.
	* cpu-pru.c: Likewise.
	* cpu-riscv.c: Likewise.
	* cpu-rl78.c: Likewise.
	* cpu-rs6000.c: Likewise.
	* cpu-rx.c: Likewise.
	* cpu-s12z.c: Likewise.
	* cpu-s390.c: Likewise.
	* cpu-score.c: Likewise.
	* cpu-sh.c: Likewise.
	* cpu-sparc.c: Likewise.
	* cpu-spu.c: Likewise.
	* cpu-tic30.c: Likewise.
	* cpu-tic4x.c: Likewise.
	* cpu-tic54x.c: Likewise.
	* cpu-tic6x.c: Likewise.
	* cpu-tic80.c: Likewise.
	* cpu-tilegx.c: Likewise.
	* cpu-tilepro.c: Likewise.
	* cpu-v850.c: Likewise.
	* cpu-v850_rh850.c: Likewise.
	* cpu-vax.c: Likewise.
	* cpu-visium.c: Likewise.
	* cpu-wasm32.c: Likewise.
	* cpu-xc16x.c: Likewise.
	* cpu-xgate.c: Likewise.
	* cpu-xstormy16.c: Likewise.
	* cpu-xtensa.c: Likewise.
	* cpu-z80.c: Likewise.
	* cpu-z8k.c: Likewise.

gas	* testsuite/gas/arm/pr24907.s: New test.
	* testsuite/gas/arm/pr24907.d: Expected disassembly.
 2019-09-10 15:20:58 +01:00
Dennis Zhang
546053acfa Adds support for following CPUs to the ARM and Aarch64 assemblers: Cortex-A77, Cortex-A76AE, Cortex-A34, Cortex-A65, and Cortex-A65AE. 
Related specifications can be found at
https://developer.arm.com/ip-products/processors.

gas	* NEWS: Mention the Arm and AArch64 new processors.
	* config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
	Cortex-A77, cortex-A65AE, and Cortex-A76AE.
	* doc/c-aarch64.texi: Document new CPUs.
	* testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
	* testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
	* testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
	* testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
	* testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
	* testsuite/gas/aarch64/nop-asm.s: New test.

bfd	* cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65,
	 Cortex-A77, cortex-A65AE, and Cortex-A76AE.
 2019-08-20 17:13:29 +01:00
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Yury Norov
3145b99715 bfd: aarch64: fix word and arrdess size declaration in ilp32 mode 
ILP32 has 32-bit word and address, but currently they declared as 64-bit in
bfd_aarch64_arch_ilp32, which breaks further logic of bfd. This patch fixes it.

Glibc testsuite build with patched binutils shows that next tests stop to fail:
iconvdata/mtrace-tst-loading
iconvdata/tst-loading
iconvdata/tst-tables
localedata/mtrace-tst-leaks
localedata/tst-leaks
posix/tst-getaddrinfo4
posix/tst-getaddrinfo5
posix/tst-regex2
 2016-12-21 17:56:03 +05:30
Yury Norov
7acd51d697 Revert "bfd: aarch64: fix word and arrdess size declaration in ilp32 mode" 
This reverts commit a02c3512655cc2c8ad68e4b656959b7d284acc7d.
 2016-12-14 11:57:42 +05:30
Yury Norov
a02c351265 bfd: aarch64: fix word and arrdess size declaration in ilp32 mode 2016-12-14 11:07:24 +05:30
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Yufeng Zhang
cec5225bd8 [AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld 
and gas.

bfd/

	* Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo.
	(BUILD_CFILES): Add elf32-aarch64.c.
	(elf32-aarch64.c): New rule for generating from elfnn-aarch64.c.
	* Makefile.in: Re-generated.
	* archures.c (bfd_mach_aarch64_ilp32): New define.
	* bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration.
	(bfd_elf32_aarch64_set_options): Ditto.
	(elf32_aarch64_setup_section_lists): Ditto.
	(elf32_aarch64_next_input_section): Ditto.
	(elf32_aarch64_size_stubs): Ditto.
	(elf32_aarch64_build_stubs): Ditto.
	* bfd-in2.h: Re-generated.
	* config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec
	and bfd_elf32_bigaarch64_vec.
	(aarch64-*-linux*): Likewise.
	(aarch64_be-*-elf): Likewise.
	(aarch64_be-*-linux*): Likewise.
	* configure.in (bfd_elf32_bigaarch64_vec)
	(bfd_elf32_littleaarch64_vec): New.
	* configure: Re-generated.
	* cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with
	lp64 ones.
	(bfd_aarch64_arch_ilp32): New.
	(bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32.
	* elfnn-aarch64.c (ARCH_SIZE): New define.
	(AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines.
	(GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8).
	(elf64_aarch64_*): Rename to elfNN_aarch64_*.
	(ELF64_R_*): Rename to ELFNN_R_*.
	Plus other paramaterization.
	* targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec):
	New declarations.
	(_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and
	bfd_elf32_littleaarch64_vec.

gas/

	* config/tc-aarch64.c (ilp32_p): New static variable.
	(elf64_aarch64_target_format): Return the target according to the
	value of 'ilp32_p'.
	(md_begin): Determine 'mach' according to the value of 'ilp32_p'.
	(aarch64_opts): Add support for options '-milp32' and '-mlp64'.
	(aarch64_dwarf2_addr_size): New function.
	* config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
	(DWARF2_ADDR_SIZE): New define.

ld/

	* Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c.
	(eaarch64elf32.c): New dependency and rule.
	* Makefile.in: Re-generated.
	* configure.tgt (aarch64-*-elf): Add aarch64elf32.
	(aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise.
	* emulparams/aarch64elf32.sh: New file.
 2013-06-26 10:41:42 +00:00
Nick Clifton
a06ea96464 Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:54 +00:00