Tsukasa OI 9869e2e5c7 opcodes: Add non-enum disassembler options
This is paired with "gdb: Add non-enum disassembler options".

There is a portable mechanism for disassembler options and used on some
architectures:

-   ARC
-   Arm
-   MIPS
-   PowerPC
-   RISC-V
-   S/390

However, it only supports following forms:

-   [NAME]
-   [NAME]=[ENUM_VALUE]

Valid values for [ENUM_VALUE] must be predefined in
disasm_option_arg_t.values. For instance, for -M cpu=[CPU] in ARC
architecture, opcodes/arc-dis.c builds valid CPU model list from
include/elf/arc-cpu.def.

In this commit, it adds following format:

-   [NAME]=[ARBITRARY_VALUE] (cannot contain "," though)

This is identified by NULL value of disasm_option_arg_t.values
(normally, this is a non-NULL pointer to a NULL-terminated list).

include/ChangeLog:

	* dis-asm.h (disasm_option_arg_t): Update comment of values
	to allow non-enum disassembler options.

opcodes/ChangeLog:

	* riscv-dis.c (print_riscv_disassembler_options): Support
	non-enum disassembler options on printing disassembler help.
	* arc-dis.c (print_arc_disassembler_options): Likewise.
	* mips-dis.c (print_mips_disassembler_options): Likewise.
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