yggdrasil/binutils-gdb
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binutils-gdb/sim
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Mike Frysinger ee45e43358 sim: bfin: fix -Wunused-but-set-variable warnings
2023-12-07 21:41:27 -07:00
..
aarch64
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
arm
sim: arm: fix -Wunused-but-set-variable warnings
2023-12-07 21:41:27 -07:00
avr
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
bfin
sim: bfin: fix -Wunused-but-set-variable warnings
2023-12-07 21:41:27 -07:00
bpf
sim: bpf: remove negi, neg32i insns
2023-08-21 10:07:25 -07:00
common
Simplify definition of GUILE
2023-08-26 13:09:38 -06:00
cr16
sim: formally assume unistd.h always exists (via gnulib)
2023-01-16 04:35:48 -05:00
cris
sim: cris: move generated file to right place
2023-12-06 20:11:05 -07:00
d10v
sim: info: convert verbose field to a bool
2023-01-18 20:47:55 -05:00
erc32
sim: info: convert verbose field to a bool
2023-01-18 20:47:55 -05:00
example-synacor
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
frv
sim regen
2023-08-19 12:41:32 +09:30
ft32
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
h8300
sim: info: convert verbose field to a bool
2023-01-18 20:47:55 -05:00
igen
sim: igen: simplify build logic a little
2023-01-15 02:07:43 -05:00
iq2000
sim regen
2023-08-19 12:41:32 +09:30
lm32
sim regen
2023-08-19 12:41:32 +09:30
m4
sim: warnings: disable -Wenum-conversion fow now [PR sim/29752]
2023-12-07 06:00:25 -07:00
m32c
sim: m32c: use UTF-8 encoding
2023-12-05 07:50:56 -05:00
m32r
sim: m32r: fix syslog call
2023-12-07 21:41:27 -07:00
m68hc11
sim: info: convert verbose field to a bool
2023-01-18 20:47:55 -05:00
mcore
Fix right shifts in mcore simulator on 64 bit hosts.
2023-12-01 07:19:50 -07:00
microblaze
sim: info: convert verbose field to a bool
2023-01-18 20:47:55 -05:00
mips
sim: mips: fix sim_fpu usage
2023-12-05 06:12:02 -07:00
mn10300
sim: mn10300: fix sim_engine_halt call
2023-12-05 07:56:52 -05:00
moxie
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
msp430
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
or1k
sim regen
2023-08-19 12:41:32 +09:30
ppc
sim: ppc: fix implicit enum conversion
2023-12-04 23:41:31 -05:00
pru
sim: modules.c: fix generation after recent refactors
2023-01-15 20:55:48 -05:00
riscv
sim/riscv: fix JALR instruction simulation
2023-10-18 17:55:31 +01:00
rl78
Rename bfd_bread and bfd_bwrite
2023-08-09 08:48:09 +09:30
rx
sim: rx: mark unused static var as unused
2023-12-04 23:49:48 -05:00
sh
sim: sh: trim trailing whitespace in generated code
2023-12-05 06:05:19 -07:00
testsuite
Fix right shifts in mcore simulator on 64 bit hosts.
2023-12-01 07:19:50 -07:00
v850
sim: v850: reduce extra header inclusion to igen files
2023-01-18 19:13:04 -05:00
.gitignore
sim: drop unused gentmap & nltvals.def logic
2021-11-28 13:24:00 -05:00
aclocal.m4
sim: smp: make option available again
2022-12-25 02:13:30 -05:00
arch-subdir.mk.in
sim: build: drop support for creating libsim.a in subdirs
2023-01-10 01:15:26 -05:00
ChangeLog-2021
sim: rename ChangeLog files to ChangeLog-2021
2021-08-17 20:27:36 -04:00
config.h.in
sim: build: stop probing system extensions (ourselves)
2023-01-16 04:22:10 -05:00
configure
sim: warnings: disable -Wenum-conversion fow now [PR sim/29752]
2023-12-07 06:00:25 -07:00
configure.ac
sim: warnings: enable only for development builds
2023-12-04 23:45:27 -05:00
COPYING
sim: clarify license text via COPYING file
2021-11-06 01:44:06 -04:00
gdbinit.in
sim: gdbinit: hoist setup to common code
2022-02-21 13:57:33 -05:00
MAINTAINERS
sim: Update mailing list address
2022-09-01 10:15:09 -04:00
Makefile.am
sim: warnings: enable only for development builds
2023-12-04 23:45:27 -05:00
Makefile.in
sim: m32r: add more cgen prototypes to enable -Werror in most files
2023-12-07 06:22:32 -07:00
README-HACKING
sim: build: delete Make-common.in logic
2023-01-13 17:34:53 -05:00