xtensa: constantsynth: Make try to find shorter instruction
This patch allows the constant synthesis to choose shorter instruction
if possible.
/* example */
int test(void) {
return 128 << 8;
}
;; before
test:
movi a2, 0x100
addmi a2, a2, 0x7f00
ret.n
;; after
test:
movi.n a2, 1
slli a2, a2, 15
ret.n
When the Code Density Option is configured, the latter is one byte smaller
than the former.
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_emit_constantsynth): Remove.
(xtensa_constantsynth_2insn): Change to try all three synthetic
methods and to use the one that fits the immediate value of
the seed into a Narrow Move Immediate instruction "MOVI.N"
when the Code Density Option is configured.
This commit is contained in:
committed by
Max Filippov
parent
bdc7b765f8
commit
1884f89782
+29
-29
@@ -1035,35 +1035,35 @@ xtensa_split_operand_pair (rtx operands[4], machine_mode mode)
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load-immediate / arithmetic ones, instead of a L32R instruction
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(plus a constant in litpool). */
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static void
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xtensa_emit_constantsynth (rtx dst, enum rtx_code code,
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HOST_WIDE_INT imm0, HOST_WIDE_INT imm1,
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rtx (*gen_op)(rtx, HOST_WIDE_INT),
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HOST_WIDE_INT imm2)
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{
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gcc_assert (REG_P (dst));
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emit_move_insn (dst, GEN_INT (imm0));
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emit_move_insn (dst, gen_rtx_fmt_ee (code, SImode,
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dst, GEN_INT (imm1)));
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if (gen_op)
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emit_move_insn (dst, gen_op (dst, imm2));
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}
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static int
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xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval,
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rtx (*gen_op)(rtx, HOST_WIDE_INT),
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HOST_WIDE_INT op_imm)
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{
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int shift = exact_log2 (srcval + 1);
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HOST_WIDE_INT imm = INT_MAX;
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rtx x = NULL_RTX;
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int shift;
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gcc_assert (REG_P (dst));
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shift = exact_log2 (srcval + 1);
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if (IN_RANGE (shift, 1, 31))
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{
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xtensa_emit_constantsynth (dst, LSHIFTRT, -1, 32 - shift,
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gen_op, op_imm);
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return 1;
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imm = -1;
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x = gen_lshrsi3 (dst, dst, GEN_INT (32 - shift));
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}
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if (IN_RANGE (srcval, (-2048 - 32768), (2047 + 32512)))
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shift = ctz_hwi (srcval);
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if ((!x || (TARGET_DENSITY && ! IN_RANGE (imm, -32, 95)))
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&& xtensa_simm12b (srcval >> shift))
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{
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imm = srcval >> shift;
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x = gen_ashlsi3 (dst, dst, GEN_INT (shift));
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}
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if ((!x || (TARGET_DENSITY && ! IN_RANGE (imm, -32, 95)))
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&& IN_RANGE (srcval, (-2048 - 32768), (2047 + 32512)))
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{
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HOST_WIDE_INT imm0, imm1;
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@@ -1076,19 +1076,19 @@ xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval,
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imm0 = srcval - imm1;
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if (TARGET_DENSITY && imm1 < 32512 && IN_RANGE (imm0, 224, 255))
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imm0 -= 256, imm1 += 256;
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xtensa_emit_constantsynth (dst, PLUS, imm0, imm1, gen_op, op_imm);
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return 1;
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imm = imm0;
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x = gen_addsi3 (dst, dst, GEN_INT (imm1));
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}
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shift = ctz_hwi (srcval);
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if (xtensa_simm12b (srcval >> shift))
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{
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xtensa_emit_constantsynth (dst, ASHIFT, srcval >> shift, shift,
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gen_op, op_imm);
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return 1;
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}
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if (!x)
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return 0;
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return 0;
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emit_move_insn (dst, GEN_INT (imm));
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emit_insn (x);
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if (gen_op)
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emit_move_insn (dst, gen_op (dst, op_imm));
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return 1;
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}
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static rtx
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