feat: only map GICD regs once
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@@ -4,7 +4,7 @@ use crate::dev::{
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irq::{IntController, IntSource, IrqContext},
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Device,
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};
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use crate::mem::virt::DeviceMemoryIo;
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use crate::mem::virt::{DeviceMemoryIo, DeviceMemory};
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use crate::sync::IrqSafeNullLock;
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use crate::util::InitOnce;
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use error::Errno;
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@@ -52,10 +52,9 @@ impl Device for Gic {
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}
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unsafe fn enable(&self) -> Result<(), Errno> {
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let gicd_mmio_shared =
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DeviceMemoryIo::map("GICv2 shared Distributor registers", self.gicd_base, 1)?;
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let gicd_mmio_banked =
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DeviceMemoryIo::map("GICv2 banked Distributor registers", self.gicd_base, 1)?;
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let gicd_mmio = DeviceMemory::map("GICv2 Distributor registers", self.gicd_base, 1)?;
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let gicd_mmio_shared = DeviceMemoryIo::new(gicd_mmio.clone());
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let gicd_mmio_banked = DeviceMemoryIo::new(gicd_mmio);
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let gicc_mmio = DeviceMemoryIo::map("GICv2 CPU registers", self.gicc_base, 1)?;
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let mut gicd = Gicd::new(gicd_mmio_shared, gicd_mmio_banked);
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@@ -111,6 +111,15 @@ impl DeviceMemory {
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Ok(Self { name, base, count })
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}
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pub unsafe fn clone(&self) -> Self {
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// TODO maybe add refcount and remove "unsafe"?
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Self {
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name: self.name,
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base: self.base,
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count: self.count
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}
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}
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}
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impl<T> DeviceMemoryIo<T> {
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