95 Commits

Author SHA1 Message Date
Mike Frysinger
f0fcc327e3 sim: riscv: fix -Wshadow=local warnings
Inline the one usage of sd in these macros to avoid possible shadowing.
2023-12-22 23:29:19 -05:00
Mike Frysinger
05b9feffff sim: riscv: fix -Wimplicit-fallthrough warnings 2023-12-21 01:59:23 -05:00
Jaydeep Patil
1c37b30945 sim/riscv: fix JALR instruction simulation
Fix 32bit 'jalr rd,ra,imm' integer instruction, where RD was written
before using it to calculate destination address.

This commit also improves testutils.inc for riscv; make use of
pushsection and popsection when adding things to .data, and setup the
%gp global pointer register within the 'start' macro.

Approved-By: Andrew Burgess <aburgess@redhat.com>
2023-10-18 17:55:31 +01:00
Mike Frysinger
109a0a7e90 sim: modules.c: fix generation after recent refactors
Add explicit arch-specific modules.c rules to keep the build from
generating an incorrect common/modules.c.  Otherwise the pattern
rules would cascade such that it'd look for $arch/modules.o which
turned into common/modules.c which triggered the gen rule.

My local testing of this code didn't catch this bug because of how
Automake manages .Po (dependency files) in incremental builds -- it
was adding extra rules that override the pattern rules which caused
the build to generate correct modules.c files.  But when building
from a cold cache, the pattern rules would force common/modules.c to
be used leading to crashes at runtime.
2023-01-15 20:55:48 -05:00
Mike Frysinger
72be276fff sim: common: move modules.c to source tracking
This makes sure the arch-specific modules.c wildcard is matched and
not the common/%.c so that we compile it correctly.  It also makes
sure each subdir has depdir logic enabled.
2023-01-14 20:53:13 -05:00
Mike Frysinger
eac2fbdc4b sim: common: move libcommon.a objects to sources
This simplifies the build logic and avoids an Automake bug where the
common_libcommon_a_OBJECTS variable isn't set in the arch libsim.a
DEPENDENCIES for targets that, alphabetically, come before "common".
We aren't affected by that bug with the current code, but as we move
things out of SIM_ALL_RECURSIVE_DEPS and rely on finer dependencies,
we will trip over it.
2023-01-14 20:48:49 -05:00
Mike Frysinger
6baf06097b sim: build: drop subdir Makefile.in files
These aren't used anymore, so punt them all.
2023-01-11 22:49:28 -05:00
Mike Frysinger
b36a89d135 sim: move arch-specific file compilation of common/ files to top-level 2023-01-10 01:15:29 -05:00
Mike Frysinger
e7699de502 sim: riscv: move arch-specific file compilation to top-level
The arch-specific compiler flags are duplicated, but they'll be cleaned
up once we move all subdir compiles to the top-level.
2023-01-10 01:15:28 -05:00
Mike Frysinger
e732fe9b4f sim: build: drop support for creating libsim.a in subdirs
Now that all ports have moved to creating libsim.a in the top-level,
drop all the support code to create it in a subdir.
2023-01-10 01:15:26 -05:00
Mike Frysinger
91344291e0 sim: riscv: move libsim.a creation to top-level
The objects are still compiled in the subdir, but the creation of the
archive itself is in the top-level.  This is a required step before we
can move compilation itself up, and makes it easier to review.

The downside is that each object compile is a recursive make instead of
a single one.  On my 4 core system, it adds ~100msec to the build per
port, so it's not great, but it shouldn't be a big deal.  This will go
away of course once the top-level compiles objects.
2023-01-10 01:15:25 -05:00
Joel Brobecker
213516ef31 Update copyright year range in header of all files managed by GDB
This commit is the result of running the gdb/copyright.py script,
which automated the update of the copyright year range for all
source files managed by the GDB project to be updated to include
year 2023.
2023-01-01 17:01:16 +04:00
Mike Frysinger
883be19774 sim: cpu: change default init to handle all cpus
All the runtimes were only initializing a single CPU.  When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup.  Change the default from 0 to the compile time value.
2022-12-25 02:10:46 -05:00
Mike Frysinger
f3e1a3e6fa sim: riscv: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.

We can also move the machs.h include out since the model logic was all
generalized from compile-time to runtime last year.
2022-12-23 08:32:58 -05:00
Mike Frysinger
6cf3ddd23e sim: move bfd.h include out of sim-main.h
Not all arches include this in sim-main.h, and the ones that do don't
actually use bfd defines in the sim-main.h header.  Prune it to make
sim-main.h simpler so we can kill it off entirely in the future.

We add the include to the files that utilize e.g. bfd_vma though.
2022-12-22 22:06:12 -05:00
Mike Frysinger
20fea6638f sim: use bfd_vma when reading start addr from bfd info
Since SIM_ADDR is always 32-bit, it might truncate the address with
64-bit ELFs.  Since we load that addr from the bfd, use the bfd_vma
type which matches the bfd_get_start_address API.
2022-12-22 19:29:10 -05:00
Mike Frysinger
4a21ad1e76 sim: enable common sim_cpu usage everywhere
All ports should be migrated now.  Drop the SIM_HAVE_COMMON_SIM_CPU
knob and require it be used everywhere now.
2022-12-21 00:00:18 -05:00
Mike Frysinger
5409cab77e sim: riscv: invert sim_cpu storage 2022-12-21 00:00:01 -05:00
Mike Frysinger
d026e67ed4 sim: move register headers into sim/ namespace [PR sim/29869]
These headers define the register numbers for each port to implement
the sim_fetch_register & sim_store_register interfaces.  While gdb
uses these, the APIs are part of the sim, not gdb.  Move the headers
out of the gdb/ include namespace and into sim/ instead.
2022-12-20 21:06:32 -05:00
Mike Frysinger
4faede6126 sim: riscv: add missing AC_MSG_RESULT call
Previous commit in here forgot to include this.
2022-11-07 23:44:36 +07:00
Mike Frysinger
1787fcc45a sim: riscv: drop subdir configure logic
We've been using this only to set the default word size to 32-vs-64
based on the $target.  We can easily merge this with the top-level
configure script to clean things up a bit.
2022-11-07 23:24:46 +07:00
Mike Frysinger
c0c25232da sim: run: move linking into top-level
Automake will run each subdir individually before moving on to the next
one.  This means that the linking phase, a single threaded process, will
not run in parallel with anything else.  When we have to link ~32 ports,
that's 32 link steps that don't take advantage of parallel systems.  On
my really old 4-core system, this cuts a multi-target build from ~60 sec
to ~30 sec.  We eventually want to move all compile+link steps to this
common dir anyways, so might as well move linking now for a nice speedup.

We use noinst_PROGRAMS instead of bin_PROGRAMS because we're taking care
of the install ourselves rather than letting automake process it.
2022-11-05 20:00:56 +07:00
Mike Frysinger
ee1cffd388 sim: common: change sim_{fetch,store}_register helpers to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-11-02 20:31:10 +05:45
Mike Frysinger
5bab16fdf1 sim: reg: constify store helper
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
Mike Frysinger
5b94c38081 sim: common: change sim_read & sim_write to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-10-31 21:24:39 +05:45
Mike Frysinger
89d5fc244f sim: mips/ppc/riscv: re-add AC_CANONICAL_SYSTEM [PR sim/29439]
These configure scripts check $target and change behavior.  They
shouldn't be doing that, but until we can rework the sim to change
behavior based on the input ELF, restore AC_CANONICAL_SYSTEM to
these so that $target is correctly populated.

This was lost in the d3562f83a7b8a1ae6e333cd5561419d3da18fcb4
("sim: unify toolchain probing logic") refactor as the logic was
hoisted up to the common code.  But the fact the vars weren't
passed down to the sub-configure scripts was missed.

Bug: https://sourceware.org/PR29439
2022-10-23 22:51:17 +05:45
Tsukasa OI
c6422d7be7 sim/riscv: fix multiply instructions on simulator
After this commit:

  commit 0938b032daa52129b4215d8e0eedb6c9804f5280
  Date:   Wed Feb 2 10:06:15 2022 +0900

      RISC-V: Add 'Zmmul' extension in assembler.

some instructions in the RISC-V simulator stopped working as a new
instruction class 'INSN_CLASS_ZMMUL' was added, and some existing
instructions were moved into this class.

The simulator doesn't currently handle this instruction class, and so
the instructions will now cause an illegal instruction trap.

This commit adds support for INSN_CLASS_ZMMUL, and adds a test that
ensures the affected instructions can be executed by the simulator.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Andrew Burgess <aburgess@redhat.com>
2022-10-11 12:38:36 +01:00
Tsukasa OI
b9593cb705 sim/riscv: Complete tidying up with SBREAK
This commit removes SBREAK-related references on the simulator as it's
renamed to EBREAK in 2016 (the RISC-V ISA, version 2.1).

sim/ChangeLog:

	* riscv/sim-main.c (execute_i): Use "ebreak" instead of "sbreak".
2022-09-05 09:42:06 +01:00
Mike Frysinger
216722984f sim: gdbinit: hoist setup to common code
This was left in subdirs because of the dynamic cgen usage.  However,
we can move this breakpoint call to runtime and let gdb detect whether
the symbol exists.
2022-02-21 13:57:33 -05:00
Mike Frysinger
5a33ead2d3 sim: riscv: migrate to standard uintXX_t types
Move off the sim-specific unsignedXX types and to the standard uintXX_t
types that C11 provides.
2022-01-06 01:17:38 -05:00
Joel Brobecker
4a94e36819 Automatic Copyright Year update after running gdb/copyright.py
This commit brings all the changes made by running gdb/copyright.py
as per GDB's Start of New Year Procedure.

For the avoidance of doubt, all changes in this commits were
performed by the script.
2022-01-01 19:13:23 +04:00
Mike Frysinger
c8c6ef3807 sim: riscv: switch to new target-newlib-syscall
Use the new target-newlib-syscall module.  This is needed to merge all
the architectures into a single build, and riscv has a custom syscall
table for its newlib/libgloss port.
2021-11-28 13:23:58 -05:00
Mike Frysinger
8cfc9a1895 sim: callback: expose argv & environ
Pass the existing strings data to the callbacks so that common
libgloss syscalls can be implemented (which we'll do shortly).
2021-11-16 01:13:39 -05:00
Mike Frysinger
54f7a83a62 sim: keep track of program environment strings
We've been passing the environment strings to sim_create_inferior,
but most ports don't do anything with them.  A few will use ad-hoc
logic to stuff the stack for user-mode programs, but that's it.

Let's formalize this across the board by storing the strings in the
normal sim state.  This will allow (in future commits) supporting
more functionality in the run interface, and to unify some of the
libgloss syscalls.
2021-11-16 00:58:41 -05:00
Mike Frysinger
e8f20a28b1 sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.
2021-11-15 02:53:29 -05:00
Mike Frysinger
f9bfc01578 sim: drop unused targ-vals.h includes
This is used in a few places where it's not needed.  Drop the include
to avoid the build-time generated header file as we move to drop it.
2021-10-31 04:53:22 -04:00
Mike Frysinger
9335d9f823 sim: rename ChangeLog files to ChangeLog-2021
Now that ChangeLog entries are no longer used for sim patches,
this commit renames all relevant sim ChangeLog to ChangeLog-2021,
similar to what we would do in the context of the "Start of New
Year" procedure.

The purpose of this change is to avoid people merging ChangeLog
entries by mistake when applying existing commits that they are
currently working on.

Also throw in a .gitignore entry to keep people from adding new
ChangeLog files anywhere in the sim tree.
2021-08-17 20:27:36 -04:00
Mike Frysinger
7eb1f99ada sim: unify reserved instruction bits settings
Move these options up to the common dir so we only test & export
them once across all ports.

The setting only affects igen based ports, and they were turning
this on by default, so keep the default in place.
2021-07-01 20:53:00 -04:00
Mike Frysinger
b79efe264f sim: unify scache settings
The cgen scache module is enabled by every cgen port, and with the
same default value of 16k (which matches the common default value).
Let's pull this option out of the individual ports (via CPPFLAGS)
and into the common code (via config.h).

The object itself is compiled only for cgen ports atm, so that part
doesn't change.  The scache code is initialized dynamically via the
modules.c logic.  That's why the profile code needs an additional
CGEN_ARCH check.

This will allow us to collapse arch configure files more.  Merging
the source files will require more future work, but integrating the
cgen & non-cgen worlds itself will take a lot.
2021-06-30 13:33:18 -04:00
Mike Frysinger
d414eb3e7f sim: move default model to the runtime sim state
This kills off another compile-time option by moving the setting to
the individual arch runtimes.  This will allow dynamic selection by
the arch when doing a single build with multiple arches.

The sim_model_init rework is a little funky.  In the past it was
disabled entirely if no default model was set.  We maintain the
spirit of the logic by gating the fallback logic on whether the
port has defined any models.
2021-06-30 02:57:45 -04:00
Mike Frysinger
1c636da093 sim: namespace sim_machs
We want to do a single build with all arches in one binary which means
we need to namespace sim_machs on a per-arch basis.  Move it from a
global variable to the sim description structure so it can be setup at
runtime.

Changing the SIM_MODEL->num from an enum to an int is unfortunate, but
we specifically don't want to maintain a centralized list anymore, and
this was never used directly in common code, just passed to per-arch
callbacks.
2021-06-30 01:52:51 -04:00
Mike Frysinger
ba9666525f sim: model: constify sim_machs storage
The array of pointers is never modified, so mark it const so it ends
up in the read-only data section.
2021-06-29 20:08:10 -04:00
Mike Frysinger
36bb57e40c sim: drop configure scripts for simple ports
These ports only use the pieces that have been unified, so we can
merge them into the common configure script and get rid of their
unique one entirely.

We still compile & link separate run programs, and have dedicated
subdir Makefiles, but the configure script portion is merged.
2021-06-22 19:26:13 -04:00
Mike Frysinger
456ef1c1d4 sim: unify hardware settings
Move these options up to the common dir so we only test & export
them once across all ports.
2021-06-21 22:20:18 -04:00
Mike Frysinger
be0387eed0 sim: hw: rework configure option & device selection
The sim-hardware configure option allows builders to select a set of
device models to enable.  But this seems like unnecessary overkill:
the existence of individual device models doesn't affect performance
at all as they are only enabled at runtime if the config uses them,
and individually these are all <5KB a piece.  Stripping off a total
of ~50KB from a ~1MB binary doesn't seem useful, and it's extremely
unlikely anyone will ever bother.

So let's simplify the configure/make logic by turning sim-hardware
into a boolean option like many of the other sim options.  Any ports
that have unique device models will declare them in their Makefile
instead of at configure time.  This will allow us to (eventually)
unify the setting into the common dir.
2021-06-21 21:36:51 -04:00
Mike Frysinger
3eda63f2e4 sim: delete SIM_AC_COMMON macro
Now that we've moved all content out to the common file, this is
empty and can be deleted it entirely.
2021-06-20 00:39:38 -04:00
Mike Frysinger
3a829bc50c sim: unify general maintainer settings
Move these options up to the common dir so we only test & export
them once across all ports.  This takes a page from the cgen maint
logic to make $(MAINT) work for non-automake Makefiles which will
allow us to merge it together.
2021-06-20 00:31:27 -04:00
Mike Frysinger
d73f39ee43 sim: move sim-inline to the common code
This will allow us to build the common code with the same inline
settings as the arch subdirs, and only do the test once.
2021-06-20 00:12:11 -04:00
Mike Frysinger
ce3ec98acd sim: unify gettext/intl probing logic
Move these options up to the common dir so we only test & export
them once across all ports.
2021-06-19 16:18:07 -04:00
Mike Frysinger
bc56166f66 sim: unify toolchain dependency logic
The common dir is already probing this info since it's using automake,
so pass it down to the subdirs so they don't have to probe it at all.
2021-06-19 16:07:31 -04:00