The objects are still compiled in the subdir, but the creation of the
archive itself is in the top-level. This is a required step before we
can move compilation itself up, and makes it easier to review.
The downside is that each object compile is a recursive make instead of
a single one. On my 4 core system, it adds ~100msec to the build per
port, so it's not great, but it shouldn't be a big deal. This will go
away of course once the top-level compiles objects.
This commit is the result of running the gdb/copyright.py script,
which automated the update of the copyright year range for all
source files managed by the GDB project to be updated to include
year 2023.
All the runtimes were only initializing a single CPU. When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup. Change the default from 0 to the compile time value.
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
We can also move the machs.h include out since the model logic was all
generalized from compile-time to runtime last year.
Not all arches include this in sim-main.h, and the ones that do don't
actually use bfd defines in the sim-main.h header. Prune it to make
sim-main.h simpler so we can kill it off entirely in the future.
We add the include to the files that utilize e.g. bfd_vma though.
Since SIM_ADDR is always 32-bit, it might truncate the address with
64-bit ELFs. Since we load that addr from the bfd, use the bfd_vma
type which matches the bfd_get_start_address API.
These headers define the register numbers for each port to implement
the sim_fetch_register & sim_store_register interfaces. While gdb
uses these, the APIs are part of the sim, not gdb. Move the headers
out of the gdb/ include namespace and into sim/ instead.
We've been using this only to set the default word size to 32-vs-64
based on the $target. We can easily merge this with the top-level
configure script to clean things up a bit.
Automake will run each subdir individually before moving on to the next
one. This means that the linking phase, a single threaded process, will
not run in parallel with anything else. When we have to link ~32 ports,
that's 32 link steps that don't take advantage of parallel systems. On
my really old 4-core system, this cuts a multi-target build from ~60 sec
to ~30 sec. We eventually want to move all compile+link steps to this
common dir anyways, so might as well move linking now for a nice speedup.
We use noinst_PROGRAMS instead of bin_PROGRAMS because we're taking care
of the install ourselves rather than letting automake process it.
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense. Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense. Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
These configure scripts check $target and change behavior. They
shouldn't be doing that, but until we can rework the sim to change
behavior based on the input ELF, restore AC_CANONICAL_SYSTEM to
these so that $target is correctly populated.
This was lost in the d3562f83a7b8a1ae6e333cd5561419d3da18fcb4
("sim: unify toolchain probing logic") refactor as the logic was
hoisted up to the common code. But the fact the vars weren't
passed down to the sub-configure scripts was missed.
Bug: https://sourceware.org/PR29439
After this commit:
commit 0938b032daa52129b4215d8e0eedb6c9804f5280
Date: Wed Feb 2 10:06:15 2022 +0900
RISC-V: Add 'Zmmul' extension in assembler.
some instructions in the RISC-V simulator stopped working as a new
instruction class 'INSN_CLASS_ZMMUL' was added, and some existing
instructions were moved into this class.
The simulator doesn't currently handle this instruction class, and so
the instructions will now cause an illegal instruction trap.
This commit adds support for INSN_CLASS_ZMMUL, and adds a test that
ensures the affected instructions can be executed by the simulator.
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Andrew Burgess <aburgess@redhat.com>
This commit removes SBREAK-related references on the simulator as it's
renamed to EBREAK in 2016 (the RISC-V ISA, version 2.1).
sim/ChangeLog:
* riscv/sim-main.c (execute_i): Use "ebreak" instead of "sbreak".
This was left in subdirs because of the dynamic cgen usage. However,
we can move this breakpoint call to runtime and let gdb detect whether
the symbol exists.
This commit brings all the changes made by running gdb/copyright.py
as per GDB's Start of New Year Procedure.
For the avoidance of doubt, all changes in this commits were
performed by the script.
Use the new target-newlib-syscall module. This is needed to merge all
the architectures into a single build, and riscv has a custom syscall
table for its newlib/libgloss port.
We've been passing the environment strings to sim_create_inferior,
but most ports don't do anything with them. A few will use ad-hoc
logic to stuff the stack for user-mode programs, but that's it.
Let's formalize this across the board by storing the strings in the
normal sim state. This will allow (in future commits) supporting
more functionality in the run interface, and to unify some of the
libgloss syscalls.
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program. Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.
So let's split the path to the program to run out into a separate
field by itself. This simplifies the various sim_open funcs too.
By itself, this code is more of a logical cleanup than something that
is super useful. But it will open up customization of argv[0] in a
follow up commit. Split the changes to make it easier to review.
Now that ChangeLog entries are no longer used for sim patches,
this commit renames all relevant sim ChangeLog to ChangeLog-2021,
similar to what we would do in the context of the "Start of New
Year" procedure.
The purpose of this change is to avoid people merging ChangeLog
entries by mistake when applying existing commits that they are
currently working on.
Also throw in a .gitignore entry to keep people from adding new
ChangeLog files anywhere in the sim tree.
Move these options up to the common dir so we only test & export
them once across all ports.
The setting only affects igen based ports, and they were turning
this on by default, so keep the default in place.
The cgen scache module is enabled by every cgen port, and with the
same default value of 16k (which matches the common default value).
Let's pull this option out of the individual ports (via CPPFLAGS)
and into the common code (via config.h).
The object itself is compiled only for cgen ports atm, so that part
doesn't change. The scache code is initialized dynamically via the
modules.c logic. That's why the profile code needs an additional
CGEN_ARCH check.
This will allow us to collapse arch configure files more. Merging
the source files will require more future work, but integrating the
cgen & non-cgen worlds itself will take a lot.
This kills off another compile-time option by moving the setting to
the individual arch runtimes. This will allow dynamic selection by
the arch when doing a single build with multiple arches.
The sim_model_init rework is a little funky. In the past it was
disabled entirely if no default model was set. We maintain the
spirit of the logic by gating the fallback logic on whether the
port has defined any models.
We want to do a single build with all arches in one binary which means
we need to namespace sim_machs on a per-arch basis. Move it from a
global variable to the sim description structure so it can be setup at
runtime.
Changing the SIM_MODEL->num from an enum to an int is unfortunate, but
we specifically don't want to maintain a centralized list anymore, and
this was never used directly in common code, just passed to per-arch
callbacks.
These ports only use the pieces that have been unified, so we can
merge them into the common configure script and get rid of their
unique one entirely.
We still compile & link separate run programs, and have dedicated
subdir Makefiles, but the configure script portion is merged.
The sim-hardware configure option allows builders to select a set of
device models to enable. But this seems like unnecessary overkill:
the existence of individual device models doesn't affect performance
at all as they are only enabled at runtime if the config uses them,
and individually these are all <5KB a piece. Stripping off a total
of ~50KB from a ~1MB binary doesn't seem useful, and it's extremely
unlikely anyone will ever bother.
So let's simplify the configure/make logic by turning sim-hardware
into a boolean option like many of the other sim options. Any ports
that have unique device models will declare them in their Makefile
instead of at configure time. This will allow us to (eventually)
unify the setting into the common dir.
Move these options up to the common dir so we only test & export
them once across all ports. This takes a page from the cgen maint
logic to make $(MAINT) work for non-automake Makefiles which will
allow us to merge it together.
Move these options up to the common dir so we only test & export
them once across all ports. It also enables -Werror usage on the
common files we've been pulling out of arch subdirs.
For the ports that still don't build with -Werror, rather than disable
the flag at configure time, do it at make time. This will allow us to
unify these tests in the common sim configure script.
The sim-basics.h is too big and includes too many things. This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, the arch is
expected to support both, and the value will be probed based on the
user runtime options or the input program.
Only two arches today set the default value (bpf & mips). We can
probably let this go as it only shows up in one scenario: the sim
is invoked, but with no inputs, and no user endian selection. This
means bpf will not behave like the other arches: an error is shown
and forces the user to make a choice. If an input program is used
though, we'll still switch the default to that. This allows us to
remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting.
For the ports that set a "wire" endian, move it to the runtime init
of the respective sim_open calls. This allows us to change the
WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting
if they want to force a specific endianness.
With all the endian logic moved to runtime selection, we can move
the configure call up to the common dir so we only process it once
across all ports.
The ppc arch was picking the wire endian based on the target used,
but since we weren't doing that for other biendian arches, we can
let this go too. We'll rely on the input selecting the endian, or
make the user decide.
