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5b1b69e467
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rv64: remove commented out M-mode CSRs
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2025-01-21 19:53:33 +02:00 |
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e0bb98e92a
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doc: add notes on VisionFive 2 boot
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2025-01-21 19:39:48 +02:00 |
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822d4f891c
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rv64: implement address space dropping
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2025-01-21 18:50:26 +02:00 |
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ca82e25cf6
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rv64: relax TLB flushes
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2025-01-21 18:37:30 +02:00 |
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6aa3e7f6be
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rv64: implement signal handling
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2025-01-21 18:13:05 +02:00 |
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8ff0f03989
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xtask: increase default mem for riscv64
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2025-01-21 17:58:16 +02:00 |
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5d27bd6033
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mm: PageBox::into_physical_raw/from_physical_raw
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2025-01-21 17:05:38 +02:00 |
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cfc11c402a
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rv64: fix smp init in asymmetric systems
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2025-01-21 16:53:57 +02:00 |
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909980f4eb
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rv64: add jh7110/starfive visionfive2 support
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2025-01-21 16:34:03 +02:00 |
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16f580e7af
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rv64: smp secondary hart startup
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2025-01-20 17:04:17 +02:00 |
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65b8c0ee67
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rv64: fix timer clock scale
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2025-01-20 14:15:45 +02:00 |
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2f942e1721
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maint: sync up other archs
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2025-01-20 13:59:06 +02:00 |
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86509e39c1
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rv64: riscv plic driver, time accouting
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2025-01-20 13:22:24 +02:00 |
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8ba37c9762
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rv64: boot into usermode
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2025-01-20 00:54:26 +02:00 |
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20fa34c945
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rv64: platform init, task switching
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2025-01-19 15:16:26 +02:00 |
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f46f3ddc31
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rv64: implement M-/S-mode trap stubs
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2025-01-17 03:28:00 +02:00 |
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86eb2d3252
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rv64: boot into upper half
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2025-01-17 02:25:49 +02:00 |
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